Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mx3 / mx31lilly-db.c
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1/*
2 * LILLY-1131 development board support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
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21 */
22
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/init.h>
d0b1eabc 26#include <linux/gpio.h>
b9923872 27#include <linux/platform_device.h>
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28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32
33#include <mach/hardware.h>
34#include <mach/common.h>
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35#include <mach/iomux-mx3.h>
36#include <mach/board-mx31lilly.h>
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37#include <mach/mx3fb.h>
38#include <mach/ipu.h>
1bc34f79 39
16cf5c41 40#include "devices-imx31.h"
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41#include "devices.h"
42
43/*
44 * This file contains board-specific initialization routines for the
45 * LILLY-1131 development board. If you design an own baseboard for the
46 * module, use this file as base for support code.
47 */
48
49static unsigned int lilly_db_board_pins[] __initdata = {
50 MX31_PIN_CTS1__CTS1,
51 MX31_PIN_RTS1__RTS1,
52 MX31_PIN_TXD1__TXD1,
53 MX31_PIN_RXD1__RXD1,
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54 MX31_PIN_CTS2__CTS2,
55 MX31_PIN_RTS2__RTS2,
56 MX31_PIN_TXD2__TXD2,
57 MX31_PIN_RXD2__RXD2,
58 MX31_PIN_CSPI3_MOSI__RXD3,
59 MX31_PIN_CSPI3_MISO__TXD3,
60 MX31_PIN_CSPI3_SCLK__RTS3,
61 MX31_PIN_CSPI3_SPI_RDY__CTS3,
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62 MX31_PIN_SD1_DATA3__SD1_DATA3,
63 MX31_PIN_SD1_DATA2__SD1_DATA2,
64 MX31_PIN_SD1_DATA1__SD1_DATA1,
65 MX31_PIN_SD1_DATA0__SD1_DATA0,
66 MX31_PIN_SD1_CLK__SD1_CLK,
67 MX31_PIN_SD1_CMD__SD1_CMD,
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68 MX31_PIN_LD0__LD0,
69 MX31_PIN_LD1__LD1,
70 MX31_PIN_LD2__LD2,
71 MX31_PIN_LD3__LD3,
72 MX31_PIN_LD4__LD4,
73 MX31_PIN_LD5__LD5,
74 MX31_PIN_LD6__LD6,
75 MX31_PIN_LD7__LD7,
76 MX31_PIN_LD8__LD8,
77 MX31_PIN_LD9__LD9,
78 MX31_PIN_LD10__LD10,
79 MX31_PIN_LD11__LD11,
80 MX31_PIN_LD12__LD12,
81 MX31_PIN_LD13__LD13,
82 MX31_PIN_LD14__LD14,
83 MX31_PIN_LD15__LD15,
84 MX31_PIN_LD16__LD16,
85 MX31_PIN_LD17__LD17,
86 MX31_PIN_VSYNC3__VSYNC3,
87 MX31_PIN_HSYNC__HSYNC,
88 MX31_PIN_FPSHIFT__FPSHIFT,
89 MX31_PIN_DRDY0__DRDY0,
90 MX31_PIN_CONTRAST__CONTRAST,
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91};
92
93/* UART */
16cf5c41 94static const struct imxuart_platform_data uart_pdata __initconst = {
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95 .flags = IMXUART_HAVE_RTSCTS,
96};
97
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98/* MMC support */
99
100static int mxc_mmc1_get_ro(struct device *dev)
101{
102 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
103}
104
105static int gpio_det, gpio_wp;
106
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107#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
108 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
109
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110static int mxc_mmc1_init(struct device *dev,
111 irq_handler_t detect_irq, void *data)
112{
113 int ret;
114
115 gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
116 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
117
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118 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
119 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
120 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
121 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
122 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
123 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
124
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125 ret = gpio_request(gpio_det, "MMC detect");
126 if (ret)
127 return ret;
128
129 ret = gpio_request(gpio_wp, "MMC w/p");
130 if (ret)
131 goto exit_free_det;
132
133 gpio_direction_input(gpio_det);
134 gpio_direction_input(gpio_wp);
135
136 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), detect_irq,
137 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
138 "MMC detect", data);
139 if (ret)
140 goto exit_free_wp;
141
142 return 0;
143
144exit_free_wp:
145 gpio_free(gpio_wp);
146
147exit_free_det:
148 gpio_free(gpio_det);
149
150 return ret;
151}
152
153static void mxc_mmc1_exit(struct device *dev, void *data)
154{
155 gpio_free(gpio_det);
156 gpio_free(gpio_wp);
157 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
158}
159
6a697e3d 160static const struct imxmmc_platform_data mmc_pdata __initconst = {
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161 .get_ro = mxc_mmc1_get_ro,
162 .init = mxc_mmc1_init,
163 .exit = mxc_mmc1_exit,
164};
165
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166/* Framebuffer support */
167static struct ipu_platform_data ipu_data __initdata = {
168 .irq_base = MXC_IPU_IRQ_START,
169};
170
171static const struct fb_videomode fb_modedb = {
172 /* 640x480 TFT panel (IPS-056T) */
173 .name = "CRT-VGA",
174 .refresh = 64,
175 .xres = 640,
176 .yres = 480,
177 .pixclock = 30000,
178 .left_margin = 200,
179 .right_margin = 2,
180 .upper_margin = 2,
181 .lower_margin = 2,
182 .hsync_len = 3,
183 .vsync_len = 1,
184 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
185 .vmode = FB_VMODE_NONINTERLACED,
186 .flag = 0,
187};
188
189static struct mx3fb_platform_data fb_pdata __initdata = {
190 .dma_dev = &mx3_ipu.dev,
191 .name = "CRT-VGA",
192 .mode = &fb_modedb,
193 .num_modes = 1,
194};
195
196#define LCD_VCC_EN_GPIO (7)
197
198static void __init mx31lilly_init_fb(void)
199{
200 if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
201 printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
202 return;
203 }
204
205 mxc_register_device(&mx3_ipu, &ipu_data);
206 mxc_register_device(&mx3_fb, &fb_pdata);
207 gpio_direction_output(LCD_VCC_EN_GPIO, 1);
208}
209
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210void __init mx31lilly_db_init(void)
211{
212 mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
213 ARRAY_SIZE(lilly_db_board_pins),
214 "development board pins");
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215 imx31_add_imx_uart0(&uart_pdata);
216 imx31_add_imx_uart1(&uart_pdata);
217 imx31_add_imx_uart2(&uart_pdata);
6a697e3d 218 imx31_add_mxc_mmc(0, &mmc_pdata);
b9923872 219 mx31lilly_init_fb();
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220}
221