Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mx3 / mach-mx31lilly.c
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1/*
2 * LILLY-1131 module support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
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21 */
22
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/clk.h>
066fb847 26#include <linux/gpio.h>
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27#include <linux/platform_device.h>
28#include <linux/interrupt.h>
29#include <linux/smsc911x.h>
38160e0b 30#include <linux/mtd/physmap.h>
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31#include <linux/spi/spi.h>
32#include <linux/mfd/mc13783.h>
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33#include <linux/usb/otg.h>
34#include <linux/usb/ulpi.h>
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35
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/time.h>
39#include <asm/mach/map.h>
40
41#include <mach/hardware.h>
42#include <mach/common.h>
43#include <mach/iomux-mx3.h>
44#include <mach/board-mx31lilly.h>
066fb847 45#include <mach/ulpi.h>
65b1aa13 46
06606ff1 47#include "devices-imx31.h"
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48#include "devices.h"
49
50/*
51 * This file contains module-specific initialization routines for LILLY-1131.
52 * Initialization of peripherals found on the baseboard is implemented in the
53 * appropriate baseboard support code.
54 */
55
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56/* SMSC ethernet support */
57
58static struct resource smsc91x_resources[] = {
59 {
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60 .start = MX31_CS4_BASE_ADDR,
61 .end = MX31_CS4_BASE_ADDR + 0xffff,
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62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
66 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
67 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
68 }
69};
70
71static struct smsc911x_platform_config smsc911x_config = {
72 .phy_interface = PHY_INTERFACE_MODE_MII,
73 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
74 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
75 .flags = SMSC911X_USE_32BIT |
76 SMSC911X_SAVE_MAC_ADDRESS |
77 SMSC911X_FORCE_INTERNAL_PHY,
78};
79
80static struct platform_device smsc91x_device = {
81 .name = "smsc911x",
82 .id = -1,
83 .num_resources = ARRAY_SIZE(smsc91x_resources),
84 .resource = smsc91x_resources,
85 .dev = {
86 .platform_data = &smsc911x_config,
87 }
88};
89
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90/* NOR flash */
91static struct physmap_flash_data nor_flash_data = {
92 .width = 2,
93};
94
95static struct resource nor_flash_resource = {
96 .start = 0xa0000000,
97 .end = 0xa1ffffff,
98 .flags = IORESOURCE_MEM,
99};
100
101static struct platform_device physmap_flash_device = {
102 .name = "physmap-flash",
103 .id = 0,
104 .dev = {
105 .platform_data = &nor_flash_data,
106 },
107 .resource = &nor_flash_resource,
108 .num_resources = 1,
109};
110
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111/* USB */
112
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113#if defined(CONFIG_USB_ULPI)
114
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115#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
116 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
117
118static int usbotg_init(struct platform_device *pdev)
119{
120 unsigned int pins[] = {
121 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
122 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
123 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
124 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
125 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
126 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
127 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
128 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
129 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
130 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
131 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
132 MX31_PIN_USBOTG_STP__USBOTG_STP,
133 };
134
135 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
136
137 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
138 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
139 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
140 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
141 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
142 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
143 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
144 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
149
150 mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
151 mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
152
153 /* chip select */
154 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
155 "USBOTG_CS");
156 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
157 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
158
159 return 0;
160}
161
162static int usbh1_init(struct platform_device *pdev)
163{
164 int pins[] = {
165 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
166 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
167 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
168 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
169 MX31_PIN_CSPI1_SS2__USBH1_RCV,
170 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
171 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
172 };
173
174 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
175
176 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
177 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
178 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
179 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
180 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
181 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
182 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
183
184 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
185
186 return 0;
187}
188
189static int usbh2_init(struct platform_device *pdev)
190{
191 int pins[] = {
192 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
193 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
194 MX31_PIN_USBH2_CLK__USBH2_CLK,
195 MX31_PIN_USBH2_DIR__USBH2_DIR,
196 MX31_PIN_USBH2_NXT__USBH2_NXT,
197 MX31_PIN_USBH2_STP__USBH2_STP,
198 };
199
200 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
201
202 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
203 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
204 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
205 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
206 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
207 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
208 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
209 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
210 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
211 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
212 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
213 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
214
215 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
216
217 /* chip select */
218 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
219 "USBH2_CS");
220 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
221 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
222
223 return 0;
224}
225
226static struct mxc_usbh_platform_data usbotg_pdata = {
227 .init = usbotg_init,
228 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
229 .flags = MXC_EHCI_POWER_PINS_ENABLED,
230};
231
2d58de28 232static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
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233 .init = usbh1_init,
234 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
235 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
236};
237
2d58de28 238static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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239 .init = usbh2_init,
240 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
241 .flags = MXC_EHCI_POWER_PINS_ENABLED,
242};
243
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244static void lilly1131_usb_init(void)
245{
246 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
13dd0c97 247 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
4d5d8590 248 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
13dd0c97 249 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
4d5d8590 250
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251 imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
252 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
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253}
254
255#else
256static inline void lilly1131_usb_init(void) {}
257#endif /* CONFIG_USB_ULPI */
cbaa6ca1 258
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259/* SPI */
260
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261static int spi_internal_chipselect[] = {
262 MXC_SPI_CS(0),
263 MXC_SPI_CS(1),
264 MXC_SPI_CS(2),
265};
266
06606ff1 267static const struct spi_imx_master spi0_pdata __initconst = {
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268 .chipselect = spi_internal_chipselect,
269 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
270};
271
06606ff1 272static const struct spi_imx_master spi1_pdata __initconst = {
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273 .chipselect = spi_internal_chipselect,
274 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
275};
276
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277static struct mc13783_platform_data mc13783_pdata __initdata = {
278 .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
279};
280
281static struct spi_board_info mc13783_dev __initdata = {
282 .modalias = "mc13783",
283 .max_speed_hz = 1000000,
284 .bus_num = 1,
285 .chip_select = 0,
286 .platform_data = &mc13783_pdata,
21b07344 287 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
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288};
289
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290static struct platform_device *devices[] __initdata = {
291 &smsc91x_device,
292 &physmap_flash_device,
293};
294
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295static int mx31lilly_baseboard;
296core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
297
298static void __init mx31lilly_board_init(void)
299{
300 switch (mx31lilly_baseboard) {
301 case MX31LILLY_NOBOARD:
302 break;
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303 case MX31LILLY_DB:
304 mx31lilly_db_init();
305 break;
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306 default:
307 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
308 mx31lilly_baseboard);
309 }
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310
311 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
312
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313 /* SPI */
314 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
315 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
316 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
317 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
318 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
319 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
320 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
321
322 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
323 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
324 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
325 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
326 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
327 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
328 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
329
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330 imx31_add_spi_imx0(&spi0_pdata);
331 imx31_add_spi_imx1(&spi1_pdata);
2cc32683 332 spi_register_board_info(&mc13783_dev, 1);
3ea2e1a4 333
cbaa6ca1 334 platform_add_devices(devices, ARRAY_SIZE(devices));
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335
336 /* USB */
4d5d8590 337 lilly1131_usb_init();
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338}
339
340static void __init mx31lilly_timer_init(void)
341{
342 mx31_clocks_init(26000000);
343}
344
345static struct sys_timer mx31lilly_timer = {
346 .init = mx31lilly_timer_init,
347};
348
349MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
34101237 350 .boot_params = MX3x_PHYS_OFFSET + 0x100,
65b1aa13 351 .map_io = mx31_map_io,
c5aa0ad0 352 .init_irq = mx31_init_irq,
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353 .init_machine = mx31lilly_board_init,
354 .timer = &mx31lilly_timer,
355MACHINE_END
356