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a09e64fb | 1 | /* arch/arm/mach-msm/include/mach/idle.S |
3042102a BS |
2 | * |
3 | * Idle processing for MSM7K - work around bugs with SWFI. | |
4 | * | |
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | |
6 | * Copyright (C) 2007 Google, Inc. | |
7 | * | |
8 | * This software is licensed under the terms of the GNU General Public | |
9 | * License version 2, as published by the Free Software Foundation, and | |
10 | * may be copied, distributed, and modified under those terms. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | */ | |
18 | ||
19 | #include <linux/linkage.h> | |
20 | #include <asm/assembler.h> | |
21 | ||
22 | ENTRY(arch_idle) | |
23 | #ifdef CONFIG_MSM7X00A_IDLE | |
24 | mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | |
25 | bic r0, r1, #(1 << 2) /* clear dcache bit */ | |
26 | bic r0, r0, #(1 << 12) /* clear icache bit */ | |
27 | mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | |
28 | ||
29 | mov r0, #0 /* prepare wfi value */ | |
30 | mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ | |
31 | mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ | |
32 | mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | |
33 | ||
34 | mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | |
35 | #endif | |
36 | mov pc, lr |