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a32d2feb DW |
1 | /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/platform_device.h> | |
a32d2feb | 22 | #include <linux/delay.h> |
7032d512 | 23 | #include <linux/usb/msm_hsusb.h> |
a32d2feb DW |
24 | |
25 | #include <asm/mach-types.h> | |
26 | #include <asm/mach/arch.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/setup.h> | |
29 | ||
a32d2feb | 30 | #include <mach/board.h> |
d1c0d43d DW |
31 | #include <mach/irqs.h> |
32 | #include <mach/sirc.h> | |
33 | #include <mach/gpio.h> | |
a32d2feb DW |
34 | |
35 | #include "devices.h" | |
a32d2feb | 36 | |
d1c0d43d | 37 | extern struct sys_timer msm_timer; |
a32d2feb | 38 | |
5d73c53b GB |
39 | static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300; |
40 | static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156; | |
41 | ||
42 | /* Leave smc91x resources empty here, as we'll fill them in | |
43 | * at run-time: they vary from board to board, and the true | |
44 | * configuration won't be known until boot. | |
45 | */ | |
7c63dedc | 46 | static struct resource smc91x_resources[] = { |
5d73c53b GB |
47 | [0] = { |
48 | .flags = IORESOURCE_MEM, | |
49 | }, | |
50 | [1] = { | |
51 | .flags = IORESOURCE_IRQ, | |
52 | }, | |
53 | }; | |
54 | ||
7c63dedc | 55 | static struct platform_device smc91x_device = { |
5d73c53b GB |
56 | .name = "smc91x", |
57 | .id = 0, | |
58 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
59 | .resource = smc91x_resources, | |
60 | }; | |
61 | ||
62 | static int __init msm_init_smc91x(void) | |
63 | { | |
64 | if (machine_is_qsd8x50_surf()) { | |
65 | smc91x_resources[0].start = qsd8x50_surf_smc91x_base; | |
66 | smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff; | |
67 | smc91x_resources[1].start = | |
68 | gpio_to_irq(qsd8x50_surf_smc91x_gpio); | |
69 | smc91x_resources[1].end = | |
70 | gpio_to_irq(qsd8x50_surf_smc91x_gpio); | |
71 | platform_device_register(&smc91x_device); | |
72 | } | |
73 | ||
74 | return 0; | |
75 | } | |
76 | module_init(msm_init_smc91x); | |
77 | ||
7032d512 PK |
78 | static int hsusb_phy_init_seq[] = { |
79 | 0x08, 0x31, /* Increase HS Driver Amplitude */ | |
80 | 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */ | |
81 | -1 | |
82 | }; | |
83 | ||
84 | static struct msm_otg_platform_data msm_otg_pdata = { | |
85 | .phy_init_seq = hsusb_phy_init_seq, | |
86 | .mode = USB_PERIPHERAL, | |
87 | .otg_control = OTG_PHY_CONTROL, | |
88 | }; | |
89 | ||
a32d2feb | 90 | static struct platform_device *devices[] __initdata = { |
d1c0d43d | 91 | &msm_device_uart3, |
88b52277 | 92 | &msm_device_smd, |
7032d512 PK |
93 | &msm_device_otg, |
94 | &msm_device_hsusb, | |
95 | &msm_device_hsusb_host, | |
a32d2feb DW |
96 | }; |
97 | ||
d1c0d43d | 98 | static void __init qsd8x50_map_io(void) |
a32d2feb | 99 | { |
d1c0d43d DW |
100 | msm_map_qsd8x50_io(); |
101 | msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50); | |
a32d2feb DW |
102 | } |
103 | ||
d1c0d43d | 104 | static void __init qsd8x50_init_irq(void) |
a32d2feb | 105 | { |
d1c0d43d DW |
106 | msm_init_irq(); |
107 | msm_init_sirc(); | |
a32d2feb DW |
108 | } |
109 | ||
110 | static void __init qsd8x50_init(void) | |
111 | { | |
7032d512 PK |
112 | msm_device_otg.dev.platform_data = &msm_otg_pdata; |
113 | msm_device_hsusb.dev.parent = &msm_device_otg.dev; | |
114 | msm_device_hsusb_host.dev.parent = &msm_device_otg.dev; | |
a32d2feb DW |
115 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
116 | } | |
117 | ||
a32d2feb DW |
118 | MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") |
119 | #ifdef CONFIG_MSM_DEBUG_UART | |
a32d2feb DW |
120 | #endif |
121 | .boot_params = PHYS_OFFSET + 0x100, | |
122 | .map_io = qsd8x50_map_io, | |
123 | .init_irq = qsd8x50_init_irq, | |
124 | .init_machine = qsd8x50_init, | |
125 | .timer = &msm_timer, | |
126 | MACHINE_END | |
127 | ||
d1c0d43d | 128 | MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") |
a32d2feb | 129 | #ifdef CONFIG_MSM_DEBUG_UART |
a32d2feb DW |
130 | #endif |
131 | .boot_params = PHYS_OFFSET + 0x100, | |
132 | .map_io = qsd8x50_map_io, | |
133 | .init_irq = qsd8x50_init_irq, | |
134 | .init_machine = qsd8x50_init, | |
135 | .timer = &msm_timer, | |
136 | MACHINE_END |