[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-lh7a40x / irq-lh7a400.c

/* arch/arm/mach-lh7a40x/irq-lh7a400.c
 *
 *  Copyright (C) 2004 Coastal Environmental Systems
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  version 2 as published by the Free Software Foundation.
 *
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <mach/irqs.h>

#include "common.h"

  /* CPU IRQ handling */

static void lh7a400_mask_irq(struct irq_data *d)
{
	INTC_INTENC = (1 << d->irq);
}

static void lh7a400_unmask_irq(struct irq_data *d)
{
	INTC_INTENS = (1 << d->irq);
}

static void lh7a400_ack_gpio_irq(struct irq_data *d)
{
	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
	INTC_INTENC = (1 << d->irq);
}

static struct irq_chip lh7a400_internal_chip = {
	.name		= "MPU",
	.irq_ack	= lh7a400_mask_irq, /* Level triggering -> mask is ack */
	.irq_mask	= lh7a400_mask_irq,
	.irq_unmask	= lh7a400_unmask_irq,
};

static struct irq_chip lh7a400_gpio_chip = {
	.name		= "GPIO",
	.irq_ack	= lh7a400_ack_gpio_irq,
	.irq_mask	= lh7a400_mask_irq,
	.irq_unmask	= lh7a400_unmask_irq,
};


  /* IRQ initialization */

void __init lh7a400_init_irq (void)
{
	int irq;

	INTC_INTENC = 0xffffffff;	/* Disable all interrupts */
	GPIO_GPIOFINTEN = 0x00;		/* Disable all GPIOF interrupts */
	barrier ();

	for (irq = 0; irq < NR_IRQS; ++irq) {
		switch (irq) {
		case IRQ_GPIO0INTR:
		case IRQ_GPIO1INTR:
		case IRQ_GPIO2INTR:
		case IRQ_GPIO3INTR:
		case IRQ_GPIO4INTR:
		case IRQ_GPIO5INTR:
		case IRQ_GPIO6INTR:
		case IRQ_GPIO7INTR:
			set_irq_chip (irq, &lh7a400_gpio_chip);
			set_irq_handler (irq, handle_level_irq); /* OK default */
			break;
		default:
			set_irq_chip (irq, &lh7a400_internal_chip);
			set_irq_handler (irq, handle_level_irq);
		}
		set_irq_flags (irq, IRQF_VALID);
	}

	lh7a40x_init_board_irq ();

/* *** FIXME: the LH7a400 does use FIQ interrupts in some cases.  For
   the time being, these are not initialized. */

/*	init_FIQ(); */
}
Commit	Line	Data
1da177e4 LT	1	/* arch/arm/mach-lh7a40x/irq-lh7a400.c
	2	*
	3	* Copyright (C) 2004 Coastal Environmental Systems
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* version 2 as published by the Free Software Foundation.
	8	*
	9	*/
	10
	11	#include <linux/init.h>
	12	#include <linux/module.h>
	13	#include <linux/interrupt.h>
1da177e4	14
a09e64fb	15	#include <mach/hardware.h>
1da177e4 LT	16	#include <asm/irq.h>
1da177e4 LT	17	#include <asm/mach/irq.h>
a09e64fb	18	#include <mach/irqs.h>
1da177e4	19
411ef7f4	20	#include "common.h"
1da177e4 LT	21
	22	/* CPU IRQ handling */
	23
3b7cff66	24	static void lh7a400_mask_irq(struct irq_data *d)
1da177e4	25	{
3b7cff66	26	INTC_INTENC = (1 << d->irq);
1da177e4 LT	27	}
1da177e4 LT	28
3b7cff66	29	static void lh7a400_unmask_irq(struct irq_data *d)
1da177e4	30	{
3b7cff66	31	INTC_INTENS = (1 << d->irq);
1da177e4 LT	32	}
1da177e4 LT	33
3b7cff66	34	static void lh7a400_ack_gpio_irq(struct irq_data *d)
1da177e4	35	{
3b7cff66 LB	36	GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
3b7cff66 LB	37	INTC_INTENC = (1 << d->irq);
1da177e4 LT	38	}
1da177e4 LT	39
38c677cb	40	static struct irq_chip lh7a400_internal_chip = {
3b7cff66 LB	41	.name = "MPU",
	42	.irq_ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */
	43	.irq_mask = lh7a400_mask_irq,
	44	.irq_unmask = lh7a400_unmask_irq,
1da177e4 LT	45	};
1da177e4 LT	46
38c677cb	47	static struct irq_chip lh7a400_gpio_chip = {
3b7cff66 LB	48	.name = "GPIO",
	49	.irq_ack = lh7a400_ack_gpio_irq,
	50	.irq_mask = lh7a400_mask_irq,
	51	.irq_unmask = lh7a400_unmask_irq,
1da177e4 LT	52	};
	53
	54
	55	/* IRQ initialization */
	56
	57	void __init lh7a400_init_irq (void)
	58	{
	59	int irq;
	60
	61	INTC_INTENC = 0xffffffff; /* Disable all interrupts */
	62	GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */
	63	barrier ();
	64
	65	for (irq = 0; irq < NR_IRQS; ++irq) {
	66	switch (irq) {
	67	case IRQ_GPIO0INTR:
	68	case IRQ_GPIO1INTR:
	69	case IRQ_GPIO2INTR:
	70	case IRQ_GPIO3INTR:
	71	case IRQ_GPIO4INTR:
	72	case IRQ_GPIO5INTR:
	73	case IRQ_GPIO6INTR:
	74	case IRQ_GPIO7INTR:
	75	set_irq_chip (irq, &lh7a400_gpio_chip);
10dd5ce2	76	set_irq_handler (irq, handle_level_irq); /* OK default */
1da177e4 LT	77	break;
	78	default:
	79	set_irq_chip (irq, &lh7a400_internal_chip);
10dd5ce2	80	set_irq_handler (irq, handle_level_irq);
1da177e4 LT	81	}
	82	set_irq_flags (irq, IRQF_VALID);
	83	}
	84
	85	lh7a40x_init_board_irq ();
	86
	87	/* *** FIXME: the LH7a400 does use FIQ interrupts in some cases. For
	88	the time being, these are not initialized. */
	89
	90	/* init_FIQ(); */
	91	}