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3145d8a6 RW |
1 | /* |
2 | * arch/arm/mach-ixp4xx/nas100d-setup.c | |
3 | * | |
4 | * NAS 100d board-setup | |
5 | * | |
c7d1623e RW |
6 | * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au> |
7 | * | |
8 | * based on ixdp425-setup.c: | |
3145d8a6 | 9 | * Copyright (C) 2003-2004 MontaVista Software, Inc. |
c7d1623e RW |
10 | * based on nas100d-power.c: |
11 | * Copyright (C) 2005 Tower Technologies | |
12 | * based on nas100d-io.c | |
13 | * Copyright (C) 2004 Karen Spearel | |
3145d8a6 RW |
14 | * |
15 | * Author: Alessandro Zummo <a.zummo@towertech.it> | |
16 | * Author: Rod Whitby <rod@whitby.id.au> | |
17 | * Maintainers: http://www.nslu2-linux.org/ | |
18 | * | |
19 | */ | |
2f8163ba | 20 | #include <linux/gpio.h> |
b7edc84a | 21 | #include <linux/if_ether.h> |
c7d1623e RW |
22 | #include <linux/irq.h> |
23 | #include <linux/jiffies.h> | |
24 | #include <linux/timer.h> | |
3145d8a6 RW |
25 | #include <linux/serial.h> |
26 | #include <linux/serial_8250.h> | |
df6934b3 | 27 | #include <linux/leds.h> |
c7d1623e | 28 | #include <linux/reboot.h> |
400d8231 | 29 | #include <linux/i2c.h> |
5a4a2387 | 30 | #include <linux/i2c-gpio.h> |
fced80c7 | 31 | #include <linux/io.h> |
3145d8a6 RW |
32 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | |
34 | #include <asm/mach/flash.h> | |
35 | ||
23fa6846 KH |
36 | #define NAS100D_SDA_PIN 5 |
37 | #define NAS100D_SCL_PIN 6 | |
38 | ||
39 | /* Buttons */ | |
40 | #define NAS100D_PB_GPIO 14 /* power button */ | |
41 | #define NAS100D_RB_GPIO 4 /* reset button */ | |
42 | ||
43 | /* Power control */ | |
44 | #define NAS100D_PO_GPIO 12 /* power off */ | |
45 | ||
46 | /* LEDs */ | |
47 | #define NAS100D_LED_WLAN_GPIO 0 | |
48 | #define NAS100D_LED_DISK_GPIO 3 | |
49 | #define NAS100D_LED_PWR_GPIO 15 | |
50 | ||
3145d8a6 RW |
51 | static struct flash_platform_data nas100d_flash_data = { |
52 | .map_name = "cfi_probe", | |
53 | .width = 2, | |
54 | }; | |
55 | ||
56 | static struct resource nas100d_flash_resource = { | |
3145d8a6 RW |
57 | .flags = IORESOURCE_MEM, |
58 | }; | |
59 | ||
60 | static struct platform_device nas100d_flash = { | |
61 | .name = "IXP4XX-Flash", | |
62 | .id = 0, | |
63 | .dev.platform_data = &nas100d_flash_data, | |
64 | .num_resources = 1, | |
65 | .resource = &nas100d_flash_resource, | |
66 | }; | |
67 | ||
400d8231 RW |
68 | static struct i2c_board_info __initdata nas100d_i2c_board_info [] = { |
69 | { | |
3760f736 | 70 | I2C_BOARD_INFO("pcf8563", 0x51), |
400d8231 RW |
71 | }, |
72 | }; | |
73 | ||
1208ebf2 | 74 | static struct gpio_led nas100d_led_pins[] = { |
df6934b3 | 75 | { |
6c152bee | 76 | .name = "nas100d:green:wlan", |
1208ebf2 RW |
77 | .gpio = NAS100D_LED_WLAN_GPIO, |
78 | .active_low = true, | |
df6934b3 RW |
79 | }, |
80 | { | |
6c152bee | 81 | .name = "nas100d:blue:power", /* (off=flashing) */ |
1208ebf2 RW |
82 | .gpio = NAS100D_LED_PWR_GPIO, |
83 | .active_low = true, | |
df6934b3 RW |
84 | }, |
85 | { | |
6c152bee | 86 | .name = "nas100d:yellow:disk", |
1208ebf2 RW |
87 | .gpio = NAS100D_LED_DISK_GPIO, |
88 | .active_low = true, | |
df6934b3 RW |
89 | }, |
90 | }; | |
91 | ||
1208ebf2 RW |
92 | static struct gpio_led_platform_data nas100d_led_data = { |
93 | .num_leds = ARRAY_SIZE(nas100d_led_pins), | |
94 | .leds = nas100d_led_pins, | |
95 | }; | |
96 | ||
df6934b3 | 97 | static struct platform_device nas100d_leds = { |
1208ebf2 | 98 | .name = "leds-gpio", |
df6934b3 | 99 | .id = -1, |
1208ebf2 | 100 | .dev.platform_data = &nas100d_led_data, |
df6934b3 | 101 | }; |
df6934b3 | 102 | |
5a4a2387 | 103 | static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = { |
3145d8a6 RW |
104 | .sda_pin = NAS100D_SDA_PIN, |
105 | .scl_pin = NAS100D_SCL_PIN, | |
106 | }; | |
107 | ||
5a4a2387 MLJ |
108 | static struct platform_device nas100d_i2c_gpio = { |
109 | .name = "i2c-gpio", | |
3145d8a6 | 110 | .id = 0, |
5a4a2387 MLJ |
111 | .dev = { |
112 | .platform_data = &nas100d_i2c_gpio_data, | |
113 | }, | |
3145d8a6 RW |
114 | }; |
115 | ||
116 | static struct resource nas100d_uart_resources[] = { | |
117 | { | |
118 | .start = IXP4XX_UART1_BASE_PHYS, | |
119 | .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, | |
120 | .flags = IORESOURCE_MEM, | |
121 | }, | |
122 | { | |
123 | .start = IXP4XX_UART2_BASE_PHYS, | |
124 | .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, | |
125 | .flags = IORESOURCE_MEM, | |
126 | } | |
127 | }; | |
128 | ||
129 | static struct plat_serial8250_port nas100d_uart_data[] = { | |
130 | { | |
131 | .mapbase = IXP4XX_UART1_BASE_PHYS, | |
132 | .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, | |
133 | .irq = IRQ_IXP4XX_UART1, | |
134 | .flags = UPF_BOOT_AUTOCONF, | |
135 | .iotype = UPIO_MEM, | |
136 | .regshift = 2, | |
137 | .uartclk = IXP4XX_UART_XTAL, | |
138 | }, | |
139 | { | |
140 | .mapbase = IXP4XX_UART2_BASE_PHYS, | |
141 | .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, | |
142 | .irq = IRQ_IXP4XX_UART2, | |
143 | .flags = UPF_BOOT_AUTOCONF, | |
144 | .iotype = UPIO_MEM, | |
145 | .regshift = 2, | |
146 | .uartclk = IXP4XX_UART_XTAL, | |
147 | }, | |
148 | { } | |
149 | }; | |
150 | ||
151 | static struct platform_device nas100d_uart = { | |
152 | .name = "serial8250", | |
153 | .id = PLAT8250_DEV_PLATFORM, | |
154 | .dev.platform_data = nas100d_uart_data, | |
155 | .num_resources = 2, | |
156 | .resource = nas100d_uart_resources, | |
157 | }; | |
158 | ||
b7edc84a RW |
159 | /* Built-in 10/100 Ethernet MAC interfaces */ |
160 | static struct eth_plat_info nas100d_plat_eth[] = { | |
161 | { | |
162 | .phy = 0, | |
163 | .rxq = 3, | |
164 | .txreadyq = 20, | |
165 | } | |
166 | }; | |
167 | ||
168 | static struct platform_device nas100d_eth[] = { | |
169 | { | |
170 | .name = "ixp4xx_eth", | |
171 | .id = IXP4XX_ETH_NPEB, | |
172 | .dev.platform_data = nas100d_plat_eth, | |
173 | } | |
174 | }; | |
175 | ||
3145d8a6 | 176 | static struct platform_device *nas100d_devices[] __initdata = { |
5a4a2387 | 177 | &nas100d_i2c_gpio, |
3145d8a6 | 178 | &nas100d_flash, |
df6934b3 | 179 | &nas100d_leds, |
b7edc84a | 180 | &nas100d_eth[0], |
3145d8a6 RW |
181 | }; |
182 | ||
183 | static void nas100d_power_off(void) | |
184 | { | |
185 | /* This causes the box to drop the power and go dead. */ | |
186 | ||
187 | /* enable the pwr cntl gpio */ | |
188 | gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT); | |
189 | ||
190 | /* do the deed */ | |
191 | gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH); | |
192 | } | |
193 | ||
c7d1623e RW |
194 | /* This is used to make sure the power-button pusher is serious. The button |
195 | * must be held until the value of this counter reaches zero. | |
196 | */ | |
197 | static int power_button_countdown; | |
198 | ||
199 | /* Must hold the button down for at least this many counts to be processed */ | |
200 | #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */ | |
201 | ||
202 | static void nas100d_power_handler(unsigned long data); | |
203 | static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler, 0, 0); | |
204 | ||
205 | static void nas100d_power_handler(unsigned long data) | |
206 | { | |
207 | /* This routine is called twice per second to check the | |
208 | * state of the power button. | |
209 | */ | |
210 | ||
211 | if (gpio_get_value(NAS100D_PB_GPIO)) { | |
212 | ||
213 | /* IO Pin is 1 (button pushed) */ | |
214 | if (power_button_countdown > 0) | |
215 | power_button_countdown--; | |
216 | ||
217 | } else { | |
218 | ||
219 | /* Done on button release, to allow for auto-power-on mods. */ | |
220 | if (power_button_countdown == 0) { | |
221 | /* Signal init to do the ctrlaltdel action, | |
222 | * this will bypass init if it hasn't started | |
223 | * and do a kernel_restart. | |
224 | */ | |
225 | ctrl_alt_del(); | |
226 | ||
227 | /* Change the state of the power LED to "blink" */ | |
228 | gpio_line_set(NAS100D_LED_PWR_GPIO, IXP4XX_GPIO_LOW); | |
229 | } else { | |
230 | power_button_countdown = PBUTTON_HOLDDOWN_COUNT; | |
231 | } | |
232 | } | |
233 | ||
234 | mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500)); | |
235 | } | |
236 | ||
237 | static irqreturn_t nas100d_reset_handler(int irq, void *dev_id) | |
238 | { | |
239 | /* This is the paper-clip reset, it shuts the machine down directly. */ | |
240 | machine_power_off(); | |
241 | ||
242 | return IRQ_HANDLED; | |
243 | } | |
244 | ||
3145d8a6 RW |
245 | static void __init nas100d_init(void) |
246 | { | |
b7edc84a RW |
247 | uint8_t __iomem *f; |
248 | int i; | |
249 | ||
3145d8a6 RW |
250 | ixp4xx_sys_init(); |
251 | ||
dcc8fa50 AZ |
252 | /* gpio 14 and 15 are _not_ clocks */ |
253 | *IXP4XX_GPIO_GPCLKR = 0; | |
254 | ||
54e269ea DS |
255 | nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
256 | nas100d_flash_resource.end = | |
257 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; | |
258 | ||
400d8231 RW |
259 | i2c_register_board_info(0, nas100d_i2c_board_info, |
260 | ARRAY_SIZE(nas100d_i2c_board_info)); | |
261 | ||
cc50a0df MLJ |
262 | /* |
263 | * This is only useful on a modified machine, but it is valuable | |
df6934b3 RW |
264 | * to have it first in order to see debug messages, and so that |
265 | * it does *not* get removed if platform_add_devices fails! | |
266 | */ | |
267 | (void)platform_device_register(&nas100d_uart); | |
268 | ||
3145d8a6 | 269 | platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices)); |
b7edc84a | 270 | |
c7d1623e RW |
271 | pm_power_off = nas100d_power_off; |
272 | ||
273 | if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler, | |
274 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | |
275 | "NAS100D reset button", NULL) < 0) { | |
276 | ||
277 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | |
278 | gpio_to_irq(NAS100D_RB_GPIO)); | |
279 | } | |
280 | ||
281 | /* The power button on the Iomega NAS100d is on GPIO 14, but | |
282 | * it cannot handle interrupts on that GPIO line. So we'll | |
283 | * have to poll it with a kernel timer. | |
284 | */ | |
285 | ||
286 | /* Make sure that the power button GPIO is set up as an input */ | |
287 | gpio_line_config(NAS100D_PB_GPIO, IXP4XX_GPIO_IN); | |
288 | ||
289 | /* Set the initial value for the power button IRQ handler */ | |
290 | power_button_countdown = PBUTTON_HOLDDOWN_COUNT; | |
291 | ||
292 | mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500)); | |
293 | ||
b7edc84a RW |
294 | /* |
295 | * Map in a portion of the flash and read the MAC address. | |
296 | * Since it is stored in BE in the flash itself, we need to | |
297 | * byteswap it if we're in LE mode. | |
298 | */ | |
299 | f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000); | |
300 | if (f) { | |
301 | for (i = 0; i < 6; i++) | |
302 | #ifdef __ARMEB__ | |
303 | nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i); | |
304 | #else | |
305 | nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3)); | |
306 | #endif | |
307 | iounmap(f); | |
308 | } | |
e174961c JB |
309 | printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n", |
310 | nas100d_plat_eth[0].hwaddr); | |
b7edc84a | 311 | |
3145d8a6 RW |
312 | } |
313 | ||
314 | MACHINE_START(NAS100D, "Iomega NAS 100d") | |
315 | /* Maintainer: www.nslu2-linux.org */ | |
e022c729 | 316 | .atag_offset = 0x100, |
3145d8a6 | 317 | .map_io = ixp4xx_map_io, |
f449588c | 318 | .init_early = ixp4xx_init_early, |
3145d8a6 | 319 | .init_irq = ixp4xx_init_irq, |
6bb27d73 | 320 | .init_time = ixp4xx_timer_init, |
3145d8a6 | 321 | .init_machine = nas100d_init, |
7553ee77 NP |
322 | #if defined(CONFIG_PCI) |
323 | .dma_zone_size = SZ_64M, | |
324 | #endif | |
d1b860fb | 325 | .restart = ixp4xx_restart, |
3145d8a6 | 326 | MACHINE_END |