[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / arch / arm / mach-imx / time.c

/*
 *  linux/arch/arm/mach-imx/time.c
 *
 *  Copyright (C) 2000-2001 Deep Blue Solutions
 *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
 *  Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/time.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/mach/time.h>

/* Use timer 1 as system timer */
#define TIMER_BASE IMX_TIM1_BASE

static struct clock_event_device clockevent_imx;
static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;

/*
 * IRQ handler for the timer
 */
static irqreturn_t
imx_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = &clockevent_imx;
	uint32_t tstat;
	irqreturn_t ret = IRQ_NONE;

	/* clear the interrupt */
	tstat = IMX_TSTAT(TIMER_BASE);
	IMX_TSTAT(TIMER_BASE) = 0;

	if (tstat & TSTAT_COMP) {
		evt->event_handler(evt);
		ret = IRQ_HANDLED;
	}

	return ret;
}

static struct irqaction imx_timer_irq = {
	.name		= "i.MX Timer Tick",
	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
	.handler	= imx_timer_interrupt,
};

/*
 * Set up timer hardware into expected mode and state.
 */
static void __init imx_timer_hardware_init(void)
{
	/*
	 * Initialise to a known state (all timers off, and timing reset)
	 */
	IMX_TCTL(TIMER_BASE) = 0;
	IMX_TPRER(TIMER_BASE) = 0;

	IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_TEN;
}

cycle_t imx_get_cycles(void)
{
	return IMX_TCN(TIMER_BASE);
}

static struct clocksource clocksource_imx = {
	.name 		= "imx_timer1",
	.rating		= 200,
	.read		= imx_get_cycles,
	.mask		= 0xFFFFFFFF,
	.shift 		= 20,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

static int __init imx_clocksource_init(void)
{
	clocksource_imx.mult =
		clocksource_hz2mult(imx_get_perclk1(), clocksource_imx.shift);
	clocksource_register(&clocksource_imx);

	return 0;
}

static int imx_set_next_event(unsigned long evt,
				  struct clock_event_device *unused)
{
	unsigned long tcmp;

	tcmp = IMX_TCN(TIMER_BASE) + evt;
	IMX_TCMP(TIMER_BASE) = tcmp;

	return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0;
}

#ifdef DEBUG
static const char *clock_event_mode_label[]={
	[CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC",
	[CLOCK_EVT_MODE_ONESHOT]  = "CLOCK_EVT_MODE_ONESHOT",
	[CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN",
	[CLOCK_EVT_MODE_UNUSED]   = "CLOCK_EVT_MODE_UNUSED"
};
#endif /*DEBUG*/

static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
{
	unsigned long flags;

	/*
	 * The timer interrupt generation is disabled at least
	 * for enough time to call imx_set_next_event()
	 */
	local_irq_save(flags);
	/* Disable interrupt in GPT module */
	IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN;
	if (mode != clockevent_mode) {
		/* Set event time into far-far future */
		IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3;
		/* Clear pending interrupt */
		IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP;
	}

#ifdef DEBUG
	printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n",
		clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]);
#endif /*DEBUG*/

	/* Remember timer mode */
	clockevent_mode = mode;
	local_irq_restore(flags);

	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n");
		break;
	case CLOCK_EVT_MODE_ONESHOT:
		/*
		 * Do not put overhead of interrupt enable/disable into
		 * imx_set_next_event(), the core has about 4 minutes
		 * to call imx_set_next_event() or shutdown clock after
		 * mode switching
		 */
		local_irq_save(flags);
		IMX_TCTL(TIMER_BASE) |= TCTL_IRQEN;
		local_irq_restore(flags);
		break;
	case CLOCK_EVT_MODE_SHUTDOWN:
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_RESUME:
		/* Left event sources disabled, no more interrupts appears */
		break;
	}
}

static struct clock_event_device clockevent_imx = {
	.name		= "imx_timer1",
	.features	= CLOCK_EVT_FEAT_ONESHOT,
	.shift		= 32,
	.set_mode	= imx_set_mode,
	.set_next_event	= imx_set_next_event,
	.rating		= 200,
};

static int __init imx_clockevent_init(void)
{
	clockevent_imx.mult = div_sc(imx_get_perclk1(), NSEC_PER_SEC,
					clockevent_imx.shift);
	clockevent_imx.max_delta_ns =
		clockevent_delta2ns(0xfffffffe, &clockevent_imx);
	clockevent_imx.min_delta_ns =
		clockevent_delta2ns(0xf, &clockevent_imx);

	clockevent_imx.cpumask = cpumask_of_cpu(0);

	clockevents_register_device(&clockevent_imx);

	return 0;
}


static void __init imx_timer_init(void)
{
	imx_timer_hardware_init();
	imx_clocksource_init();

	imx_clockevent_init();

	/*
	 * Make irqs happen for the system timer
	 */
	setup_irq(TIM1_INT, &imx_timer_irq);
}

struct sys_timer imx_timer = {
	.init		= imx_timer_init,
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-imx/time.c
	3	*
	4	* Copyright (C) 2000-2001 Deep Blue Solutions
	5	* Copyright (C) 2002 Shane Nay (shane@minirl.com)
89bba435	6	* Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)
1da177e4 LT	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
1da177e4 LT	12	#include <linux/kernel.h>
	13	#include <linux/sched.h>
	14	#include <linux/init.h>
	15	#include <linux/interrupt.h>
a6284acb	16	#include <linux/irq.h>
1da177e4	17	#include <linux/time.h>
86987d5b	18	#include <linux/clocksource.h>
89bba435	19	#include <linux/clockchips.h>
1da177e4 LT	20
	21	#include <asm/hardware.h>
	22	#include <asm/io.h>
	23	#include <asm/leds.h>
	24	#include <asm/irq.h>
	25	#include <asm/mach/time.h>
	26
	27	/* Use timer 1 as system timer */
	28	#define TIMER_BASE IMX_TIM1_BASE
	29
89bba435 PP	30	static struct clock_event_device clockevent_imx;
89bba435 PP	31	static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
1da177e4 LT	32
	33	/*
	34	* IRQ handler for the timer
	35	*/
	36	static irqreturn_t
0cd61b68	37	imx_timer_interrupt(int irq, void *dev_id)
1da177e4	38	{
89bba435	39	struct clock_event_device *evt = &clockevent_imx;
86987d5b	40	uint32_t tstat;
89bba435	41	irqreturn_t ret = IRQ_NONE;
1da177e4 LT	42
1da177e4 LT	43	/* clear the interrupt */
86987d5b PP	44	tstat = IMX_TSTAT(TIMER_BASE);
	45	IMX_TSTAT(TIMER_BASE) = 0;
	46
	47	if (tstat & TSTAT_COMP) {
89bba435 PP	48	evt->event_handler(evt);
89bba435 PP	49	ret = IRQ_HANDLED;
86987d5b	50	}
1da177e4	51
89bba435	52	return ret;
1da177e4 LT	53	}
	54
	55	static struct irqaction imx_timer_irq = {
	56	.name = "i.MX Timer Tick",
b30fabad	57	.flags = IRQF_DISABLED \| IRQF_TIMER \| IRQF_IRQPOLL,
09b8b5f8	58	.handler = imx_timer_interrupt,
1da177e4 LT	59	};
	60
	61	/*
86987d5b	62	* Set up timer hardware into expected mode and state.
1da177e4	63	*/
86987d5b	64	static void __init imx_timer_hardware_init(void)
1da177e4 LT	65	{
	66	/*
	67	* Initialise to a known state (all timers off, and timing reset)
	68	*/
	69	IMX_TCTL(TIMER_BASE) = 0;
	70	IMX_TPRER(TIMER_BASE) = 0;
86987d5b	71
89bba435	72	IMX_TCTL(TIMER_BASE) = TCTL_FRR \| TCTL_CLK_PCLK1 \| TCTL_TEN;
86987d5b PP	73	}
	74
	75	cycle_t imx_get_cycles(void)
	76	{
	77	return IMX_TCN(TIMER_BASE);
	78	}
	79
	80	static struct clocksource clocksource_imx = {
	81	.name = "imx_timer1",
	82	.rating = 200,
	83	.read = imx_get_cycles,
	84	.mask = 0xFFFFFFFF,
	85	.shift = 20,
c66699a7	86	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
86987d5b PP	87	};
	88
	89	static int __init imx_clocksource_init(void)
	90	{
	91	clocksource_imx.mult =
	92	clocksource_hz2mult(imx_get_perclk1(), clocksource_imx.shift);
	93	clocksource_register(&clocksource_imx);
	94
	95	return 0;
	96	}
	97
89bba435 PP	98	static int imx_set_next_event(unsigned long evt,
	99	struct clock_event_device *unused)
	100	{
	101	unsigned long tcmp;
	102
	103	tcmp = IMX_TCN(TIMER_BASE) + evt;
	104	IMX_TCMP(TIMER_BASE) = tcmp;
	105
	106	return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0;
	107	}
	108
	109	#ifdef DEBUG
	110	static const char *clock_event_mode_label[]={
	111	[CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC",
	112	[CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT",
	113	[CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN",
	114	[CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED"
	115	};
	116	#endif /DEBUG/
	117
	118	static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
	119	{
	120	unsigned long flags;
	121
	122	/*
	123	* The timer interrupt generation is disabled at least
	124	* for enough time to call imx_set_next_event()
	125	*/
	126	local_irq_save(flags);
	127	/* Disable interrupt in GPT module */
	128	IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN;
	129	if (mode != clockevent_mode) {
	130	/* Set event time into far-far future */
	131	IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3;
	132	/* Clear pending interrupt */
	133	IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP;
	134	}
	135
	136	#ifdef DEBUG
	137	printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n",
	138	clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]);
	139	#endif /DEBUG/
	140
	141	/* Remember timer mode */
	142	clockevent_mode = mode;
	143	local_irq_restore(flags);
	144
	145	switch (mode) {
	146	case CLOCK_EVT_MODE_PERIODIC:
	147	printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n");
	148	break;
	149	case CLOCK_EVT_MODE_ONESHOT:
	150	/*
	151	* Do not put overhead of interrupt enable/disable into
	152	* imx_set_next_event(), the core has about 4 minutes
	153	* to call imx_set_next_event() or shutdown clock after
	154	* mode switching
	155	*/
	156	local_irq_save(flags);
	157	IMX_TCTL(TIMER_BASE) \|= TCTL_IRQEN;
	158	local_irq_restore(flags);
	159	break;
	160	case CLOCK_EVT_MODE_SHUTDOWN:
	161	case CLOCK_EVT_MODE_UNUSED:
18de5bc4	162	case CLOCK_EVT_MODE_RESUME:
89bba435 PP	163	/* Left event sources disabled, no more interrupts appears */
	164	break;
	165	}
	166	}
	167
	168	static struct clock_event_device clockevent_imx = {
	169	.name = "imx_timer1",
	170	.features = CLOCK_EVT_FEAT_ONESHOT,
	171	.shift = 32,
	172	.set_mode = imx_set_mode,
	173	.set_next_event = imx_set_next_event,
	174	.rating = 200,
	175	};
	176
	177	static int __init imx_clockevent_init(void)
	178	{
	179	clockevent_imx.mult = div_sc(imx_get_perclk1(), NSEC_PER_SEC,
	180	clockevent_imx.shift);
	181	clockevent_imx.max_delta_ns =
	182	clockevent_delta2ns(0xfffffffe, &clockevent_imx);
	183	clockevent_imx.min_delta_ns =
	184	clockevent_delta2ns(0xf, &clockevent_imx);
	185
	186	clockevent_imx.cpumask = cpumask_of_cpu(0);
	187
	188	clockevents_register_device(&clockevent_imx);
	189
	190	return 0;
	191	}
	192
	193
86987d5b PP	194	static void __init imx_timer_init(void)
	195	{
	196	imx_timer_hardware_init();
	197	imx_clocksource_init();
1da177e4	198
89bba435 PP	199	imx_clockevent_init();
89bba435 PP	200
1da177e4 LT	201	/*
	202	* Make irqs happen for the system timer
	203	*/
	204	setup_irq(TIM1_INT, &imx_timer_irq);
	205	}
	206
	207	struct sys_timer imx_timer = {
	208	.init = imx_timer_init,
1da177e4	209	};