[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-imx / generic.c

/*
 *  arch/arm/mach-imx/generic.c
 *
 *  author: Sascha Hauer
 *  Created: april 20th, 2004
 *  Copyright: Synertronixx GmbH
 *
 *  Common code for i.MX machines
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>

#include <asm/errno.h>
#include <asm/arch/imxfb.h>
#include <asm/hardware.h>
#include <asm/arch/imx-regs.h>

#include <asm/mach/map.h>
#include <asm/arch/mmc.h>
#include <asm/arch/gpio.h>

unsigned long imx_gpio_alloc_map[(GPIO_PORT_MAX + 1) * 32 / BITS_PER_LONG];

void imx_gpio_mode(int gpio_mode)
{
	unsigned int pin = gpio_mode & GPIO_PIN_MASK;
	unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
	unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
	unsigned int tmp;

	/* Pullup enable */
	if(gpio_mode & GPIO_PUEN)
		PUEN(port) |= (1<<pin);
	else
		PUEN(port) &= ~(1<<pin);

	/* Data direction */
	if(gpio_mode & GPIO_OUT)
		DDIR(port) |= 1<<pin;
	else
		DDIR(port) &= ~(1<<pin);

	/* Primary / alternate function */
	if(gpio_mode & GPIO_AF)
		GPR(port) |= (1<<pin);
	else
		GPR(port) &= ~(1<<pin);

	/* use as gpio? */
	if(gpio_mode &  GPIO_GIUS)
		GIUS(port) |= (1<<pin);
	else
		GIUS(port) &= ~(1<<pin);

	/* Output / input configuration */
	/* FIXME: I'm not very sure about OCR and ICONF, someone
	 * should have a look over it
	 */
	if(pin<16) {
		tmp = OCR1(port);
		tmp &= ~( 3<<(pin*2));
		tmp |= (ocr << (pin*2));
		OCR1(port) = tmp;

		ICONFA1(port) &= ~( 3<<(pin*2));
		ICONFA1(port) |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
		ICONFB1(port) &= ~( 3<<(pin*2));
		ICONFB1(port) |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
	} else {
		tmp = OCR2(port);
		tmp &= ~( 3<<((pin-16)*2));
		tmp |= (ocr << ((pin-16)*2));
		OCR2(port) = tmp;

		ICONFA2(port) &= ~( 3<<((pin-16)*2));
		ICONFA2(port) |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << ((pin-16) * 2);
		ICONFB2(port) &= ~( 3<<((pin-16)*2));
		ICONFB2(port) |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << ((pin-16) * 2);
	}
}

EXPORT_SYMBOL(imx_gpio_mode);

int imx_gpio_request(unsigned gpio, const char *label)
{
	if(gpio >= (GPIO_PORT_MAX + 1) * 32)
		printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n",
			gpio, label ? label : "?");
		return -EINVAL;

	if(test_and_set_bit(gpio, imx_gpio_alloc_map)) {
		printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n",
			gpio, label ? label : "?");
		return -EBUSY;
	}

	return 0;
}

EXPORT_SYMBOL(imx_gpio_request);

void imx_gpio_free(unsigned gpio)
{
	if(gpio >= (GPIO_PORT_MAX + 1) * 32)
		return;

	clear_bit(gpio, imx_gpio_alloc_map);
}

EXPORT_SYMBOL(imx_gpio_free);

int imx_gpio_direction_input(unsigned gpio)
{
	imx_gpio_mode(gpio| GPIO_IN);
	return 0;
}

EXPORT_SYMBOL(imx_gpio_direction_input);

int imx_gpio_direction_output(unsigned gpio, int value)
{
	imx_gpio_set_value(gpio, value);
	imx_gpio_mode(gpio| GPIO_OUT);
	return 0;
}

EXPORT_SYMBOL(imx_gpio_direction_output);

int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
				int alloc_mode, const char *label)
{
	const int *p = pin_list;
	int i;
	unsigned gpio;
	unsigned mode;

	for (i = 0; i < count; i++) {
		gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
		mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);

		if (gpio >= (GPIO_PORT_MAX + 1) * 32)
			goto setup_error;

		if (alloc_mode & IMX_GPIO_ALLOC_MODE_RELEASE)
			imx_gpio_free(gpio);
		else if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_NO_ALLOC))
			if (imx_gpio_request(gpio, label))
				if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_TRY_ALLOC))
					goto setup_error;

		if (!(alloc_mode & (IMX_GPIO_ALLOC_MODE_ALLOC_ONLY |
				    IMX_GPIO_ALLOC_MODE_RELEASE)))
			imx_gpio_mode(gpio | mode);

		p++;
	}
	return 0;

setup_error:
	if(alloc_mode & (IMX_GPIO_ALLOC_MODE_NO_ALLOC |
		         IMX_GPIO_ALLOC_MODE_TRY_ALLOC))
		return -EINVAL;

	while (p != pin_list) {
		p--;
		gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
		imx_gpio_free(gpio);
	}

	return -EINVAL;
}

EXPORT_SYMBOL(imx_gpio_setup_multiple_pins);

void __imx_gpio_set_value(unsigned gpio, int value)
{
	imx_gpio_set_value_inline(gpio, value);
}

EXPORT_SYMBOL(__imx_gpio_set_value);

int imx_gpio_to_irq(unsigned gpio)
{
	return IRQ_GPIOA(0) + gpio;
}

EXPORT_SYMBOL(imx_gpio_to_irq);

int imx_irq_to_gpio(unsigned irq)
{
	if (irq < IRQ_GPIOA(0))
		return -EINVAL;
	return irq - IRQ_GPIOA(0);
}

EXPORT_SYMBOL(imx_irq_to_gpio);

/*
 *  get the system pll clock in Hz
 *
 *                  mfi + mfn / (mfd +1)
 *  f = 2 * f_ref * --------------------
 *                        pd + 1
 */
static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
{
	unsigned long long ll;
	unsigned long quot;

	u32 mfi = (pll >> 10) & 0xf;
	u32 mfn = pll & 0x3ff;
	u32 mfd = (pll >> 16) & 0x3ff;
	u32 pd =  (pll >> 26) & 0xf;

	mfi = mfi <= 5 ? 5 : mfi;

	ll = 2 * (unsigned long long)f_ref * ( (mfi<<16) + (mfn<<16) / (mfd+1) );
	quot = (pd+1) * (1<<16);
	ll += quot / 2;
	do_div(ll, quot);
	return (unsigned int) ll;
}

unsigned int imx_get_system_clk(void)
{
	u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);

	return imx_decode_pll(SPCTL0, f_ref);
}
EXPORT_SYMBOL(imx_get_system_clk);

unsigned int imx_get_mcu_clk(void)
{
	return imx_decode_pll(MPCTL0, CLK32 * 512);
}
EXPORT_SYMBOL(imx_get_mcu_clk);

/*
 *  get peripheral clock 1 ( UART[12], Timer[12], PWM )
 */
unsigned int imx_get_perclk1(void)
{
	return imx_get_system_clk() / (((PCDR) & 0xf)+1);
}
EXPORT_SYMBOL(imx_get_perclk1);

/*
 *  get peripheral clock 2 ( LCD, SD, SPI[12] )
 */
unsigned int imx_get_perclk2(void)
{
	return imx_get_system_clk() / (((PCDR>>4) & 0xf)+1);
}
EXPORT_SYMBOL(imx_get_perclk2);

/*
 *  get peripheral clock 3 ( SSI )
 */
unsigned int imx_get_perclk3(void)
{
	return imx_get_system_clk() / (((PCDR>>16) & 0x7f)+1);
}
EXPORT_SYMBOL(imx_get_perclk3);

/*
 *  get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )
 */
unsigned int imx_get_hclk(void)
{
	return imx_get_system_clk() / (((CSCR>>10) & 0xf)+1);
}
EXPORT_SYMBOL(imx_get_hclk);

static struct resource imx_mmc_resources[] = {
	[0] = {
		.start	= 0x00214000,
		.end	= 0x002140FF,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= (SDHC_INT),
		.end	= (SDHC_INT),
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 imxmmmc_dmamask = 0xffffffffUL;

static struct platform_device imx_mmc_device = {
	.name		= "imx-mmc",
	.id		= 0,
	.dev		= {
		.dma_mask = &imxmmmc_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(imx_mmc_resources),
	.resource	= imx_mmc_resources,
};

void __init imx_set_mmc_info(struct imxmmc_platform_data *info)
{
	imx_mmc_device.dev.platform_data = info;
}

static struct imxfb_mach_info imx_fb_info;

void __init set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info)
{
	memcpy(&imx_fb_info,hard_imx_fb_info,sizeof(struct imxfb_mach_info));
}
EXPORT_SYMBOL(set_imx_fb_info);

static struct resource imxfb_resources[] = {
	[0] = {
		.start	= 0x00205000,
		.end	= 0x002050FF,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= LCDC_INT,
		.end	= LCDC_INT,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

static struct platform_device imxfb_device = {
	.name		= "imx-fb",
	.id		= 0,
	.dev		= {
 		.platform_data	= &imx_fb_info,
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(imxfb_resources),
	.resource	= imxfb_resources,
};

static struct platform_device *devices[] __initdata = {
	&imx_mmc_device,
	&imxfb_device,
};

static struct map_desc imx_io_desc[] __initdata = {
	{
		.virtual	= IMX_IO_BASE,
		.pfn		= __phys_to_pfn(IMX_IO_PHYS),
		.length		= IMX_IO_SIZE,
		.type		= MT_DEVICE
	}
};

void __init
imx_map_io(void)
{
	iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
}

static int __init imx_init(void)
{
	return platform_add_devices(devices, ARRAY_SIZE(devices));
}

subsys_initcall(imx_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* arch/arm/mach-imx/generic.c
	3	*
	4	* author: Sascha Hauer
	5	* Created: april 20th, 2004
	6	* Copyright: Synertronixx GmbH
	7	*
	8	* Common code for i.MX machines
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	23	*
	24	*/
d052d1be	25	#include <linux/platform_device.h>
1da177e4 LT	26	#include <linux/init.h>
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
4e57b681 TS	29	#include <linux/string.h>
4e57b681 TS	30
b3e6a508	31	#include <asm/errno.h>
a493820d	32	#include <asm/arch/imxfb.h>
1da177e4	33	#include <asm/hardware.h>
0a5b0aa8	34	#include <asm/arch/imx-regs.h>
1da177e4 LT	35
1da177e4 LT	36	#include <asm/mach/map.h>
56ca9040	37	#include <asm/arch/mmc.h>
b3e6a508 PP	38	#include <asm/arch/gpio.h>
	39
	40	unsigned long imx_gpio_alloc_map[(GPIO_PORT_MAX + 1) * 32 / BITS_PER_LONG];
1da177e4 LT	41
	42	void imx_gpio_mode(int gpio_mode)
	43	{
	44	unsigned int pin = gpio_mode & GPIO_PIN_MASK;
0a5b0aa8 SH	45	unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
0a5b0aa8 SH	46	unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
1da177e4 LT	47	unsigned int tmp;
	48
	49	/* Pullup enable */
	50	if(gpio_mode & GPIO_PUEN)
	51	PUEN(port) \|= (1<<pin);
	52	else
	53	PUEN(port) &= ~(1<<pin);
	54
	55	/* Data direction */
	56	if(gpio_mode & GPIO_OUT)
	57	DDIR(port) \|= 1<<pin;
	58	else
	59	DDIR(port) &= ~(1<<pin);
	60
	61	/* Primary / alternate function */
	62	if(gpio_mode & GPIO_AF)
	63	GPR(port) \|= (1<<pin);
	64	else
	65	GPR(port) &= ~(1<<pin);
	66
	67	/* use as gpio? */
0a5b0aa8	68	if(gpio_mode & GPIO_GIUS)
1da177e4 LT	69	GIUS(port) \|= (1<<pin);
	70	else
	71	GIUS(port) &= ~(1<<pin);
	72
	73	/* Output / input configuration */
	74	/* FIXME: I'm not very sure about OCR and ICONF, someone
	75	* should have a look over it
	76	*/
	77	if(pin<16) {
	78	tmp = OCR1(port);
	79	tmp &= ~( 3<<(pin*2));
	80	tmp \|= (ocr << (pin*2));
	81	OCR1(port) = tmp;
	82
0a5b0aa8 SH	83	ICONFA1(port) &= ~( 3<<(pin*2));
	84	ICONFA1(port) \|= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
	85	ICONFB1(port) &= ~( 3<<(pin*2));
	86	ICONFB1(port) \|= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
1da177e4 LT	87	} else {
	88	tmp = OCR2(port);
	89	tmp &= ~( 3<<((pin-16)*2));
	90	tmp \|= (ocr << ((pin-16)*2));
	91	OCR2(port) = tmp;
	92
0a5b0aa8 SH	93	ICONFA2(port) &= ~( 3<<((pin-16)*2));
	94	ICONFA2(port) \|= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << ((pin-16) * 2);
	95	ICONFB2(port) &= ~( 3<<((pin-16)*2));
	96	ICONFB2(port) \|= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << ((pin-16) * 2);
1da177e4 LT	97	}
	98	}
	99
	100	EXPORT_SYMBOL(imx_gpio_mode);
	101
b3e6a508 PP	102	int imx_gpio_request(unsigned gpio, const char *label)
	103	{
	104	if(gpio >= (GPIO_PORT_MAX + 1) * 32)
	105	printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n",
	106	gpio, label ? label : "?");
	107	return -EINVAL;
	108
	109	if(test_and_set_bit(gpio, imx_gpio_alloc_map)) {
	110	printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n",
	111	gpio, label ? label : "?");
	112	return -EBUSY;
	113	}
	114
	115	return 0;
	116	}
	117
	118	EXPORT_SYMBOL(imx_gpio_request);
	119
	120	void imx_gpio_free(unsigned gpio)
	121	{
	122	if(gpio >= (GPIO_PORT_MAX + 1) * 32)
	123	return;
	124
	125	clear_bit(gpio, imx_gpio_alloc_map);
	126	}
	127
	128	EXPORT_SYMBOL(imx_gpio_free);
	129
	130	int imx_gpio_direction_input(unsigned gpio)
	131	{
	132	imx_gpio_mode(gpio\| GPIO_IN);
	133	return 0;
	134	}
	135
	136	EXPORT_SYMBOL(imx_gpio_direction_input);
	137
	138	int imx_gpio_direction_output(unsigned gpio, int value)
	139	{
	140	imx_gpio_set_value(gpio, value);
	141	imx_gpio_mode(gpio\| GPIO_OUT);
	142	return 0;
	143	}
	144
	145	EXPORT_SYMBOL(imx_gpio_direction_output);
	146
	147	int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
	148	int alloc_mode, const char *label)
	149	{
	150	const int *p = pin_list;
	151	int i;
	152	unsigned gpio;
	153	unsigned mode;
	154
	155	for (i = 0; i < count; i++) {
	156	gpio = *p & (GPIO_PIN_MASK \| GPIO_PORT_MASK);
	157	mode = *p & ~(GPIO_PIN_MASK \| GPIO_PORT_MASK);
	158
	159	if (gpio >= (GPIO_PORT_MAX + 1) * 32)
	160	goto setup_error;
	161
	162	if (alloc_mode & IMX_GPIO_ALLOC_MODE_RELEASE)
	163	imx_gpio_free(gpio);
	164	else if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_NO_ALLOC))
	165	if (imx_gpio_request(gpio, label))
166	if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_TRY_ALLOC))
167	goto setup_error;
168
169	if (!(alloc_mode & (IMX_GPIO_ALLOC_MODE_ALLOC_ONLY \|
170	IMX_GPIO_ALLOC_MODE_RELEASE)))
171	imx_gpio_mode(gpio \| mode);
172
173	p++;
174	}
175	return 0;
176
177	setup_error:
178	if(alloc_mode & (IMX_GPIO_ALLOC_MODE_NO_ALLOC \|
179	IMX_GPIO_ALLOC_MODE_TRY_ALLOC))
180	return -EINVAL;
181
182	while (p != pin_list) {
183	p--;
184	gpio = *p & (GPIO_PIN_MASK \| GPIO_PORT_MASK);
185	imx_gpio_free(gpio);
186	}
187
188	return -EINVAL;
189	}
190
191	EXPORT_SYMBOL(imx_gpio_setup_multiple_pins);
192
193	void __imx_gpio_set_value(unsigned gpio, int value)
194	{
195	imx_gpio_set_value_inline(gpio, value);
196	}
197
198	EXPORT_SYMBOL(__imx_gpio_set_value);
199
200	int imx_gpio_to_irq(unsigned gpio)
201	{
202	return IRQ_GPIOA(0) + gpio;
203	}
204
205	EXPORT_SYMBOL(imx_gpio_to_irq);
206
207	int imx_irq_to_gpio(unsigned irq)
208	{
209	if (irq < IRQ_GPIOA(0))
210	return -EINVAL;
211	return irq - IRQ_GPIOA(0);
212	}
213
214	EXPORT_SYMBOL(imx_irq_to_gpio);
215
1da177e4 LT	216	/*
	217	* get the system pll clock in Hz
	218	*
	219	* mfi + mfn / (mfd +1)
	220	* f = 2 * f_ref * --------------------
	221	* pd + 1
	222	*/
b3c6b76f	223	static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
1da177e4	224	{
5c894cd1 PP	225	unsigned long long ll;
	226	unsigned long quot;
	227
1da177e4 LT	228	u32 mfi = (pll >> 10) & 0xf;
	229	u32 mfn = pll & 0x3ff;
	230	u32 mfd = (pll >> 16) & 0x3ff;
	231	u32 pd = (pll >> 26) & 0xf;
1da177e4 LT	232
	233	mfi = mfi <= 5 ? 5 : mfi;
	234
5c894cd1 PP	235	ll = 2 * (unsigned long long)f_ref * ( (mfi<<16) + (mfn<<16) / (mfd+1) );
	236	quot = (pd+1) * (1<<16);
	237	ll += quot / 2;
	238	do_div(ll, quot);
	239	return (unsigned int) ll;
1da177e4 LT	240	}
	241
	242	unsigned int imx_get_system_clk(void)
	243	{
b3c6b76f PP	244	u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
	245
	246	return imx_decode_pll(SPCTL0, f_ref);
1da177e4 LT	247	}
	248	EXPORT_SYMBOL(imx_get_system_clk);
	249
	250	unsigned int imx_get_mcu_clk(void)
	251	{
b3c6b76f	252	return imx_decode_pll(MPCTL0, CLK32 * 512);
1da177e4 LT	253	}
	254	EXPORT_SYMBOL(imx_get_mcu_clk);
	255
	256	/*
	257	* get peripheral clock 1 ( UART[12], Timer[12], PWM )
	258	*/
	259	unsigned int imx_get_perclk1(void)
	260	{
	261	return imx_get_system_clk() / (((PCDR) & 0xf)+1);
	262	}
	263	EXPORT_SYMBOL(imx_get_perclk1);
	264
	265	/*
	266	* get peripheral clock 2 ( LCD, SD, SPI[12] )
	267	*/
	268	unsigned int imx_get_perclk2(void)
	269	{
	270	return imx_get_system_clk() / (((PCDR>>4) & 0xf)+1);
	271	}
	272	EXPORT_SYMBOL(imx_get_perclk2);
	273
	274	/*
	275	* get peripheral clock 3 ( SSI )
	276	*/
	277	unsigned int imx_get_perclk3(void)
	278	{
	279	return imx_get_system_clk() / (((PCDR>>16) & 0x7f)+1);
	280	}
	281	EXPORT_SYMBOL(imx_get_perclk3);
	282
	283	/*
	284	* get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )
	285	*/
	286	unsigned int imx_get_hclk(void)
	287	{
	288	return imx_get_system_clk() / (((CSCR>>10) & 0xf)+1);
	289	}
	290	EXPORT_SYMBOL(imx_get_hclk);
	291
	292	static struct resource imx_mmc_resources[] = {
	293	[0] = {
	294	.start = 0x00214000,
	295	.end = 0x002140FF,
	296	.flags = IORESOURCE_MEM,
	297	},
	298	[1] = {
	299	.start = (SDHC_INT),
	300	.end = (SDHC_INT),
	301	.flags = IORESOURCE_IRQ,
	302	},
	303	};
	304
56ca9040 PP	305	static u64 imxmmmc_dmamask = 0xffffffffUL;
56ca9040 PP	306
1da177e4 LT	307	static struct platform_device imx_mmc_device = {
	308	.name = "imx-mmc",
	309	.id = 0,
56ca9040 PP	310	.dev = {
	311	.dma_mask = &imxmmmc_dmamask,
	312	.coherent_dma_mask = 0xffffffff,
	313	},
1da177e4 LT	314	.num_resources = ARRAY_SIZE(imx_mmc_resources),
	315	.resource = imx_mmc_resources,
	316	};
	317
56ca9040 PP	318	void __init imx_set_mmc_info(struct imxmmc_platform_data *info)
	319	{
	320	imx_mmc_device.dev.platform_data = info;
	321	}
56ca9040	322
a493820d SH	323	static struct imxfb_mach_info imx_fb_info;
	324
	325	void __init set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info)
	326	{
	327	memcpy(&imx_fb_info,hard_imx_fb_info,sizeof(struct imxfb_mach_info));
	328	}
	329	EXPORT_SYMBOL(set_imx_fb_info);
	330
1da177e4 LT	331	static struct resource imxfb_resources[] = {
	332	[0] = {
	333	.start = 0x00205000,
	334	.end = 0x002050FF,
	335	.flags = IORESOURCE_MEM,
	336	},
	337	[1] = {
	338	.start = LCDC_INT,
	339	.end = LCDC_INT,
	340	.flags = IORESOURCE_IRQ,
	341	},
	342	};
	343
a493820d SH	344	static u64 fb_dma_mask = ~(u64)0;
a493820d SH	345
1da177e4 LT	346	static struct platform_device imxfb_device = {
	347	.name = "imx-fb",
	348	.id = 0,
a493820d SH	349	.dev = {
	350	.platform_data = &imx_fb_info,
	351	.dma_mask = &fb_dma_mask,
	352	.coherent_dma_mask = 0xffffffff,
	353	},
1da177e4 LT	354	.num_resources = ARRAY_SIZE(imxfb_resources),
	355	.resource = imxfb_resources,
	356	};
	357
	358	static struct platform_device *devices[] __initdata = {
	359	&imx_mmc_device,
	360	&imxfb_device,
1da177e4 LT	361	};
	362
	363	static struct map_desc imx_io_desc[] __initdata = {
adecef74 DS	364	{
	365	.virtual = IMX_IO_BASE,
	366	.pfn = __phys_to_pfn(IMX_IO_PHYS),
	367	.length = IMX_IO_SIZE,
	368	.type = MT_DEVICE
	369	}
1da177e4 LT	370	};
	371
	372	void __init
	373	imx_map_io(void)
	374	{
	375	iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
	376	}
	377
	378	static int __init imx_init(void)
	379	{
	380	return platform_add_devices(devices, ARRAY_SIZE(devices));
	381	}
	382
	383	subsys_initcall(imx_init);