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b3e68fb1 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/of_platform.h> | |
5b7897db | 13 | #include <linux/of_fdt.h> |
b3e68fb1 | 14 | #include <linux/serial_core.h> |
2eae613b | 15 | #include <linux/memblock.h> |
7000fe8c | 16 | #include <linux/io.h> |
b3e68fb1 KK |
17 | |
18 | #include <asm/mach/arch.h> | |
b3e68fb1 | 19 | #include <mach/map.h> |
7000fe8c | 20 | #include <mach/regs-pmu.h> |
b3e68fb1 KK |
21 | |
22 | #include <plat/cpu.h> | |
23 | #include <plat/regs-serial.h> | |
2eae613b | 24 | #include <plat/mfc.h> |
b3e68fb1 KK |
25 | |
26 | #include "common.h" | |
27 | ||
28 | /* | |
29 | * The following lookup table is used to override device names when devices | |
30 | * are registered from device tree. This is temporarily added to enable | |
31 | * device tree support addition for the EXYNOS5 architecture. | |
32 | * | |
33 | * For drivers that require platform data to be provided from the machine | |
34 | * file, a platform data pointer can also be supplied along with the | |
35 | * devices names. Usually, the platform data elements that cannot be parsed | |
36 | * from the device tree by the drivers (example: function pointers) are | |
37 | * supplied. But it should be noted that this is a temporary mechanism and | |
38 | * at some point, the drivers should be capable of parsing all the platform | |
39 | * data from the device tree. | |
40 | */ | |
41 | static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { | |
42 | OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0, | |
43 | "exynos4210-uart.0", NULL), | |
44 | OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1, | |
45 | "exynos4210-uart.1", NULL), | |
46 | OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2, | |
47 | "exynos4210-uart.2", NULL), | |
48 | OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3, | |
49 | "exynos4210-uart.3", NULL), | |
380c3a54 TA |
50 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0), |
51 | "s3c2440-i2c.0", NULL), | |
52 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), | |
53 | "s3c2440-i2c.1", NULL), | |
62a1f83f RS |
54 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2), |
55 | "s3c2440-i2c.2", NULL), | |
f5298e07 OJ |
56 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3), |
57 | "s3c2440-i2c.3", NULL), | |
58 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4), | |
59 | "s3c2440-i2c.4", NULL), | |
60 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5), | |
61 | "s3c2440-i2c.5", NULL), | |
62 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6), | |
63 | "s3c2440-i2c.6", NULL), | |
64 | OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7), | |
65 | "s3c2440-i2c.7", NULL), | |
3e3e9ce4 RS |
66 | OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8), |
67 | "s3c2440-hdmiphy-i2c", NULL), | |
a5c17773 TA |
68 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, |
69 | "dw_mmc.0", NULL), | |
70 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, | |
71 | "dw_mmc.1", NULL), | |
72 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2, | |
73 | "dw_mmc.2", NULL), | |
74 | OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3, | |
75 | "dw_mmc.3", NULL), | |
b0b27815 TA |
76 | OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0, |
77 | "exynos4210-spi.0", NULL), | |
78 | OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1, | |
79 | "exynos4210-spi.1", NULL), | |
80 | OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2, | |
81 | "exynos4210-spi.2", NULL), | |
c47d244a VA |
82 | OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000, |
83 | "exynos5-sata", NULL), | |
84 | OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000, | |
85 | "exynos5-sata-phy", NULL), | |
86 | OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000, | |
87 | "exynos5-sata-phy-i2c", NULL), | |
b3e68fb1 KK |
88 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), |
89 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), | |
60806225 | 90 | OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL), |
1128658a SAB |
91 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0, |
92 | "exynos-gsc.0", NULL), | |
93 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1, | |
94 | "exynos-gsc.1", NULL), | |
95 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2, | |
96 | "exynos-gsc.2", NULL), | |
97 | OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, | |
98 | "exynos-gsc.3", NULL), | |
566cf8ee RS |
99 | OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000, |
100 | "exynos5-hdmi", NULL), | |
5af0d8a3 RS |
101 | OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000, |
102 | "exynos5-mixer", NULL), | |
2eae613b | 103 | OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL), |
ef405e04 ADK |
104 | OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000, |
105 | "exynos-tmu", NULL), | |
99b97fdc PV |
106 | OF_DEV_AUXDATA("samsung,i2s-v5", 0x03830000, |
107 | "samsung-i2s.0", NULL), | |
108 | OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D60000, | |
109 | "samsung-i2s.1", NULL), | |
110 | OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D70000, | |
111 | "samsung-i2s.2", NULL), | |
25e9d28d CK |
112 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11210000, |
113 | "exynos-sysmmu.0", "mfc"), /* MFC_L */ | |
114 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11200000, | |
115 | "exynos-sysmmu.1", "mfc"), /* MFC_R */ | |
116 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14650000, | |
117 | "exynos-sysmmu.2", NULL), /* TV */ | |
118 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11F20000, | |
119 | "exynos-sysmmu.3", "jpeg"), /* JPEG */ | |
120 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11D40000, | |
121 | "exynos-sysmmu.4", NULL), /* ROTATOR */ | |
122 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E80000, | |
123 | "exynos-sysmmu.5", "gscl"), /* GSCL0 */ | |
124 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E90000, | |
125 | "exynos-sysmmu.6", "gscl"), /* GSCL1 */ | |
126 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EA0000, | |
127 | "exynos-sysmmu.7", "gscl"), /* GSCL2 */ | |
128 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EB0000, | |
129 | "exynos-sysmmu.8", "gscl"), /* GSCL3 */ | |
130 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13260000, | |
131 | "exynos-sysmmu.9", NULL), /* FIMC-IS0 */ | |
132 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x132C0000, | |
133 | "exynos-sysmmu.10", NULL), /* FIMC-IS1 */ | |
134 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14640000, | |
135 | "exynos-sysmmu.11", NULL), /* FIMD1 */ | |
136 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C40000, | |
137 | "exynos-sysmmu.12", NULL), /* FIMC-LITE0 */ | |
138 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C50000, | |
139 | "exynos-sysmmu.13", NULL), /* FIMC-LITE1 */ | |
140 | OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A60000, | |
141 | "exynos-sysmmu.14", NULL), /* G2D */ | |
b3e68fb1 KK |
142 | {}, |
143 | }; | |
144 | ||
2edb36c4 KK |
145 | static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = { |
146 | OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0, | |
147 | "exynos4210-uart.0", NULL), | |
148 | {}, | |
149 | }; | |
150 | ||
151 | static void __init exynos5_dt_map_io(void) | |
b3e68fb1 | 152 | { |
5b7897db DA |
153 | unsigned long root = of_get_flat_dt_root(); |
154 | ||
b3e68fb1 | 155 | exynos_init_io(NULL, 0); |
2edb36c4 | 156 | |
5b7897db | 157 | if (of_flat_dt_is_compatible(root, "samsung,exynos5250")) |
2edb36c4 | 158 | s3c24xx_init_clocks(24000000); |
b3e68fb1 KK |
159 | } |
160 | ||
2edb36c4 | 161 | static void __init exynos5_dt_machine_init(void) |
b3e68fb1 | 162 | { |
7000fe8c AK |
163 | struct device_node *i2c_np; |
164 | const char *i2c_compat = "samsung,s3c2440-i2c"; | |
165 | unsigned int tmp; | |
166 | ||
167 | /* | |
168 | * Exynos5's legacy i2c controller and new high speed i2c | |
169 | * controller have muxed interrupt sources. By default the | |
170 | * interrupts for 4-channel HS-I2C controller are enabled. | |
171 | * If node for first four channels of legacy i2c controller | |
172 | * are available then re-configure the interrupts via the | |
173 | * system register. | |
174 | */ | |
175 | for_each_compatible_node(i2c_np, NULL, i2c_compat) { | |
176 | if (of_device_is_available(i2c_np)) { | |
177 | if (of_alias_get_id(i2c_np, "i2c") < 4) { | |
178 | tmp = readl(EXYNOS5_SYS_I2C_CFG); | |
179 | writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")), | |
180 | EXYNOS5_SYS_I2C_CFG); | |
181 | } | |
182 | } | |
183 | } | |
184 | ||
2edb36c4 KK |
185 | if (of_machine_is_compatible("samsung,exynos5250")) |
186 | of_platform_populate(NULL, of_default_bus_match_table, | |
187 | exynos5250_auxdata_lookup, NULL); | |
188 | else if (of_machine_is_compatible("samsung,exynos5440")) | |
189 | of_platform_populate(NULL, of_default_bus_match_table, | |
190 | exynos5440_auxdata_lookup, NULL); | |
b3e68fb1 KK |
191 | } |
192 | ||
2edb36c4 | 193 | static char const *exynos5_dt_compat[] __initdata = { |
b3e68fb1 | 194 | "samsung,exynos5250", |
2edb36c4 | 195 | "samsung,exynos5440", |
b3e68fb1 KK |
196 | NULL |
197 | }; | |
198 | ||
2eae613b AK |
199 | static void __init exynos5_reserve(void) |
200 | { | |
ade7ffbb | 201 | #ifdef CONFIG_S5P_DEV_MFC |
2eae613b AK |
202 | struct s5p_mfc_dt_meminfo mfc_mem; |
203 | ||
204 | /* Reserve memory for MFC only if it's available */ | |
205 | mfc_mem.compatible = "samsung,mfc-v6"; | |
206 | if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) | |
207 | s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, | |
208 | mfc_mem.lsize); | |
ade7ffbb | 209 | #endif |
2eae613b AK |
210 | } |
211 | ||
b3e68fb1 KK |
212 | DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") |
213 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | |
214 | .init_irq = exynos5_init_irq, | |
06853ae4 | 215 | .smp = smp_ops(exynos_smp_ops), |
2edb36c4 | 216 | .map_io = exynos5_dt_map_io, |
2edb36c4 | 217 | .init_machine = exynos5_dt_machine_init, |
bb13fabc | 218 | .init_late = exynos_init_late, |
6bb27d73 | 219 | .init_time = exynos4_timer_init, |
2edb36c4 | 220 | .dt_compat = exynos5_dt_compat, |
b3e68fb1 | 221 | .restart = exynos5_restart, |
2eae613b | 222 | .reserve = exynos5_reserve, |
b3e68fb1 | 223 | MACHINE_END |