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55c79a40 MG |
1 | /* |
2 | * Chip specific defines for DA8XX/OMAP L1XX SoC | |
3 | * | |
4 | * Author: Mark A. Greer <mgreer@mvista.com> | |
5 | * | |
75392dd3 | 6 | * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under |
55c79a40 MG |
7 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express | |
9 | * or implied. | |
10 | */ | |
11 | #ifndef __ASM_ARCH_DAVINCI_DA8XX_H | |
12 | #define __ASM_ARCH_DAVINCI_DA8XX_H | |
13 | ||
b9e6342b MG |
14 | #include <video/da8xx-fb.h> |
15 | ||
75392dd3 | 16 | #include <linux/platform_device.h> |
8ee2bf9a | 17 | #include <linux/davinci_emac.h> |
54ce6883 | 18 | #include <linux/spi/spi.h> |
75392dd3 | 19 | |
55c79a40 MG |
20 | #include <mach/serial.h> |
21 | #include <mach/edma.h> | |
22 | #include <mach/i2c.h> | |
e33ef5e3 | 23 | #include <mach/asp.h> |
700691f2 | 24 | #include <mach/mmc.h> |
e5d3d252 | 25 | #include <mach/usb.h> |
044ca015 | 26 | #include <mach/pm.h> |
54ce6883 | 27 | #include <mach/spi.h> |
55c79a40 | 28 | |
d2de0582 SN |
29 | extern void __iomem *da8xx_syscfg0_base; |
30 | extern void __iomem *da8xx_syscfg1_base; | |
6a28adef | 31 | |
39e14550 SN |
32 | /* |
33 | * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade | |
34 | * (than the regular 300Mhz variant), the board code should set this up | |
35 | * with the supported speed before calling da850_register_cpufreq(). | |
36 | */ | |
37 | extern unsigned int da850_max_speed; | |
38 | ||
55c79a40 MG |
39 | /* |
40 | * The cp_intc interrupt controller for the da8xx isn't in the same | |
41 | * chunk of physical memory space as the other registers (like it is | |
42 | * on the davincis) so it needs to be mapped separately. It will be | |
43 | * mapped early on when the I/O space is mapped and we'll put it just | |
44 | * before the I/O space in the processor's virtual memory space. | |
45 | */ | |
46 | #define DA8XX_CP_INTC_BASE 0xfffee000 | |
47 | #define DA8XX_CP_INTC_SIZE SZ_8K | |
48 | #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) | |
49 | ||
d2de0582 SN |
50 | #define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000) |
51 | #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) | |
cd874448 | 52 | #define DA8XX_JTAG_ID_REG 0x18 |
683b1e1f | 53 | #define DA8XX_CFGCHIP0_REG 0x17c |
371b53e0 | 54 | #define DA8XX_CFGCHIP2_REG 0x184 |
5d36a332 | 55 | #define DA8XX_CFGCHIP3_REG 0x188 |
55c79a40 | 56 | |
d2de0582 SN |
57 | #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) |
58 | #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) | |
044ca015 | 59 | #define DA8XX_DEEPSLEEP_REG 0x8 |
cbb2c961 | 60 | #define DA8XX_PWRDN_REG 0x18 |
d2de0582 | 61 | |
bea238f6 RS |
62 | #define DA8XX_PSC0_BASE 0x01c10000 |
63 | #define DA8XX_PLL0_BASE 0x01c11000 | |
bea238f6 RS |
64 | #define DA8XX_TIMER64P0_BASE 0x01c20000 |
65 | #define DA8XX_TIMER64P1_BASE 0x01c21000 | |
66 | #define DA8XX_GPIO_BASE 0x01e26000 | |
67 | #define DA8XX_PSC1_BASE 0x01e27000 | |
7c5ec609 | 68 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
38beb929 SR |
69 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
70 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | |
60cd02e1 | 71 | #define DA8XX_ARM_RAM_BASE 0xffff0000 |
bea238f6 | 72 | |
55c79a40 | 73 | void __init da830_init(void); |
e1a8d7e2 | 74 | void __init da850_init(void); |
55c79a40 | 75 | |
a941c503 RS |
76 | int da830_register_edma(struct edma_rsv_info *rsv); |
77 | int da850_register_edma(struct edma_rsv_info *rsv[2]); | |
55c79a40 | 78 | int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); |
d65566e5 UKK |
79 | int da8xx_register_spi(int instance, |
80 | const struct spi_board_info *info, unsigned len); | |
55c79a40 | 81 | int da8xx_register_watchdog(void); |
b0ea26e1 | 82 | int da8xx_register_usb20(unsigned mA, unsigned potpgt); |
e5d3d252 | 83 | int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); |
55c79a40 | 84 | int da8xx_register_emac(void); |
b9e6342b | 85 | int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); |
700691f2 | 86 | int da8xx_register_mmcsd0(struct davinci_mmc_config *config); |
b8241aef | 87 | int da850_register_mmcsd1(struct davinci_mmc_config *config); |
b8864aa4 | 88 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); |
c51df70b | 89 | int da8xx_register_rtc(void); |
b987c4b2 | 90 | int da850_register_cpufreq(char *async_clk); |
1960e693 | 91 | int da8xx_register_cpuidle(void); |
948c66df | 92 | void __iomem * __init da8xx_get_mem_ctlr(void); |
044ca015 | 93 | int da850_register_pm(struct platform_device *pdev); |
cbb2c961 | 94 | int __init da850_register_sata(unsigned long refclkpn); |
c6121ddd | 95 | void da8xx_restart(char mode, const char *cmd); |
55c79a40 MG |
96 | |
97 | extern struct platform_device da8xx_serial_device; | |
98 | extern struct emac_platform_data da8xx_emac_pdata; | |
b9e6342b MG |
99 | extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; |
100 | extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; | |
54ce6883 | 101 | extern struct davinci_spi_platform_data da8xx_spi_pdata[]; |
55c79a40 | 102 | |
c78a5bc2 CC |
103 | extern struct platform_device da8xx_wdt_device; |
104 | ||
55c79a40 MG |
105 | extern const short da830_emif25_pins[]; |
106 | extern const short da830_spi0_pins[]; | |
107 | extern const short da830_spi1_pins[]; | |
108 | extern const short da830_mmc_sd_pins[]; | |
109 | extern const short da830_uart0_pins[]; | |
110 | extern const short da830_uart1_pins[]; | |
111 | extern const short da830_uart2_pins[]; | |
112 | extern const short da830_usb20_pins[]; | |
113 | extern const short da830_usb11_pins[]; | |
114 | extern const short da830_uhpi_pins[]; | |
115 | extern const short da830_cpgmac_pins[]; | |
116 | extern const short da830_emif3c_pins[]; | |
117 | extern const short da830_mcasp0_pins[]; | |
118 | extern const short da830_mcasp1_pins[]; | |
119 | extern const short da830_mcasp2_pins[]; | |
120 | extern const short da830_i2c0_pins[]; | |
121 | extern const short da830_i2c1_pins[]; | |
122 | extern const short da830_lcdcntl_pins[]; | |
123 | extern const short da830_pwm_pins[]; | |
124 | extern const short da830_ecap0_pins[]; | |
125 | extern const short da830_ecap1_pins[]; | |
126 | extern const short da830_ecap2_pins[]; | |
127 | extern const short da830_eqep0_pins[]; | |
128 | extern const short da830_eqep1_pins[]; | |
129 | ||
e1a8d7e2 SR |
130 | extern const short da850_i2c0_pins[]; |
131 | extern const short da850_i2c1_pins[]; | |
5cbdf276 | 132 | extern const short da850_lcdcntl_pins[]; |
e1a8d7e2 | 133 | |
55c79a40 | 134 | #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ |