[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-davinci / devices-tnetv107x.c

/*
 * Texas Instruments TNETV107X SoC devices
 *
 * Copyright (C) 2010 Texas Instruments
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/slab.h>

#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/edma.h>
#include <mach/tnetv107x.h>

#include "clock.h"

/* Base addresses for on-chip devices */
#define TNETV107X_TPCC_BASE			0x01c00000
#define TNETV107X_TPTC0_BASE			0x01c10000
#define TNETV107X_TPTC1_BASE			0x01c10400
#define TNETV107X_WDOG_BASE			0x08086700
#define TNETV107X_TSC_BASE			0x08088500
#define TNETV107X_SDIO0_BASE			0x08088700
#define TNETV107X_SDIO1_BASE			0x08088800
#define TNETV107X_KEYPAD_BASE			0x08088a00
#define TNETV107X_ASYNC_EMIF_CNTRL_BASE		0x08200000
#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE	0x30000000
#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE	0x40000000
#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE	0x44000000
#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE	0x48000000

/* TNETV107X specific EDMA3 information */
#define EDMA_TNETV107X_NUM_DMACH	64
#define EDMA_TNETV107X_NUM_TCC		64
#define EDMA_TNETV107X_NUM_PARAMENTRY	128
#define EDMA_TNETV107X_NUM_EVQUE	2
#define EDMA_TNETV107X_NUM_TC		2
#define EDMA_TNETV107X_CHMAP_EXIST	0
#define EDMA_TNETV107X_NUM_REGIONS	4
#define TNETV107X_DMACH2EVENT_MAP0	0x3C0CE000u
#define TNETV107X_DMACH2EVENT_MAP1	0x000FFFFFu

#define TNETV107X_DMACH_SDIO0_RX		26
#define TNETV107X_DMACH_SDIO0_TX		27
#define TNETV107X_DMACH_SDIO1_RX		28
#define TNETV107X_DMACH_SDIO1_TX		29

static const s8 edma_tc_mapping[][2] = {
	/* event queue no	TC no	*/
	{	 0,		 0	},
	{	 1,		 1	},
	{	-1,		-1	}
};

static const s8 edma_priority_mapping[][2] = {
	/* event queue no	Prio	*/
	{	 0,		 3	},
	{	 1,		 7	},
	{	-1,		-1	}
};

static struct edma_soc_info edma_cc0_info = {
	.n_channel		= EDMA_TNETV107X_NUM_DMACH,
	.n_region		= EDMA_TNETV107X_NUM_REGIONS,
	.n_slot			= EDMA_TNETV107X_NUM_PARAMENTRY,
	.n_tc			= EDMA_TNETV107X_NUM_TC,
	.n_cc			= 1,
	.queue_tc_mapping	= edma_tc_mapping,
	.queue_priority_mapping	= edma_priority_mapping,
};

static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
	&edma_cc0_info,
};

static struct resource edma_resources[] = {
	{
		.name	= "edma_cc0",
		.start	= TNETV107X_TPCC_BASE,
		.end	= TNETV107X_TPCC_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.name	= "edma_tc0",
		.start	= TNETV107X_TPTC0_BASE,
		.end	= TNETV107X_TPTC0_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.name	= "edma_tc1",
		.start	= TNETV107X_TPTC1_BASE,
		.end	= TNETV107X_TPTC1_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.name	= "edma0",
		.start	= IRQ_TNETV107X_TPCC,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "edma0_err",
		.start	= IRQ_TNETV107X_TPCC_ERR,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device edma_device = {
	.name		= "edma",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(edma_resources),
	.resource	= edma_resources,
	.dev.platform_data = tnetv107x_edma_info,
};

static struct plat_serial8250_port serial_data[] = {
	{
		.mapbase	= TNETV107X_UART0_BASE,
		.irq		= IRQ_TNETV107X_UART0,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
					UPF_FIXED_TYPE | UPF_IOREMAP,
		.type		= PORT_AR7,
		.iotype		= UPIO_MEM32,
		.regshift	= 2,
	},
	{
		.mapbase	= TNETV107X_UART1_BASE,
		.irq		= IRQ_TNETV107X_UART1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
					UPF_FIXED_TYPE | UPF_IOREMAP,
		.type		= PORT_AR7,
		.iotype		= UPIO_MEM32,
		.regshift	= 2,
	},
	{
		.mapbase	= TNETV107X_UART2_BASE,
		.irq		= IRQ_TNETV107X_UART2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
					UPF_FIXED_TYPE | UPF_IOREMAP,
		.type		= PORT_AR7,
		.iotype		= UPIO_MEM32,
		.regshift	= 2,
	},
	{
		.flags	= 0,
	},
};

struct platform_device tnetv107x_serial_device = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev.platform_data	= serial_data,
};

static struct resource mmc0_resources[] = {
	{ /* Memory mapped registers */
		.start	= TNETV107X_SDIO0_BASE,
		.end	= TNETV107X_SDIO0_BASE + 0x0ff,
		.flags	= IORESOURCE_MEM
	},
	{ /* MMC interrupt */
		.start	= IRQ_TNETV107X_MMC0,
		.flags	= IORESOURCE_IRQ
	},
	{ /* SDIO interrupt */
		.start	= IRQ_TNETV107X_SDIO0,
		.flags	= IORESOURCE_IRQ
	},
	{ /* DMA RX */
		.start	= EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
		.flags	= IORESOURCE_DMA
	},
	{ /* DMA TX */
		.start	= EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
		.flags	= IORESOURCE_DMA
	},
};

static struct resource mmc1_resources[] = {
	{ /* Memory mapped registers */
		.start	= TNETV107X_SDIO1_BASE,
		.end	= TNETV107X_SDIO1_BASE + 0x0ff,
		.flags	= IORESOURCE_MEM
	},
	{ /* MMC interrupt */
		.start	= IRQ_TNETV107X_MMC1,
		.flags	= IORESOURCE_IRQ
	},
	{ /* SDIO interrupt */
		.start	= IRQ_TNETV107X_SDIO1,
		.flags	= IORESOURCE_IRQ
	},
	{ /* DMA RX */
		.start	= EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
		.flags	= IORESOURCE_DMA
	},
	{ /* DMA TX */
		.start	= EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
		.flags	= IORESOURCE_DMA
	},
};

static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
static u64 mmc1_dma_mask = DMA_BIT_MASK(32);

static struct platform_device mmc_devices[2] = {
	{
		.name		= "davinci_mmc",
		.id		= 0,
		.dev		= {
			.dma_mask		= &mmc0_dma_mask,
			.coherent_dma_mask	= DMA_BIT_MASK(32),
		},
		.num_resources	= ARRAY_SIZE(mmc0_resources),
		.resource	= mmc0_resources
	},
	{
		.name		= "davinci_mmc",
		.id		= 1,
		.dev		= {
			.dma_mask		= &mmc1_dma_mask,
			.coherent_dma_mask	= DMA_BIT_MASK(32),
		},
		.num_resources	= ARRAY_SIZE(mmc1_resources),
		.resource	= mmc1_resources
	},
};

static const u32 emif_windows[] = {
	TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
	TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
};

static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };

static struct resource wdt_resources[] = {
	{
		.start	= TNETV107X_WDOG_BASE,
		.end	= TNETV107X_WDOG_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device tnetv107x_wdt_device = {
	.name		= "tnetv107x_wdt",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
{
	struct resource res[2];
	struct platform_device *pdev;
	u32	range;
	int	ret;

	/* Figure out the resource range from the ale/cle masks */
	range = max(data->mask_cle, data->mask_ale);
	range = PAGE_ALIGN(range + 4) - 1;

	if (range >= emif_window_sizes[chipsel])
		return -EINVAL;

	pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
	if (!pdev)
		return -ENOMEM;

	pdev->name		= "davinci_nand";
	pdev->id		= chipsel;
	pdev->dev.platform_data	= data;

	memset(res, 0, sizeof(res));

	res[0].start	= emif_windows[chipsel];
	res[0].end	= res[0].start + range;
	res[0].flags	= IORESOURCE_MEM;

	res[1].start	= TNETV107X_ASYNC_EMIF_CNTRL_BASE;
	res[1].end	= res[1].start + SZ_4K - 1;
	res[1].flags	= IORESOURCE_MEM;

	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
	if (ret < 0) {
		kfree(pdev);
		return ret;
	}

	return platform_device_register(pdev);
}

static struct resource keypad_resources[] = {
	{
		.start	= TNETV107X_KEYPAD_BASE,
		.end	= TNETV107X_KEYPAD_BASE + 0xff,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IRQ_TNETV107X_KEYPAD,
		.flags	= IORESOURCE_IRQ,
		.name	= "press",
	},
	{
		.start	= IRQ_TNETV107X_KEYPAD_FREE,
		.flags	= IORESOURCE_IRQ,
		.name	= "release",
	},
};

static struct platform_device keypad_device = {
	.name		= "tnetv107x-keypad",
	.num_resources	= ARRAY_SIZE(keypad_resources),
	.resource	= keypad_resources,
};

static struct resource tsc_resources[] = {
	{
		.start	= TNETV107X_TSC_BASE,
		.end	= TNETV107X_TSC_BASE + 0xff,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IRQ_TNETV107X_TSC,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device tsc_device = {
	.name		= "tnetv107x-ts",
	.num_resources	= ARRAY_SIZE(tsc_resources),
	.resource	= tsc_resources,
};

void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
{
	int i, error;
	struct clk *tsc_clk;

	/*
	 * The reset defaults for tnetv107x tsc clock divider is set too high.
	 * This forces the clock down to a range that allows the ADC to
	 * complete sample conversion in time.
	 */
	tsc_clk = clk_get(NULL, "sys_tsc_clk");
	if (tsc_clk) {
		error = clk_set_rate(tsc_clk, 5000000);
		WARN_ON(error < 0);
		clk_put(tsc_clk);
	}

	platform_device_register(&edma_device);
	platform_device_register(&tnetv107x_wdt_device);
	platform_device_register(&tsc_device);

	if (info->serial_config)
		davinci_serial_init(info->serial_config);

	for (i = 0; i < 2; i++)
		if (info->mmc_config[i]) {
			mmc_devices[i].dev.platform_data = info->mmc_config[i];
			platform_device_register(&mmc_devices[i]);
		}

	for (i = 0; i < 4; i++)
		if (info->nand_config[i])
			nand_init(i, info->nand_config[i]);

	if (info->keypad_config) {
		keypad_device.dev.platform_data = info->keypad_config;
		platform_device_register(&keypad_device);
	}
}
Commit	Line	Data
4d1e7848 CC	1	/*
	2	* Texas Instruments TNETV107X SoC devices
	3	*
	4	* Copyright (C) 2010 Texas Instruments
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/dma-mapping.h>
	19	#include <linux/clk.h>
	20	#include <linux/slab.h>
	21
	22	#include <mach/common.h>
	23	#include <mach/irqs.h>
	24	#include <mach/edma.h>
	25	#include <mach/tnetv107x.h>
	26
	27	#include "clock.h"
	28
	29	/* Base addresses for on-chip devices */
	30	#define TNETV107X_TPCC_BASE 0x01c00000
	31	#define TNETV107X_TPTC0_BASE 0x01c10000
	32	#define TNETV107X_TPTC1_BASE 0x01c10400
	33	#define TNETV107X_WDOG_BASE 0x08086700
1f4640ae	34	#define TNETV107X_TSC_BASE 0x08088500
4d1e7848 CC	35	#define TNETV107X_SDIO0_BASE 0x08088700
4d1e7848 CC	36	#define TNETV107X_SDIO1_BASE 0x08088800
d45b1ed4	37	#define TNETV107X_KEYPAD_BASE 0x08088a00
4d1e7848 CC	38	#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000
	39	#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
	40	#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000
	41	#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE 0x44000000
	42	#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE 0x48000000
	43
	44	/* TNETV107X specific EDMA3 information */
	45	#define EDMA_TNETV107X_NUM_DMACH 64
	46	#define EDMA_TNETV107X_NUM_TCC 64
	47	#define EDMA_TNETV107X_NUM_PARAMENTRY 128
	48	#define EDMA_TNETV107X_NUM_EVQUE 2
	49	#define EDMA_TNETV107X_NUM_TC 2
	50	#define EDMA_TNETV107X_CHMAP_EXIST 0
	51	#define EDMA_TNETV107X_NUM_REGIONS 4
	52	#define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u
	53	#define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu
	54
	55	#define TNETV107X_DMACH_SDIO0_RX 26
	56	#define TNETV107X_DMACH_SDIO0_TX 27
	57	#define TNETV107X_DMACH_SDIO1_RX 28
	58	#define TNETV107X_DMACH_SDIO1_TX 29
	59
	60	static const s8 edma_tc_mapping[][2] = {
	61	/* event queue no TC no */
	62	{ 0, 0 },
	63	{ 1, 1 },
	64	{ -1, -1 }
	65	};
	66
	67	static const s8 edma_priority_mapping[][2] = {
	68	/* event queue no Prio */
	69	{ 0, 3 },
	70	{ 1, 7 },
	71	{ -1, -1 }
	72	};
	73
bc3ac9f3 SN	74	static struct edma_soc_info edma_cc0_info = {
	75	.n_channel = EDMA_TNETV107X_NUM_DMACH,
	76	.n_region = EDMA_TNETV107X_NUM_REGIONS,
	77	.n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
	78	.n_tc = EDMA_TNETV107X_NUM_TC,
	79	.n_cc = 1,
	80	.queue_tc_mapping = edma_tc_mapping,
	81	.queue_priority_mapping = edma_priority_mapping,
	82	};
	83
	84	static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
	85	&edma_cc0_info,
4d1e7848 CC	86	};
	87
	88	static struct resource edma_resources[] = {
	89	{
	90	.name = "edma_cc0",
	91	.start = TNETV107X_TPCC_BASE,
	92	.end = TNETV107X_TPCC_BASE + SZ_32K - 1,
	93	.flags = IORESOURCE_MEM,
	94	},
	95	{
	96	.name = "edma_tc0",
	97	.start = TNETV107X_TPTC0_BASE,
	98	.end = TNETV107X_TPTC0_BASE + SZ_1K - 1,
	99	.flags = IORESOURCE_MEM,
	100	},
	101	{
	102	.name = "edma_tc1",
	103	.start = TNETV107X_TPTC1_BASE,
	104	.end = TNETV107X_TPTC1_BASE + SZ_1K - 1,
	105	.flags = IORESOURCE_MEM,
	106	},
	107	{
	108	.name = "edma0",
	109	.start = IRQ_TNETV107X_TPCC,
	110	.flags = IORESOURCE_IRQ,
	111	},
	112	{
	113	.name = "edma0_err",
	114	.start = IRQ_TNETV107X_TPCC_ERR,
	115	.flags = IORESOURCE_IRQ,
	116	},
	117	};
	118
	119	static struct platform_device edma_device = {
	120	.name = "edma",
	121	.id = -1,
	122	.num_resources = ARRAY_SIZE(edma_resources),
	123	.resource = edma_resources,
bc3ac9f3	124	.dev.platform_data = tnetv107x_edma_info,
4d1e7848 CC	125	};
	126
	127	static struct plat_serial8250_port serial_data[] = {
	128	{
	129	.mapbase = TNETV107X_UART0_BASE,
	130	.irq = IRQ_TNETV107X_UART0,
	131	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \|
	132	UPF_FIXED_TYPE \| UPF_IOREMAP,
	133	.type = PORT_AR7,
	134	.iotype = UPIO_MEM32,
	135	.regshift = 2,
	136	},
	137	{
	138	.mapbase = TNETV107X_UART1_BASE,
	139	.irq = IRQ_TNETV107X_UART1,
	140	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \|
	141	UPF_FIXED_TYPE \| UPF_IOREMAP,
	142	.type = PORT_AR7,
	143	.iotype = UPIO_MEM32,
	144	.regshift = 2,
	145	},
	146	{
	147	.mapbase = TNETV107X_UART2_BASE,
	148	.irq = IRQ_TNETV107X_UART2,
	149	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \|
	150	UPF_FIXED_TYPE \| UPF_IOREMAP,
	151	.type = PORT_AR7,
	152	.iotype = UPIO_MEM32,
	153	.regshift = 2,
	154	},
	155	{
	156	.flags = 0,
	157	},
	158	};
	159
	160	struct platform_device tnetv107x_serial_device = {
	161	.name = "serial8250",
	162	.id = PLAT8250_DEV_PLATFORM,
	163	.dev.platform_data = serial_data,
	164	};
	165
	166	static struct resource mmc0_resources[] = {
	167	{ /* Memory mapped registers */
	168	.start = TNETV107X_SDIO0_BASE,
	169	.end = TNETV107X_SDIO0_BASE + 0x0ff,
	170	.flags = IORESOURCE_MEM
	171	},
	172	{ /* MMC interrupt */
	173	.start = IRQ_TNETV107X_MMC0,
	174	.flags = IORESOURCE_IRQ
	175	},
	176	{ /* SDIO interrupt */
	177	.start = IRQ_TNETV107X_SDIO0,
	178	.flags = IORESOURCE_IRQ
	179	},
	180	{ /* DMA RX */
	181	.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
	182	.flags = IORESOURCE_DMA
	183	},
	184	{ /* DMA TX */
	185	.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
	186	.flags = IORESOURCE_DMA
	187	},
	188	};
189
190	static struct resource mmc1_resources[] = {
191	{ /* Memory mapped registers */
192	.start = TNETV107X_SDIO1_BASE,
193	.end = TNETV107X_SDIO1_BASE + 0x0ff,
194	.flags = IORESOURCE_MEM
195	},
196	{ /* MMC interrupt */
197	.start = IRQ_TNETV107X_MMC1,
198	.flags = IORESOURCE_IRQ
199	},
200	{ /* SDIO interrupt */
201	.start = IRQ_TNETV107X_SDIO1,
202	.flags = IORESOURCE_IRQ
203	},
204	{ /* DMA RX */
205	.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
206	.flags = IORESOURCE_DMA
207	},
208	{ /* DMA TX */
209	.start = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
210	.flags = IORESOURCE_DMA
211	},
212	};
213
214	static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
215	static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
216
217	static struct platform_device mmc_devices[2] = {
218	{
219	.name = "davinci_mmc",
220	.id = 0,
221	.dev = {
222	.dma_mask = &mmc0_dma_mask,
223	.coherent_dma_mask = DMA_BIT_MASK(32),
224	},
225	.num_resources = ARRAY_SIZE(mmc0_resources),
226	.resource = mmc0_resources
227	},
228	{
229	.name = "davinci_mmc",
230	.id = 1,
231	.dev = {
232	.dma_mask = &mmc1_dma_mask,
233	.coherent_dma_mask = DMA_BIT_MASK(32),
234	},
235	.num_resources = ARRAY_SIZE(mmc1_resources),
236	.resource = mmc1_resources
237	},
238	};
239
240	static const u32 emif_windows[] = {
241	TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
242	TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
243	};
244
245	static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
246
247	static struct resource wdt_resources[] = {
248	{
249	.start = TNETV107X_WDOG_BASE,
250	.end = TNETV107X_WDOG_BASE + SZ_4K - 1,
251	.flags = IORESOURCE_MEM,
252	},
253	};
254
255	struct platform_device tnetv107x_wdt_device = {
256	.name = "tnetv107x_wdt",
257	.id = 0,
258	.num_resources = ARRAY_SIZE(wdt_resources),
259	.resource = wdt_resources,
260	};
261
262	static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
263	{
264	struct resource res[2];
265	struct platform_device *pdev;
266	u32 range;
267	int ret;
268
269	/* Figure out the resource range from the ale/cle masks */
270	range = max(data->mask_cle, data->mask_ale);
271	range = PAGE_ALIGN(range + 4) - 1;
272
273	if (range >= emif_window_sizes[chipsel])
274	return -EINVAL;
275
276	pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
277	if (!pdev)
278	return -ENOMEM;
279
280	pdev->name = "davinci_nand";
281	pdev->id = chipsel;
282	pdev->dev.platform_data = data;
283
284	memset(res, 0, sizeof(res));
285
286	res[0].start = emif_windows[chipsel];
287	res[0].end = res[0].start + range;
288	res[0].flags = IORESOURCE_MEM;
289
290	res[1].start = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
291	res[1].end = res[1].start + SZ_4K - 1;
292	res[1].flags = IORESOURCE_MEM;
293
294	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
295	if (ret < 0) {
296	kfree(pdev);
297	return ret;
298	}
299
300	return platform_device_register(pdev);
301	}
302
d45b1ed4 CC	303	static struct resource keypad_resources[] = {
	304	{
	305	.start = TNETV107X_KEYPAD_BASE,
	306	.end = TNETV107X_KEYPAD_BASE + 0xff,
	307	.flags = IORESOURCE_MEM,
	308	},
	309	{
	310	.start = IRQ_TNETV107X_KEYPAD,
	311	.flags = IORESOURCE_IRQ,
	312	.name = "press",
	313	},
	314	{
	315	.start = IRQ_TNETV107X_KEYPAD_FREE,
	316	.flags = IORESOURCE_IRQ,
	317	.name = "release",
	318	},
	319	};
	320
	321	static struct platform_device keypad_device = {
	322	.name = "tnetv107x-keypad",
	323	.num_resources = ARRAY_SIZE(keypad_resources),
	324	.resource = keypad_resources,
	325	};
	326
1f4640ae CC	327	static struct resource tsc_resources[] = {
	328	{
	329	.start = TNETV107X_TSC_BASE,
	330	.end = TNETV107X_TSC_BASE + 0xff,
	331	.flags = IORESOURCE_MEM,
	332	},
	333	{
	334	.start = IRQ_TNETV107X_TSC,
	335	.flags = IORESOURCE_IRQ,
	336	},
	337	};
	338
	339	static struct platform_device tsc_device = {
	340	.name = "tnetv107x-ts",
	341	.num_resources = ARRAY_SIZE(tsc_resources),
	342	.resource = tsc_resources,
	343	};
	344
4d1e7848 CC	345	void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
4d1e7848 CC	346	{
ced98628 CC	347	int i, error;
	348	struct clk *tsc_clk;
	349
	350	/*
	351	* The reset defaults for tnetv107x tsc clock divider is set too high.
	352	* This forces the clock down to a range that allows the ADC to
	353	* complete sample conversion in time.
	354	*/
	355	tsc_clk = clk_get(NULL, "sys_tsc_clk");
	356	if (tsc_clk) {
	357	error = clk_set_rate(tsc_clk, 5000000);
	358	WARN_ON(error < 0);
	359	clk_put(tsc_clk);
	360	}
4d1e7848 CC	361
	362	platform_device_register(&edma_device);
	363	platform_device_register(&tnetv107x_wdt_device);
1f4640ae	364	platform_device_register(&tsc_device);
4d1e7848 CC	365
	366	if (info->serial_config)
	367	davinci_serial_init(info->serial_config);
	368
	369	for (i = 0; i < 2; i++)
	370	if (info->mmc_config[i]) {
	371	mmc_devices[i].dev.platform_data = info->mmc_config[i];
	372	platform_device_register(&mmc_devices[i]);
	373	}
	374
	375	for (i = 0; i < 4; i++)
	376	if (info->nand_config[i])
	377	nand_init(i, info->nand_config[i]);
d45b1ed4 CC	378
	379	if (info->keypad_config) {
	380	keypad_device.dev.platform_data = info->keypad_config;
	381	platform_device_register(&keypad_device);
	382	}
4d1e7848	383	}