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7c6337e2 KH |
1 | /* |
2 | * TI DaVinci EVM board support | |
3 | * | |
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | |
5 | * | |
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | |
7 | * the terms of the GNU General Public License version 2. This program | |
8 | * is licensed "as is" without any warranty of any kind, whether express | |
9 | * or implied. | |
10 | */ | |
11 | #include <linux/kernel.h> | |
7c6337e2 KH |
12 | #include <linux/init.h> |
13 | #include <linux/dma-mapping.h> | |
14 | #include <linux/platform_device.h> | |
7bff3c4c | 15 | #include <linux/gpio.h> |
7bff3c4c DB |
16 | #include <linux/i2c.h> |
17 | #include <linux/i2c/pcf857x.h> | |
18 | #include <linux/i2c/at24.h> | |
7c6337e2 | 19 | #include <linux/mtd/mtd.h> |
d0e47fba | 20 | #include <linux/mtd/nand.h> |
7c6337e2 KH |
21 | #include <linux/mtd/partitions.h> |
22 | #include <linux/mtd/physmap.h> | |
d0e47fba KH |
23 | #include <linux/phy.h> |
24 | #include <linux/clk.h> | |
ab8e8df8 MK |
25 | #include <linux/videodev2.h> |
26 | ||
27 | #include <media/tvp514x.h> | |
7c6337e2 | 28 | |
7c6337e2 | 29 | #include <asm/mach-types.h> |
7c6337e2 | 30 | #include <asm/mach/arch.h> |
7c6337e2 | 31 | |
d0e47fba | 32 | #include <mach/dm644x.h> |
a09e64fb | 33 | #include <mach/common.h> |
7bff3c4c | 34 | #include <mach/i2c.h> |
d0e47fba KH |
35 | #include <mach/serial.h> |
36 | #include <mach/mux.h> | |
d0e47fba | 37 | #include <mach/nand.h> |
2dbf56ae | 38 | #include <mach/mmc.h> |
355fb4e3 | 39 | #include <mach/usb.h> |
fe69c82d | 40 | #include <mach/aemif.h> |
d0e47fba | 41 | |
782f2d78 | 42 | #define DM644X_EVM_PHY_ID "0:01" |
d0e47fba KH |
43 | #define LXT971_PHY_ID (0x001378e2) |
44 | #define LXT971_PHY_MASK (0xfffffff0) | |
7c6337e2 | 45 | |
7bff3c4c | 46 | static struct mtd_partition davinci_evm_norflash_partitions[] = { |
d0e47fba | 47 | /* bootloader (UBL, U-Boot, etc) in first 5 sectors */ |
7c6337e2 KH |
48 | { |
49 | .name = "bootloader", | |
50 | .offset = 0, | |
d0e47fba | 51 | .size = 5 * SZ_64K, |
7c6337e2 KH |
52 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
53 | }, | |
54 | /* bootloader params in the next 1 sectors */ | |
55 | { | |
56 | .name = "params", | |
57 | .offset = MTDPART_OFS_APPEND, | |
58 | .size = SZ_64K, | |
59 | .mask_flags = 0, | |
60 | }, | |
61 | /* kernel */ | |
62 | { | |
63 | .name = "kernel", | |
64 | .offset = MTDPART_OFS_APPEND, | |
65 | .size = SZ_2M, | |
66 | .mask_flags = 0 | |
67 | }, | |
68 | /* file system */ | |
69 | { | |
70 | .name = "filesystem", | |
71 | .offset = MTDPART_OFS_APPEND, | |
72 | .size = MTDPART_SIZ_FULL, | |
73 | .mask_flags = 0 | |
74 | } | |
75 | }; | |
76 | ||
7bff3c4c | 77 | static struct physmap_flash_data davinci_evm_norflash_data = { |
7c6337e2 | 78 | .width = 2, |
7bff3c4c DB |
79 | .parts = davinci_evm_norflash_partitions, |
80 | .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions), | |
7c6337e2 KH |
81 | }; |
82 | ||
83 | /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF | |
84 | * limits addresses to 16M, so using addresses past 16M will wrap */ | |
7bff3c4c | 85 | static struct resource davinci_evm_norflash_resource = { |
70342174 SS |
86 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
87 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | |
7c6337e2 KH |
88 | .flags = IORESOURCE_MEM, |
89 | }; | |
90 | ||
7bff3c4c | 91 | static struct platform_device davinci_evm_norflash_device = { |
7c6337e2 KH |
92 | .name = "physmap-flash", |
93 | .id = 0, | |
94 | .dev = { | |
7bff3c4c | 95 | .platform_data = &davinci_evm_norflash_data, |
7c6337e2 KH |
96 | }, |
97 | .num_resources = 1, | |
7bff3c4c DB |
98 | .resource = &davinci_evm_norflash_resource, |
99 | }; | |
100 | ||
3e9c18e1 DB |
101 | /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks). |
102 | * It may used instead of the (default) NOR chip to boot, using TI's | |
103 | * tools to install the secondary boot loader (UBL) and U-Boot. | |
104 | */ | |
28552c2e | 105 | static struct mtd_partition davinci_evm_nandflash_partition[] = { |
3e9c18e1 DB |
106 | /* Bootloader layout depends on whose u-boot is installed, but we |
107 | * can hide all the details. | |
108 | * - block 0 for u-boot environment ... in mainline u-boot | |
109 | * - block 1 for UBL (plus up to four backup copies in blocks 2..5) | |
110 | * - blocks 6...? for u-boot | |
111 | * - blocks 16..23 for u-boot environment ... in TI's u-boot | |
112 | */ | |
113 | { | |
114 | .name = "bootloader", | |
115 | .offset = 0, | |
116 | .size = SZ_256K + SZ_128K, | |
117 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
118 | }, | |
119 | /* Kernel */ | |
d0e47fba | 120 | { |
3e9c18e1 DB |
121 | .name = "kernel", |
122 | .offset = MTDPART_OFS_APPEND, | |
123 | .size = SZ_4M, | |
124 | .mask_flags = 0, | |
125 | }, | |
126 | /* File system (older GIT kernels started this on the 5MB mark) */ | |
127 | { | |
128 | .name = "filesystem", | |
129 | .offset = MTDPART_OFS_APPEND, | |
d0e47fba KH |
130 | .size = MTDPART_SIZ_FULL, |
131 | .mask_flags = 0, | |
132 | } | |
3e9c18e1 DB |
133 | /* A few blocks at end hold a flash BBT ... created by TI's CCS |
134 | * using flashwriter_nand.out, but ignored by TI's versions of | |
135 | * Linux and u-boot. We boot faster by using them. | |
136 | */ | |
d0e47fba | 137 | }; |
7bff3c4c | 138 | |
fe69c82d SN |
139 | static struct davinci_aemif_timing davinci_evm_nandflash_timing = { |
140 | .wsetup = 20, | |
141 | .wstrobe = 40, | |
142 | .whold = 20, | |
143 | .rsetup = 10, | |
144 | .rstrobe = 40, | |
145 | .rhold = 10, | |
146 | .ta = 40, | |
147 | }; | |
148 | ||
d0e47fba KH |
149 | static struct davinci_nand_pdata davinci_evm_nandflash_data = { |
150 | .parts = davinci_evm_nandflash_partition, | |
151 | .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), | |
152 | .ecc_mode = NAND_ECC_HW, | |
3e9c18e1 | 153 | .options = NAND_USE_FLASH_BBT, |
fe69c82d | 154 | .timing = &davinci_evm_nandflash_timing, |
d0e47fba KH |
155 | }; |
156 | ||
157 | static struct resource davinci_evm_nandflash_resource[] = { | |
158 | { | |
70342174 SS |
159 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
160 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | |
d0e47fba KH |
161 | .flags = IORESOURCE_MEM, |
162 | }, { | |
70342174 SS |
163 | .start = DM644X_ASYNC_EMIF_CONTROL_BASE, |
164 | .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | |
d0e47fba KH |
165 | .flags = IORESOURCE_MEM, |
166 | }, | |
167 | }; | |
168 | ||
169 | static struct platform_device davinci_evm_nandflash_device = { | |
170 | .name = "davinci_nand", | |
171 | .id = 0, | |
172 | .dev = { | |
173 | .platform_data = &davinci_evm_nandflash_data, | |
174 | }, | |
175 | .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource), | |
176 | .resource = davinci_evm_nandflash_resource, | |
177 | }; | |
178 | ||
3e9c18e1 | 179 | static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32); |
d0e47fba KH |
180 | |
181 | static struct platform_device davinci_fb_device = { | |
182 | .name = "davincifb", | |
183 | .id = -1, | |
184 | .dev = { | |
185 | .dma_mask = &davinci_fb_dma_mask, | |
3e9c18e1 | 186 | .coherent_dma_mask = DMA_BIT_MASK(32), |
d0e47fba KH |
187 | }, |
188 | .num_resources = 0, | |
189 | }; | |
190 | ||
ab8e8df8 MK |
191 | static struct tvp514x_platform_data tvp5146_pdata = { |
192 | .clk_polarity = 0, | |
193 | .hs_polarity = 1, | |
194 | .vs_polarity = 1 | |
195 | }; | |
196 | ||
197 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
198 | /* Inputs available at the TVP5146 */ | |
199 | static struct v4l2_input tvp5146_inputs[] = { | |
200 | { | |
201 | .index = 0, | |
202 | .name = "Composite", | |
203 | .type = V4L2_INPUT_TYPE_CAMERA, | |
204 | .std = TVP514X_STD_ALL, | |
205 | }, | |
206 | { | |
207 | .index = 1, | |
208 | .name = "S-Video", | |
209 | .type = V4L2_INPUT_TYPE_CAMERA, | |
210 | .std = TVP514X_STD_ALL, | |
211 | }, | |
212 | }; | |
213 | ||
214 | /* | |
215 | * this is the route info for connecting each input to decoder | |
216 | * ouput that goes to vpfe. There is a one to one correspondence | |
217 | * with tvp5146_inputs | |
218 | */ | |
219 | static struct vpfe_route tvp5146_routes[] = { | |
220 | { | |
221 | .input = INPUT_CVBS_VI2B, | |
222 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
223 | }, | |
224 | { | |
225 | .input = INPUT_SVIDEO_VI2C_VI1C, | |
226 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
227 | }, | |
228 | }; | |
229 | ||
230 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | |
231 | { | |
232 | .name = "tvp5146", | |
233 | .grp_id = 0, | |
234 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | |
235 | .inputs = tvp5146_inputs, | |
236 | .routes = tvp5146_routes, | |
237 | .can_route = 1, | |
238 | .ccdc_if_params = { | |
239 | .if_type = VPFE_BT656, | |
240 | .hdpol = VPFE_PINPOL_POSITIVE, | |
241 | .vdpol = VPFE_PINPOL_POSITIVE, | |
242 | }, | |
243 | .board_info = { | |
244 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
245 | .platform_data = &tvp5146_pdata, | |
246 | }, | |
247 | }, | |
248 | }; | |
249 | ||
250 | static struct vpfe_config vpfe_cfg = { | |
251 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | |
077639f4 | 252 | .i2c_adapter_id = 1, |
ab8e8df8 MK |
253 | .sub_devs = vpfe_sub_devs, |
254 | .card_name = "DM6446 EVM", | |
255 | .ccdc = "DM6446 CCDC", | |
256 | }; | |
257 | ||
d0e47fba KH |
258 | static struct platform_device rtc_dev = { |
259 | .name = "rtc_davinci_evm", | |
260 | .id = -1, | |
261 | }; | |
7bff3c4c | 262 | |
61aa0732 | 263 | static struct snd_platform_data dm644x_evm_snd_data; |
25acf553 | 264 | |
7bff3c4c DB |
265 | /*----------------------------------------------------------------------*/ |
266 | ||
267 | /* | |
268 | * I2C GPIO expanders | |
269 | */ | |
270 | ||
271 | #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8)) | |
272 | ||
273 | ||
274 | /* U2 -- LEDs */ | |
275 | ||
276 | static struct gpio_led evm_leds[] = { | |
277 | { .name = "DS8", .active_low = 1, | |
278 | .default_trigger = "heartbeat", }, | |
279 | { .name = "DS7", .active_low = 1, }, | |
280 | { .name = "DS6", .active_low = 1, }, | |
281 | { .name = "DS5", .active_low = 1, }, | |
282 | { .name = "DS4", .active_low = 1, }, | |
283 | { .name = "DS3", .active_low = 1, }, | |
284 | { .name = "DS2", .active_low = 1, | |
285 | .default_trigger = "mmc0", }, | |
286 | { .name = "DS1", .active_low = 1, | |
287 | .default_trigger = "ide-disk", }, | |
288 | }; | |
289 | ||
290 | static const struct gpio_led_platform_data evm_led_data = { | |
291 | .num_leds = ARRAY_SIZE(evm_leds), | |
292 | .leds = evm_leds, | |
293 | }; | |
294 | ||
295 | static struct platform_device *evm_led_dev; | |
296 | ||
297 | static int | |
298 | evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
299 | { | |
300 | struct gpio_led *leds = evm_leds; | |
301 | int status; | |
302 | ||
303 | while (ngpio--) { | |
304 | leds->gpio = gpio++; | |
305 | leds++; | |
306 | } | |
307 | ||
308 | /* what an extremely annoying way to be forced to handle | |
309 | * device unregistration ... | |
310 | */ | |
311 | evm_led_dev = platform_device_alloc("leds-gpio", 0); | |
312 | platform_device_add_data(evm_led_dev, | |
313 | &evm_led_data, sizeof evm_led_data); | |
314 | ||
315 | evm_led_dev->dev.parent = &client->dev; | |
316 | status = platform_device_add(evm_led_dev); | |
317 | if (status < 0) { | |
318 | platform_device_put(evm_led_dev); | |
319 | evm_led_dev = NULL; | |
320 | } | |
321 | return status; | |
322 | } | |
323 | ||
324 | static int | |
325 | evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
326 | { | |
327 | if (evm_led_dev) { | |
328 | platform_device_unregister(evm_led_dev); | |
329 | evm_led_dev = NULL; | |
330 | } | |
331 | return 0; | |
332 | } | |
333 | ||
334 | static struct pcf857x_platform_data pcf_data_u2 = { | |
335 | .gpio_base = PCF_Uxx_BASE(0), | |
336 | .setup = evm_led_setup, | |
337 | .teardown = evm_led_teardown, | |
338 | }; | |
339 | ||
340 | ||
341 | /* U18 - A/V clock generator and user switch */ | |
342 | ||
343 | static int sw_gpio; | |
344 | ||
345 | static ssize_t | |
346 | sw_show(struct device *d, struct device_attribute *a, char *buf) | |
347 | { | |
348 | char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n"; | |
349 | ||
350 | strcpy(buf, s); | |
351 | return strlen(s); | |
352 | } | |
353 | ||
354 | static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL); | |
355 | ||
356 | static int | |
357 | evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
358 | { | |
359 | int status; | |
360 | ||
361 | /* export dip switch option */ | |
362 | sw_gpio = gpio + 7; | |
363 | status = gpio_request(sw_gpio, "user_sw"); | |
364 | if (status == 0) | |
365 | status = gpio_direction_input(sw_gpio); | |
366 | if (status == 0) | |
367 | status = device_create_file(&client->dev, &dev_attr_user_sw); | |
368 | else | |
369 | gpio_free(sw_gpio); | |
370 | if (status != 0) | |
371 | sw_gpio = -EINVAL; | |
372 | ||
373 | /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */ | |
374 | gpio_request(gpio + 3, "pll_fs2"); | |
375 | gpio_direction_output(gpio + 3, 0); | |
376 | ||
377 | gpio_request(gpio + 2, "pll_fs1"); | |
378 | gpio_direction_output(gpio + 2, 0); | |
379 | ||
380 | gpio_request(gpio + 1, "pll_sr"); | |
381 | gpio_direction_output(gpio + 1, 0); | |
382 | ||
383 | return 0; | |
384 | } | |
385 | ||
386 | static int | |
387 | evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
388 | { | |
389 | gpio_free(gpio + 1); | |
390 | gpio_free(gpio + 2); | |
391 | gpio_free(gpio + 3); | |
392 | ||
393 | if (sw_gpio > 0) { | |
394 | device_remove_file(&client->dev, &dev_attr_user_sw); | |
395 | gpio_free(sw_gpio); | |
396 | } | |
397 | return 0; | |
398 | } | |
399 | ||
400 | static struct pcf857x_platform_data pcf_data_u18 = { | |
401 | .gpio_base = PCF_Uxx_BASE(1), | |
402 | .n_latch = (1 << 3) | (1 << 2) | (1 << 1), | |
403 | .setup = evm_u18_setup, | |
404 | .teardown = evm_u18_teardown, | |
7c6337e2 KH |
405 | }; |
406 | ||
7bff3c4c DB |
407 | |
408 | /* U35 - various I/O signals used to manage USB, CF, ATA, etc */ | |
409 | ||
410 | static int | |
411 | evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
412 | { | |
413 | /* p0 = nDRV_VBUS (initial: don't supply it) */ | |
414 | gpio_request(gpio + 0, "nDRV_VBUS"); | |
415 | gpio_direction_output(gpio + 0, 1); | |
416 | ||
417 | /* p1 = VDDIMX_EN */ | |
418 | gpio_request(gpio + 1, "VDDIMX_EN"); | |
419 | gpio_direction_output(gpio + 1, 1); | |
420 | ||
421 | /* p2 = VLYNQ_EN */ | |
422 | gpio_request(gpio + 2, "VLYNQ_EN"); | |
423 | gpio_direction_output(gpio + 2, 1); | |
424 | ||
425 | /* p3 = n3V3_CF_RESET (initial: stay in reset) */ | |
426 | gpio_request(gpio + 3, "nCF_RESET"); | |
427 | gpio_direction_output(gpio + 3, 0); | |
428 | ||
429 | /* (p4 unused) */ | |
430 | ||
431 | /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */ | |
432 | gpio_request(gpio + 5, "WLAN_RESET"); | |
433 | gpio_direction_output(gpio + 5, 1); | |
434 | ||
435 | /* p6 = nATA_SEL (initial: select) */ | |
436 | gpio_request(gpio + 6, "nATA_SEL"); | |
437 | gpio_direction_output(gpio + 6, 0); | |
438 | ||
439 | /* p7 = nCF_SEL (initial: deselect) */ | |
440 | gpio_request(gpio + 7, "nCF_SEL"); | |
441 | gpio_direction_output(gpio + 7, 1); | |
442 | ||
d0e47fba KH |
443 | /* irlml6401 switches over 1A, in under 8 msec; |
444 | * now it can be managed by nDRV_VBUS ... | |
445 | */ | |
355fb4e3 | 446 | davinci_setup_usb(1000, 8); |
34f32c97 | 447 | |
7bff3c4c DB |
448 | return 0; |
449 | } | |
450 | ||
451 | static int | |
452 | evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |
453 | { | |
454 | gpio_free(gpio + 7); | |
455 | gpio_free(gpio + 6); | |
456 | gpio_free(gpio + 5); | |
457 | gpio_free(gpio + 3); | |
458 | gpio_free(gpio + 2); | |
459 | gpio_free(gpio + 1); | |
460 | gpio_free(gpio + 0); | |
461 | return 0; | |
462 | } | |
463 | ||
464 | static struct pcf857x_platform_data pcf_data_u35 = { | |
465 | .gpio_base = PCF_Uxx_BASE(2), | |
466 | .setup = evm_u35_setup, | |
467 | .teardown = evm_u35_teardown, | |
468 | }; | |
469 | ||
470 | /*----------------------------------------------------------------------*/ | |
471 | ||
472 | /* Most of this EEPROM is unused, but U-Boot uses some data: | |
473 | * - 0x7f00, 6 bytes Ethernet Address | |
474 | * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL) | |
475 | * - ... newer boards may have more | |
476 | */ | |
d0e47fba | 477 | |
7bff3c4c DB |
478 | static struct at24_platform_data eeprom_info = { |
479 | .byte_len = (256*1024) / 8, | |
480 | .page_size = 64, | |
481 | .flags = AT24_FLAG_ADDR16, | |
b14dc0f9 MG |
482 | .setup = davinci_get_mac_addr, |
483 | .context = (void *)0x7f00, | |
d0e47fba KH |
484 | }; |
485 | ||
d0e47fba KH |
486 | /* |
487 | * MSP430 supports RTC, card detection, input from IR remote, and | |
488 | * a bit more. It triggers interrupts on GPIO(7) from pressing | |
489 | * buttons on the IR remote, and for card detect switches. | |
490 | */ | |
491 | static struct i2c_client *dm6446evm_msp; | |
492 | ||
493 | static int dm6446evm_msp_probe(struct i2c_client *client, | |
494 | const struct i2c_device_id *id) | |
495 | { | |
496 | dm6446evm_msp = client; | |
497 | return 0; | |
498 | } | |
499 | ||
500 | static int dm6446evm_msp_remove(struct i2c_client *client) | |
501 | { | |
502 | dm6446evm_msp = NULL; | |
503 | return 0; | |
504 | } | |
505 | ||
506 | static const struct i2c_device_id dm6446evm_msp_ids[] = { | |
507 | { "dm6446evm_msp", 0, }, | |
508 | { /* end of list */ }, | |
509 | }; | |
510 | ||
511 | static struct i2c_driver dm6446evm_msp_driver = { | |
512 | .driver.name = "dm6446evm_msp", | |
513 | .id_table = dm6446evm_msp_ids, | |
514 | .probe = dm6446evm_msp_probe, | |
515 | .remove = dm6446evm_msp_remove, | |
7bff3c4c DB |
516 | }; |
517 | ||
d0e47fba KH |
518 | static int dm6444evm_msp430_get_pins(void) |
519 | { | |
520 | static const char txbuf[2] = { 2, 4, }; | |
521 | char buf[4]; | |
522 | struct i2c_msg msg[2] = { | |
523 | { | |
524 | .addr = dm6446evm_msp->addr, | |
525 | .flags = 0, | |
526 | .len = 2, | |
527 | .buf = (void __force *)txbuf, | |
528 | }, | |
529 | { | |
530 | .addr = dm6446evm_msp->addr, | |
531 | .flags = I2C_M_RD, | |
532 | .len = 4, | |
533 | .buf = buf, | |
534 | }, | |
535 | }; | |
536 | int status; | |
537 | ||
538 | if (!dm6446evm_msp) | |
539 | return -ENXIO; | |
540 | ||
541 | /* Command 4 == get input state, returns port 2 and port3 data | |
542 | * S Addr W [A] len=2 [A] cmd=4 [A] | |
543 | * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P | |
544 | */ | |
545 | status = i2c_transfer(dm6446evm_msp->adapter, msg, 2); | |
546 | if (status < 0) | |
547 | return status; | |
548 | ||
549 | dev_dbg(&dm6446evm_msp->dev, | |
550 | "PINS: %02x %02x %02x %02x\n", | |
551 | buf[0], buf[1], buf[2], buf[3]); | |
552 | ||
553 | return (buf[3] << 8) | buf[2]; | |
554 | } | |
555 | ||
2dbf56ae KH |
556 | static int dm6444evm_mmc_get_cd(int module) |
557 | { | |
558 | int status = dm6444evm_msp430_get_pins(); | |
559 | ||
560 | return (status < 0) ? status : !(status & BIT(1)); | |
561 | } | |
562 | ||
563 | static int dm6444evm_mmc_get_ro(int module) | |
564 | { | |
565 | int status = dm6444evm_msp430_get_pins(); | |
566 | ||
567 | return (status < 0) ? status : status & BIT(6 + 8); | |
568 | } | |
569 | ||
570 | static struct davinci_mmc_config dm6446evm_mmc_config = { | |
571 | .get_cd = dm6444evm_mmc_get_cd, | |
572 | .get_ro = dm6444evm_mmc_get_ro, | |
573 | .wires = 4, | |
574 | .version = MMC_CTLR_VERSION_1 | |
575 | }; | |
576 | ||
7bff3c4c | 577 | static struct i2c_board_info __initdata i2c_info[] = { |
d0e47fba KH |
578 | { |
579 | I2C_BOARD_INFO("dm6446evm_msp", 0x23), | |
580 | }, | |
7bff3c4c DB |
581 | { |
582 | I2C_BOARD_INFO("pcf8574", 0x38), | |
583 | .platform_data = &pcf_data_u2, | |
584 | }, | |
585 | { | |
586 | I2C_BOARD_INFO("pcf8574", 0x39), | |
587 | .platform_data = &pcf_data_u18, | |
588 | }, | |
589 | { | |
590 | I2C_BOARD_INFO("pcf8574", 0x3a), | |
591 | .platform_data = &pcf_data_u35, | |
592 | }, | |
593 | { | |
594 | I2C_BOARD_INFO("24c256", 0x50), | |
595 | .platform_data = &eeprom_info, | |
596 | }, | |
1a7ff8ff C |
597 | { |
598 | I2C_BOARD_INFO("tlv320aic33", 0x1b), | |
599 | }, | |
7bff3c4c DB |
600 | }; |
601 | ||
602 | /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz), | |
603 | * which requires 100 usec of idle bus after i2c writes sent to it. | |
604 | */ | |
605 | static struct davinci_i2c_platform_data i2c_pdata = { | |
606 | .bus_freq = 20 /* kHz */, | |
607 | .bus_delay = 100 /* usec */, | |
00642f66 PJ |
608 | .sda_pin = 44, |
609 | .scl_pin = 43, | |
7bff3c4c DB |
610 | }; |
611 | ||
612 | static void __init evm_init_i2c(void) | |
613 | { | |
614 | davinci_init_i2c(&i2c_pdata); | |
d0e47fba | 615 | i2c_add_driver(&dm6446evm_msp_driver); |
7bff3c4c DB |
616 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); |
617 | } | |
618 | ||
7c6337e2 | 619 | static struct platform_device *davinci_evm_devices[] __initdata = { |
d0e47fba KH |
620 | &davinci_fb_device, |
621 | &rtc_dev, | |
622 | }; | |
623 | ||
624 | static struct davinci_uart_config uart_config __initdata = { | |
625 | .enabled_uarts = (1 << 0), | |
7c6337e2 KH |
626 | }; |
627 | ||
628 | static void __init | |
629 | davinci_evm_map_io(void) | |
630 | { | |
ab8e8df8 MK |
631 | /* setup input configuration for VPFE input devices */ |
632 | dm644x_set_vpfe_config(&vpfe_cfg); | |
d0e47fba | 633 | dm644x_init(); |
7c6337e2 KH |
634 | } |
635 | ||
d0e47fba | 636 | static int davinci_phy_fixup(struct phy_device *phydev) |
7c6337e2 | 637 | { |
d0e47fba KH |
638 | unsigned int control; |
639 | /* CRITICAL: Fix for increasing PHY signal drive strength for | |
640 | * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY | |
641 | * signal strength was low causing TX to fail randomly. The | |
642 | * fix is to Set bit 11 (Increased MII drive strength) of PHY | |
643 | * register 26 (Digital Config register) on this phy. */ | |
644 | control = phy_read(phydev, 26); | |
645 | phy_write(phydev, 26, (control | 0x800)); | |
646 | return 0; | |
647 | } | |
648 | ||
7bff3c4c DB |
649 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ |
650 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | |
d0e47fba KH |
651 | #define HAS_ATA 1 |
652 | #else | |
653 | #define HAS_ATA 0 | |
654 | #endif | |
655 | ||
7bff3c4c DB |
656 | #if defined(CONFIG_MTD_PHYSMAP) || \ |
657 | defined(CONFIG_MTD_PHYSMAP_MODULE) | |
d0e47fba KH |
658 | #define HAS_NOR 1 |
659 | #else | |
660 | #define HAS_NOR 0 | |
7bff3c4c | 661 | #endif |
d0e47fba KH |
662 | |
663 | #if defined(CONFIG_MTD_NAND_DAVINCI) || \ | |
664 | defined(CONFIG_MTD_NAND_DAVINCI_MODULE) | |
665 | #define HAS_NAND 1 | |
666 | #else | |
667 | #define HAS_NAND 0 | |
7c6337e2 KH |
668 | #endif |
669 | ||
d0e47fba KH |
670 | static __init void davinci_evm_init(void) |
671 | { | |
672 | struct clk *aemif_clk; | |
972412b6 | 673 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
d0e47fba KH |
674 | |
675 | aemif_clk = clk_get(NULL, "aemif"); | |
676 | clk_enable(aemif_clk); | |
677 | ||
678 | if (HAS_ATA) { | |
679 | if (HAS_NAND || HAS_NOR) | |
680 | pr_warning("WARNING: both IDE and Flash are " | |
681 | "enabled, but they share AEMIF pins.\n" | |
682 | "\tDisable IDE for NAND/NOR support.\n"); | |
7a9978a1 | 683 | davinci_init_ide(); |
d0e47fba KH |
684 | } else if (HAS_NAND || HAS_NOR) { |
685 | davinci_cfg_reg(DM644X_HPIEN_DISABLE); | |
686 | davinci_cfg_reg(DM644X_ATAEN_DISABLE); | |
687 | ||
688 | /* only one device will be jumpered and detected */ | |
689 | if (HAS_NAND) { | |
690 | platform_device_register(&davinci_evm_nandflash_device); | |
691 | evm_leds[7].default_trigger = "nand-disk"; | |
692 | if (HAS_NOR) | |
693 | pr_warning("WARNING: both NAND and NOR flash " | |
694 | "are enabled; disable one of them.\n"); | |
695 | } else if (HAS_NOR) | |
696 | platform_device_register(&davinci_evm_norflash_device); | |
697 | } | |
698 | ||
7c6337e2 KH |
699 | platform_add_devices(davinci_evm_devices, |
700 | ARRAY_SIZE(davinci_evm_devices)); | |
7bff3c4c | 701 | evm_init_i2c(); |
d0e47fba | 702 | |
2dbf56ae KH |
703 | davinci_setup_mmc(0, &dm6446evm_mmc_config); |
704 | ||
d0e47fba | 705 | davinci_serial_init(&uart_config); |
25acf553 | 706 | dm644x_init_asp(&dm644x_evm_snd_data); |
d0e47fba | 707 | |
782f2d78 | 708 | soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; |
d0e47fba KH |
709 | /* Register the fixup for PHY on DaVinci */ |
710 | phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, | |
711 | davinci_phy_fixup); | |
712 | ||
7c6337e2 KH |
713 | } |
714 | ||
d0e47fba | 715 | MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") |
7c6337e2 | 716 | /* Maintainer: MontaVista Software <source@mvista.com> */ |
7c6337e2 KH |
717 | .boot_params = (DAVINCI_DDR_BASE + 0x100), |
718 | .map_io = davinci_evm_map_io, | |
bd808947 | 719 | .init_irq = davinci_irq_init, |
7c6337e2 KH |
720 | .timer = &davinci_timer, |
721 | .init_machine = davinci_evm_init, | |
722 | MACHINE_END |