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Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
75929f5e 20#include <linux/input.h>
0bc20bba 21#include <linux/mfd/tps6507x.h>
5cbdf276 22#include <linux/gpio.h>
75929f5e 23#include <linux/gpio_keys.h>
38beb929
SR		 24#include <linux/platform_device.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
7c5ec609 28#include <linux/mtd/physmap.h>
a9eb1f67 29#include <linux/regulator/machine.h>
8b24599e 30#include <linux/regulator/tps6507x.h>
da1e3680 31#include <linux/input/tps6507x-ts.h>
0fbc5592
SR		 32
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35
0fbc5592
SR		 36#include <mach/cp_intc.h>
37#include <mach/da8xx.h>
38beb929 38#include <mach/nand.h>
7761ef67 39#include <mach/mux.h>
18a8505c 40#include <mach/aemif.h>
0fbc5592 41
782f2d78 42#define DA850_EVM_PHY_ID "0:00"
7761ef67 43#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 44#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 45
700691f2
SR		 46#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
47#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
48
2206771c
C		 49#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
50
7c5ec609
SR		 51static struct mtd_partition da850_evm_norflash_partition[] = {
52 {
e2abd5a2 53 .name = "bootloaders + env",
7c5ec609 54 .offset = 0,
e2abd5a2
SR		 55 .size = SZ_512K,
56 .mask_flags = MTD_WRITEABLE,
57 },
58 {
59 .name = "kernel",
60 .offset = MTDPART_OFS_APPEND,
61 .size = SZ_2M,
62 .mask_flags = 0,
63 },
64 {
65 .name = "filesystem",
66 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 67 .size = MTDPART_SIZ_FULL,
68 .mask_flags = 0,
69 },
70};
71
72static struct physmap_flash_data da850_evm_norflash_data = {
73 .width = 2,
74 .parts = da850_evm_norflash_partition,
75 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
76};
77
78static struct resource da850_evm_norflash_resource[] = {
79 {
80 .start = DA8XX_AEMIF_CS2_BASE,
81 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
82 .flags = IORESOURCE_MEM,
83 },
84};
85
86static struct platform_device da850_evm_norflash_device = {
87 .name = "physmap-flash",
88 .id = 0,
89 .dev = {
90 .platform_data = &da850_evm_norflash_data,
91 },
92 .num_resources = 1,
93 .resource = da850_evm_norflash_resource,
94};
95
63534443
SN		 96static struct davinci_pm_config da850_pm_pdata = {
97 .sleepcount = 128,
98};
99
100static struct platform_device da850_pm_device = {
101 .name = "pm-davinci",
102 .dev = {
103 .platform_data = &da850_pm_pdata,
104 },
105 .id = -1,
106};
107
38beb929
SR		 108/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
109 * (128K blocks). It may be used instead of the (default) SPI flash
110 * to boot, using TI's tools to install the secondary boot loader
111 * (UBL) and U-Boot.
112 */
db549d22 113static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 114 {
115 .name = "u-boot env",
116 .offset = 0,
117 .size = SZ_128K,
118 .mask_flags = MTD_WRITEABLE,
119 },
120 {
121 .name = "UBL",
122 .offset = MTDPART_OFS_APPEND,
123 .size = SZ_128K,
124 .mask_flags = MTD_WRITEABLE,
125 },
126 {
127 .name = "u-boot",
128 .offset = MTDPART_OFS_APPEND,
129 .size = 4 * SZ_128K,
130 .mask_flags = MTD_WRITEABLE,
131 },
132 {
133 .name = "kernel",
134 .offset = 0x200000,
135 .size = SZ_2M,
136 .mask_flags = 0,
137 },
138 {
139 .name = "filesystem",
140 .offset = MTDPART_OFS_APPEND,
141 .size = MTDPART_SIZ_FULL,
142 .mask_flags = 0,
143 },
144};
145
18a8505c
SN		 146static struct davinci_aemif_timing da850_evm_nandflash_timing = {
147 .wsetup = 24,
148 .wstrobe = 21,
149 .whold = 14,
150 .rsetup = 19,
151 .rstrobe = 50,
152 .rhold = 0,
153 .ta = 20,
154};
155
38beb929
SR		 156static struct davinci_nand_pdata da850_evm_nandflash_data = {
157 .parts = da850_evm_nandflash_partition,
158 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
159 .ecc_mode = NAND_ECC_HW,
fc42e335 160 .ecc_bits = 4,
38beb929 161 .options = NAND_USE_FLASH_BBT,
18a8505c 162 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 163};
164
165static struct resource da850_evm_nandflash_resource[] = {
166 {
167 .start = DA8XX_AEMIF_CS3_BASE,
168 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
169 .flags = IORESOURCE_MEM,
170 },
171 {
172 .start = DA8XX_AEMIF_CTL_BASE,
173 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
174 .flags = IORESOURCE_MEM,
175 },
176};
177
178static struct platform_device da850_evm_nandflash_device = {
179 .name = "davinci_nand",
180 .id = 1,
181 .dev = {
182 .platform_data = &da850_evm_nandflash_data,
183 },
184 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
185 .resource = da850_evm_nandflash_resource,
186};
187
039c5ee3
SR		 188static struct platform_device *da850_evm_devices[] __initdata = {
189 &da850_evm_nandflash_device,
190 &da850_evm_norflash_device,
191};
192
193#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
194#define DA8XX_AEMIF_ASIZE_16BIT 0x1
195
196static void __init da850_evm_init_nor(void)
197{
198 void __iomem *aemif_addr;
199
200 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
201
202 /* Configure data bus width of CS2 to 16 bit */
203 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
204 DA8XX_AEMIF_ASIZE_16BIT,
205 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
206
207 iounmap(aemif_addr);
208}
209
f48ecc2f
SS		 210static const short da850_evm_nand_pins[] = {
211 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
212 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
213 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
214 DA850_NEMA_WE, DA850_NEMA_OE,
215 -1
216};
217
218static const short da850_evm_nor_pins[] = {
219 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
220 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
221 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
222 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
223 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
224 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
225 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
226 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
227 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
228 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
229 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
230 DA850_EMA_A_22, DA850_EMA_A_23,
231 -1
232};
233
75e2ea64 234static u32 ui_card_detected;
039c5ee3
SR		 235
236#if defined(CONFIG_MMC_DAVINCI) || \
237 defined(CONFIG_MMC_DAVINCI_MODULE)
238#define HAS_MMC 1
239#else
240#define HAS_MMC 0
241#endif
242
f48ecc2f 243static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 244{
245 int ret = 0;
246
247 if (ui_card_detected & !HAS_MMC) {
f48ecc2f 248 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 249 if (ret)
250 pr_warning("da850_evm_init: nand mux setup failed: "
251 "%d\n", ret);
252
f48ecc2f 253 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 254 if (ret)
255 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
256 ret);
257
258 da850_evm_init_nor();
259
260 platform_add_devices(da850_evm_devices,
261 ARRAY_SIZE(da850_evm_devices));
262 }
263}
75e2ea64 264
bae10587
SN		 265#ifdef CONFIG_DA850_UI_RMII
266static inline void da850_evm_setup_emac_rmii(int rmii_sel)
267{
268 struct davinci_soc_info *soc_info = &davinci_soc_info;
269
270 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 271 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 272}
273#else
274static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
275#endif
276
75929f5e
BG		 277
278#define DA850_KEYS_DEBOUNCE_MS 10
279/*
280 * At 200ms polling interval it is possible to miss an
281 * event by tapping very lightly on the push button but most
282 * pushes do result in an event; longer intervals require the
283 * user to hold the button whereas shorter intervals require
284 * more CPU time for polling.
285 */
286#define DA850_GPIO_KEYS_POLL_MS 200
287
288enum da850_evm_ui_exp_pins {
289 DA850_EVM_UI_EXP_SEL_C = 5,
290 DA850_EVM_UI_EXP_SEL_B,
291 DA850_EVM_UI_EXP_SEL_A,
292 DA850_EVM_UI_EXP_PB8,
293 DA850_EVM_UI_EXP_PB7,
294 DA850_EVM_UI_EXP_PB6,
295 DA850_EVM_UI_EXP_PB5,
296 DA850_EVM_UI_EXP_PB4,
297 DA850_EVM_UI_EXP_PB3,
298 DA850_EVM_UI_EXP_PB2,
299 DA850_EVM_UI_EXP_PB1,
300};
301
302static const char const *da850_evm_ui_exp[] = {
303 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
304 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
305 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
306 [DA850_EVM_UI_EXP_PB8] = "pb8",
307 [DA850_EVM_UI_EXP_PB7] = "pb7",
308 [DA850_EVM_UI_EXP_PB6] = "pb6",
309 [DA850_EVM_UI_EXP_PB5] = "pb5",
310 [DA850_EVM_UI_EXP_PB4] = "pb4",
311 [DA850_EVM_UI_EXP_PB3] = "pb3",
312 [DA850_EVM_UI_EXP_PB2] = "pb2",
313 [DA850_EVM_UI_EXP_PB1] = "pb1",
314};
315
316#define DA850_N_UI_PB 8
317
318static struct gpio_keys_button da850_evm_ui_keys[] = {
319 [0 ... DA850_N_UI_PB - 1] = {
320 .type = EV_KEY,
321 .active_low = 1,
322 .wakeup = 0,
323 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
324 .code = -1, /* assigned at runtime */
325 .gpio = -1, /* assigned at runtime */
326 .desc = NULL, /* assigned at runtime */
327 },
328};
329
330static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
331 .buttons = da850_evm_ui_keys,
332 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
333 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
334};
335
336static struct platform_device da850_evm_ui_keys_device = {
337 .name = "gpio-keys-polled",
338 .id = 0,
339 .dev = {
340 .platform_data = &da850_evm_ui_keys_pdata
341 },
342};
343
344static void da850_evm_ui_keys_init(unsigned gpio)
345{
346 int i;
347 struct gpio_keys_button *button;
348
349 for (i = 0; i < DA850_N_UI_PB; i++) {
350 button = &da850_evm_ui_keys[i];
351 button->code = KEY_F8 - i;
352 button->desc = (char *)
353 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
354 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
355 }
356}
357
75e2ea64
C		 358static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
359 unsigned ngpio, void *c)
360{
361 int sel_a, sel_b, sel_c, ret;
362
53c2897d
BG		 363 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
364 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
365 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 366
53c2897d 367 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64
C		 368 if (ret) {
369 pr_warning("Cannot open UI expander pin %d\n", sel_a);
370 goto exp_setup_sela_fail;
371 }
372
53c2897d 373 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64
C		 374 if (ret) {
375 pr_warning("Cannot open UI expander pin %d\n", sel_b);
376 goto exp_setup_selb_fail;
377 }
378
53c2897d 379 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64
C		 380 if (ret) {
381 pr_warning("Cannot open UI expander pin %d\n", sel_c);
382 goto exp_setup_selc_fail;
383 }
384
385 /* deselect all functionalities */
386 gpio_direction_output(sel_a, 1);
387 gpio_direction_output(sel_b, 1);
388 gpio_direction_output(sel_c, 1);
389
75929f5e
BG		 390 da850_evm_ui_keys_init(gpio);
391 ret = platform_device_register(&da850_evm_ui_keys_device);
392 if (ret) {
393 pr_warning("Could not register UI GPIO expander push-buttons");
394 goto exp_setup_keys_fail;
395 }
396
75e2ea64
C		 397 ui_card_detected = 1;
398 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
399
400 da850_evm_setup_nor_nand();
401
bae10587 402 da850_evm_setup_emac_rmii(sel_a);
2206771c 403
75e2ea64
C		 404 return 0;
405
75929f5e
BG		 406exp_setup_keys_fail:
407 gpio_free(sel_c);
75e2ea64
C		 408exp_setup_selc_fail:
409 gpio_free(sel_b);
410exp_setup_selb_fail:
411 gpio_free(sel_a);
412exp_setup_sela_fail:
413 return ret;
414}
415
416static int da850_evm_ui_expander_teardown(struct i2c_client *client,
417 unsigned gpio, unsigned ngpio, void *c)
418{
75929f5e
BG		 419 platform_device_unregister(&da850_evm_ui_keys_device);
420
75e2ea64 421 /* deselect all functionalities */
53c2897d
BG		 422 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
423 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
424 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 425
53c2897d
BG		 426 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
427 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
428 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 429
430 return 0;
431}
432
70b30939
BG		 433/* assign the baseboard expander's GPIOs after the UI board's */
434#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
435#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
436
437enum da850_evm_bb_exp_pins {
438 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
439 DA850_EVM_BB_EXP_SW_RST,
440 DA850_EVM_BB_EXP_TP_23,
441 DA850_EVM_BB_EXP_TP_22,
442 DA850_EVM_BB_EXP_TP_21,
443 DA850_EVM_BB_EXP_USER_PB1,
444 DA850_EVM_BB_EXP_USER_LED2,
445 DA850_EVM_BB_EXP_USER_LED1,
446 DA850_EVM_BB_EXP_USER_SW1,
447 DA850_EVM_BB_EXP_USER_SW2,
448 DA850_EVM_BB_EXP_USER_SW3,
449 DA850_EVM_BB_EXP_USER_SW4,
450 DA850_EVM_BB_EXP_USER_SW5,
451 DA850_EVM_BB_EXP_USER_SW6,
452 DA850_EVM_BB_EXP_USER_SW7,
453 DA850_EVM_BB_EXP_USER_SW8
454};
455
456static const char const *da850_evm_bb_exp[] = {
457 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
458 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
459 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
460 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
461 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
462 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
463 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
464 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
465 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
466 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
467 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
468 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
469 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
470 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
471 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
472 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
473};
474
475#define DA850_N_BB_USER_SW 8
476
477static struct gpio_keys_button da850_evm_bb_keys[] = {
478 [0] = {
479 .type = EV_KEY,
480 .active_low = 1,
481 .wakeup = 0,
482 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
483 .code = KEY_PROG1,
484 .desc = NULL, /* assigned at runtime */
485 .gpio = -1, /* assigned at runtime */
486 },
487 [1 ... DA850_N_BB_USER_SW] = {
488 .type = EV_SW,
489 .active_low = 1,
490 .wakeup = 0,
491 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
492 .code = -1, /* assigned at runtime */
493 .desc = NULL, /* assigned at runtime */
494 .gpio = -1, /* assigned at runtime */
495 },
496};
497
498static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
499 .buttons = da850_evm_bb_keys,
500 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
501 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
502};
503
504static struct platform_device da850_evm_bb_keys_device = {
505 .name = "gpio-keys-polled",
506 .id = 1,
507 .dev = {
508 .platform_data = &da850_evm_bb_keys_pdata
509 },
510};
511
512static void da850_evm_bb_keys_init(unsigned gpio)
513{
514 int i;
515 struct gpio_keys_button *button;
516
517 button = &da850_evm_bb_keys[0];
518 button->desc = (char *)
519 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
520 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
521
522 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
523 button = &da850_evm_bb_keys[i + 1];
524 button->code = SW_LID + i;
525 button->desc = (char *)
526 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
527 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
528 }
529}
530
531#define DA850_N_BB_USER_LED 2
532
533static struct gpio_led da850_evm_bb_leds[] = {
534 [0 ... DA850_N_BB_USER_LED - 1] = {
535 .active_low = 1,
536 .gpio = -1, /* assigned at runtime */
537 .name = NULL, /* assigned at runtime */
538 },
539};
540
541static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
542 .leds = da850_evm_bb_leds,
543 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
544};
545
546static struct platform_device da850_evm_bb_leds_device = {
547 .name = "leds-gpio",
548 .id = -1,
549 .dev = {
550 .platform_data = &da850_evm_bb_leds_pdata
551 }
552};
553
554static void da850_evm_bb_leds_init(unsigned gpio)
555{
556 int i;
557 struct gpio_led *led;
558
559 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
560 led = &da850_evm_bb_leds[i];
561
562 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
563 led->name =
564 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
565 }
566}
567
568static int da850_evm_bb_expander_setup(struct i2c_client *client,
569 unsigned gpio, unsigned ngpio,
570 void *c)
571{
572 int ret;
573
574 /*
575 * Register the switches and pushbutton on the baseboard as a gpio-keys
576 * device.
577 */
578 da850_evm_bb_keys_init(gpio);
579 ret = platform_device_register(&da850_evm_bb_keys_device);
580 if (ret) {
581 pr_warning("Could not register baseboard GPIO expander keys");
582 goto io_exp_setup_sw_fail;
583 }
584
585 da850_evm_bb_leds_init(gpio);
586 ret = platform_device_register(&da850_evm_bb_leds_device);
587 if (ret) {
588 pr_warning("Could not register baseboard GPIO expander LEDS");
589 goto io_exp_setup_leds_fail;
590 }
591
592 return 0;
593
594io_exp_setup_leds_fail:
595 platform_device_unregister(&da850_evm_bb_keys_device);
596io_exp_setup_sw_fail:
597 return ret;
598}
599
600static int da850_evm_bb_expander_teardown(struct i2c_client *client,
601 unsigned gpio, unsigned ngpio, void *c)
602{
603 platform_device_unregister(&da850_evm_bb_leds_device);
604 platform_device_unregister(&da850_evm_bb_keys_device);
605
606 return 0;
607}
608
75e2ea64
C		 609static struct pca953x_platform_data da850_evm_ui_expander_info = {
610 .gpio_base = DAVINCI_N_GPIO,
611 .setup = da850_evm_ui_expander_setup,
612 .teardown = da850_evm_ui_expander_teardown,
75929f5e 613 .names = da850_evm_ui_exp,
75e2ea64
C		 614};
615
70b30939
BG		 616static struct pca953x_platform_data da850_evm_bb_expander_info = {
617 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
618 .setup = da850_evm_bb_expander_setup,
619 .teardown = da850_evm_bb_expander_teardown,
620 .names = da850_evm_bb_exp,
621};
622
1a7ff8ff
C		 623static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
624 {
625 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 626 },
627 {
628 I2C_BOARD_INFO("tca6416", 0x20),
629 .platform_data = &da850_evm_ui_expander_info,
630 },
70b30939
BG		 631 {
632 I2C_BOARD_INFO("tca6416", 0x21),
633 .platform_data = &da850_evm_bb_expander_info,
634 },
1a7ff8ff
C		 635};
636
0fbc5592
SR		 637static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
638 .bus_freq = 100, /* kHz */
639 .bus_delay = 0, /* usec */
640};
641
642static struct davinci_uart_config da850_evm_uart_config __initdata = {
643 .enabled_uarts = 0x7,
644};
645
491214e1
C		 646/* davinci da850 evm audio machine driver */
647static u8 da850_iis_serializer_direction[] = {
648 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
649 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
650 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
651 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
652};
653
654static struct snd_platform_data da850_evm_snd_data = {
655 .tx_dma_offset = 0x2000,
656 .rx_dma_offset = 0x2000,
657 .op_mode = DAVINCI_MCASP_IIS_MODE,
658 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
659 .tdm_slots = 2,
660 .serial_dir = da850_iis_serializer_direction,
48519f0a 661 .asp_chan_q = EVENTQ_1,
491214e1
C		 662 .version = MCASP_VERSION_2,
663 .txnumevt = 1,
664 .rxnumevt = 1,
665};
666
700691f2
SR		 667static int da850_evm_mmc_get_ro(int index)
668{
669 return gpio_get_value(DA850_MMCSD_WP_PIN);
670}
671
672static int da850_evm_mmc_get_cd(int index)
673{
674 return !gpio_get_value(DA850_MMCSD_CD_PIN);
675}
676
677static struct davinci_mmc_config da850_mmc_config = {
678 .get_ro = da850_evm_mmc_get_ro,
679 .get_cd = da850_evm_mmc_get_cd,
680 .wires = 4,
0046d0bf
C		 681 .max_freq = 50000000,
682 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 683 .version = MMC_CTLR_VERSION_2,
684};
685
d52f235f
C		 686static void da850_panel_power_ctrl(int val)
687{
688 /* lcd backlight */
689 gpio_set_value(DA850_LCD_BL_PIN, val);
690
691 /* lcd power */
692 gpio_set_value(DA850_LCD_PWR_PIN, val);
693}
694
5cbdf276
SR		 695static int da850_lcd_hw_init(void)
696{
697 int status;
698
699 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
700 if (status < 0)
701 return status;
702
703 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
704 if (status < 0) {
705 gpio_free(DA850_LCD_BL_PIN);
706 return status;
707 }
708
709 gpio_direction_output(DA850_LCD_BL_PIN, 0);
710 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
711
d52f235f
C		 712 /* Switch off panel power and backlight */
713 da850_panel_power_ctrl(0);
5cbdf276 714
d52f235f
C		 715 /* Switch on panel power and backlight */
716 da850_panel_power_ctrl(1);
5cbdf276
SR		 717
718 return 0;
719}
491214e1 720
a9eb1f67
SN		 721/* TPS65070 voltage regulator support */
722
723/* 3.3V */
db549d22 724static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 725 {
726 .supply = "usb0_vdda33",
727 },
728 {
729 .supply = "usb1_vdda33",
730 },
731};
732
733/* 3.3V or 1.8V */
db549d22 734static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 735 {
736 .supply = "dvdd3318_a",
737 },
738 {
739 .supply = "dvdd3318_b",
740 },
741 {
742 .supply = "dvdd3318_c",
743 },
744};
745
746/* 1.2V */
db549d22 747static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 748 {
749 .supply = "cvdd",
750 },
751};
752
753/* 1.8V LDO */
db549d22 754static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 755 {
756 .supply = "sata_vddr",
757 },
758 {
759 .supply = "usb0_vdda18",
760 },
761 {
762 .supply = "usb1_vdda18",
763 },
764 {
765 .supply = "ddr_dvdd18",
766 },
767};
768
769/* 1.2V LDO */
db549d22 770static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 771 {
772 .supply = "sata_vdd",
773 },
774 {
775 .supply = "pll0_vdda",
776 },
777 {
778 .supply = "pll1_vdda",
779 },
780 {
781 .supply = "usbs_cvdd",
782 },
783 {
784 .supply = "vddarnwa1",
785 },
786};
787
8b24599e
SN		 788/* We take advantage of the fact that both defdcdc{2,3} are tied high */
789static struct tps6507x_reg_platform_data tps6507x_platform_data = {
790 .defdcdc_default = true,
791};
792
db549d22 793static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 794 /* dcdc1 */
795 {
796 .constraints = {
797 .min_uV = 3150000,
798 .max_uV = 3450000,
799 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
800 REGULATOR_CHANGE_STATUS),
801 .boot_on = 1,
802 },
803 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
804 .consumer_supplies = tps65070_dcdc1_consumers,
805 },
806
807 /* dcdc2 */
808 {
809 .constraints = {
810 .min_uV = 1710000,
811 .max_uV = 3450000,
812 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
813 REGULATOR_CHANGE_STATUS),
814 .boot_on = 1,
815 },
816 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
817 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 818 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 819 },
820
821 /* dcdc3 */
822 {
823 .constraints = {
824 .min_uV = 950000,
28bd2c34 825 .max_uV = 1350000,
a9eb1f67
SN		 826 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
827 REGULATOR_CHANGE_STATUS),
828 .boot_on = 1,
829 },
830 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
831 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 832 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 833 },
834
835 /* ldo1 */
836 {
837 .constraints = {
838 .min_uV = 1710000,
839 .max_uV = 1890000,
840 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
841 REGULATOR_CHANGE_STATUS),
842 .boot_on = 1,
843 },
844 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
845 .consumer_supplies = tps65070_ldo1_consumers,
846 },
847
848 /* ldo2 */
849 {
850 .constraints = {
851 .min_uV = 1140000,
852 .max_uV = 1320000,
853 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
854 REGULATOR_CHANGE_STATUS),
855 .boot_on = 1,
856 },
857 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
858 .consumer_supplies = tps65070_ldo2_consumers,
859 },
860};
861
da1e3680
TF		 862static struct touchscreen_init_data tps6507x_touchscreen_data = {
863 .poll_period = 30, /* ms between touch samples */
864 .min_pressure = 0x30, /* minimum pressure to trigger touch */
865 .vref = 0, /* turn off vref when not using A/D */
866 .vendor = 0, /* /sys/class/input/input?/id/vendor */
867 .product = 65070, /* /sys/class/input/input?/id/product */
868 .version = 0x100, /* /sys/class/input/input?/id/version */
869};
870
0bc20bba
TF		 871static struct tps6507x_board tps_board = {
872 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 873 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 874};
875
3506f277 876static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 877 {
878 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 879 .platform_data = &tps_board,
a9eb1f67
SN		 880 },
881};
882
883static int __init pmic_tps65070_init(void)
884{
3506f277
BG		 885 return i2c_register_board_info(1, da850_evm_tps65070_info,
886 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 887}
888
7761ef67
SR		 889static const short da850_evm_lcdc_pins[] = {
890 DA850_GPIO2_8, DA850_GPIO2_15,
891 -1
892};
893
85b8307f
SS		 894static const short da850_evm_mii_pins[] = {
895 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
896 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
897 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
898 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
899 DA850_MDIO_D,
900 -1
901};
902
903static const short da850_evm_rmii_pins[] = {
904 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
905 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
906 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
907 DA850_MDIO_D,
908 -1
909};
910
bae10587 911static int __init da850_evm_config_emac(void)
2206771c
C		 912{
913 void __iomem *cfg_chip3_base;
914 int ret;
915 u32 val;
bae10587
SN		 916 struct davinci_soc_info *soc_info = &davinci_soc_info;
917 u8 rmii_en = soc_info->emac_pdata->rmii_en;
918
919 if (!machine_is_davinci_da850_evm())
920 return 0;
2206771c 921
d2de0582 922 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 923
2206771c 924 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 925
926 if (rmii_en) {
2206771c 927 val |= BIT(8);
85b8307f 928 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 929 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
930 " functional\n");
931 } else {
2206771c 932 val &= ~BIT(8);
85b8307f 933 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 934 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
935 " functional\n");
936 }
937
2206771c
C		 938 if (ret)
939 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
940 ret);
941
17fadd9a
SN		 942 /* configure the CFGCHIP3 register for RMII or MII */
943 __raw_writel(val, cfg_chip3_base);
944
2206771c
C		 945 ret = davinci_cfg_reg(DA850_GPIO2_6);
946 if (ret)
947 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
948 "failed\n");
949
950 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
951 if (ret) {
952 pr_warning("Cannot open GPIO %d\n",
953 DA850_MII_MDIO_CLKEN_PIN);
954 return ret;
955 }
956
17fadd9a
SN		 957 /* Enable/Disable MII MDIO clock */
958 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 959
782f2d78 960 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 961
962 ret = da8xx_register_emac();
963 if (ret)
964 pr_warning("da850_evm_init: emac registration failed: %d\n",
965 ret);
966
2206771c
C		 967 return 0;
968}
bae10587 969device_initcall(da850_evm_config_emac);
2206771c 970
a941c503
RS		 971/*
972 * The following EDMA channels/slots are not being used by drivers (for
973 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
974 * they are being reserved for codecs on the DSP side.
975 */
976static const s16 da850_dma0_rsv_chans[][2] = {
977 /* (offset, number) */
978 { 8, 6},
979 {24, 4},
980 {30, 2},
981 {-1, -1}
982};
983
984static const s16 da850_dma0_rsv_slots[][2] = {
985 /* (offset, number) */
986 { 8, 6},
987 {24, 4},
988 {30, 50},
989 {-1, -1}
990};
991
992static const s16 da850_dma1_rsv_chans[][2] = {
993 /* (offset, number) */
994 { 0, 28},
995 {30, 2},
996 {-1, -1}
997};
998
999static const s16 da850_dma1_rsv_slots[][2] = {
1000 /* (offset, number) */
1001 { 0, 28},
1002 {30, 90},
1003 {-1, -1}
1004};
1005
1006static struct edma_rsv_info da850_edma_cc0_rsv = {
1007 .rsv_chans = da850_dma0_rsv_chans,
1008 .rsv_slots = da850_dma0_rsv_slots,
1009};
1010
1011static struct edma_rsv_info da850_edma_cc1_rsv = {
1012 .rsv_chans = da850_dma1_rsv_chans,
1013 .rsv_slots = da850_dma1_rsv_slots,
1014};
1015
1016static struct edma_rsv_info *da850_edma_rsv[2] = {
1017 &da850_edma_cc0_rsv,
1018 &da850_edma_cc1_rsv,
1019};
1020
28bd2c34
SN		 1021#ifdef CONFIG_CPU_FREQ
1022static __init int da850_evm_init_cpufreq(void)
1023{
1024 switch (system_rev & 0xF) {
1025 case 3:
1026 da850_max_speed = 456000;
1027 break;
1028 case 2:
1029 da850_max_speed = 408000;
1030 break;
1031 case 1:
1032 da850_max_speed = 372000;
1033 break;
1034 }
1035
1036 return da850_register_cpufreq("pll0_sysclk3");
1037}
1038#else
1039static __init int da850_evm_init_cpufreq(void) { return 0; }
1040#endif
1041
0fbc5592
SR		 1042static __init void da850_evm_init(void)
1043{
1044 int ret;
1045
a9eb1f67
SN		 1046 ret = pmic_tps65070_init();
1047 if (ret)
1048 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
1049 ret);
1050
a941c503 1051 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 1052 if (ret)
1053 pr_warning("da850_evm_init: edma registration failed: %d\n",
1054 ret);
1055
3821d10a 1056 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 1057 if (ret)
1058 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
1059 ret);
1060
1061 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1062 if (ret)
1063 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
1064 ret);
1065
5a4b1315 1066
0fbc5592
SR		 1067 ret = da8xx_register_watchdog();
1068 if (ret)
1069 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
1070 ret);
1071
820c4fe3 1072 if (HAS_MMC) {
3821d10a 1073 ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
820c4fe3
SR		 1074 if (ret)
1075 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1076 " %d\n", ret);
1077
1078 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1079 if (ret)
1080 pr_warning("da850_evm_init: can not open GPIO %d\n",
1081 DA850_MMCSD_CD_PIN);
1082 gpio_direction_input(DA850_MMCSD_CD_PIN);
1083
1084 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1085 if (ret)
1086 pr_warning("da850_evm_init: can not open GPIO %d\n",
1087 DA850_MMCSD_WP_PIN);
1088 gpio_direction_input(DA850_MMCSD_WP_PIN);
1089
1090 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1091 if (ret)
1092 pr_warning("da850_evm_init: mmcsd0 registration failed:"
1093 " %d\n", ret);
1094 }
700691f2 1095
0fbc5592
SR		 1096 davinci_serial_init(&da850_evm_uart_config);
1097
1a7ff8ff
C		 1098 i2c_register_board_info(1, da850_evm_i2c_devices,
1099 ARRAY_SIZE(da850_evm_i2c_devices));
1100
0fbc5592
SR		 1101 /*
1102 * shut down uart 0 and 1; they are not used on the board and
1103 * accessing them causes endless "too much work in irq53" messages
1104 * with arago fs
1105 */
1106 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1107 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1108
3821d10a 1109 ret = davinci_cfg_reg_list(da850_mcasp_pins);
491214e1
C		 1110 if (ret)
1111 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1112 ret);
1113
b8864aa4 1114 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1115
3821d10a 1116 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 1117 if (ret)
1118 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
1119 ret);
1120
7761ef67 1121 /* Handle board specific muxing for LCD here */
3821d10a 1122 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 1123 if (ret)
1124 pr_warning("da850_evm_init: evm specific lcd mux setup "
1125 "failed: %d\n", ret);
1126
5cbdf276
SR		 1127 ret = da850_lcd_hw_init();
1128 if (ret)
1129 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
1130 ret);
1131
d52f235f 1132 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1133 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 1134 if (ret)
1135 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
1136 ret);
c51df70b
MG		 1137
1138 ret = da8xx_register_rtc();
1139 if (ret)
1140 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 1141
28bd2c34 1142 ret = da850_evm_init_cpufreq();
09dc2d45
SN		 1143 if (ret)
1144 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
1145 ret);
5aeb15aa
SN		 1146
1147 ret = da8xx_register_cpuidle();
1148 if (ret)
1149 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
1150 ret);
63534443
SN		 1151
1152 ret = da850_register_pm(&da850_pm_device);
1153 if (ret)
1154 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1155 ret);
0fbc5592
SR		 1156}
1157
1158#ifdef CONFIG_SERIAL_8250_CONSOLE
1159static int __init da850_evm_console_init(void)
1160{
1aa5f2a9
MW		 1161 if (!machine_is_davinci_da850_evm())
1162 return 0;
1163
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SR		 1164 return add_preferred_console("ttyS", 2, "115200");
1165}
1166console_initcall(da850_evm_console_init);
1167#endif
1168
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SR		 1169static void __init da850_evm_map_io(void)
1170{
1171 da850_init();
1172}
1173
48ea89ea 1174MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
0fbc5592
SR		 1175 .boot_params = (DA8XX_DDR_BASE + 0x100),
1176 .map_io = da850_evm_map_io,
bd808947 1177 .init_irq = cp_intc_init,
0fbc5592
SR		 1178 .timer = &davinci_timer,
1179 .init_machine = da850_evm_init,
1180MACHINE_END
kernel source for telekom puls (alcatel/mediatek)