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c9a8fdd8 AV |
1 | /* |
2 | * linux/arch/arm/mach-at91/board-at572d940hf_ek.c | |
3 | * | |
4 | * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com> | |
5 | * Copyright (C) 2005 SAN People | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
22 | #include <linux/types.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/spi/spi.h> | |
28 | #include <linux/spi/ds1305.h> | |
29 | #include <linux/irq.h> | |
30 | #include <linux/mtd/physmap.h> | |
31 | ||
32 | #include <mach/hardware.h> | |
33 | #include <asm/setup.h> | |
34 | #include <asm/mach-types.h> | |
35 | #include <asm/irq.h> | |
36 | ||
37 | #include <asm/mach/arch.h> | |
38 | #include <asm/mach/map.h> | |
39 | #include <asm/mach/irq.h> | |
40 | ||
41 | #include <mach/board.h> | |
42 | #include <mach/gpio.h> | |
43 | #include <mach/at91sam9_smc.h> | |
44 | ||
45 | #include "sam9_smc.h" | |
46 | #include "generic.h" | |
47 | ||
48 | ||
49 | static void __init eb_map_io(void) | |
50 | { | |
51 | /* Initialize processor: 12.500 MHz crystal */ | |
52 | at572d940hf_initialize(12000000); | |
53 | ||
54 | /* DBGU on ttyS0. (Rx & Tx only) */ | |
55 | at91_register_uart(0, 0, 0); | |
56 | ||
57 | /* USART0 on ttyS1. (Rx & Tx only) */ | |
58 | at91_register_uart(AT572D940HF_ID_US0, 1, 0); | |
59 | ||
60 | /* USART1 on ttyS2. (Rx & Tx only) */ | |
61 | at91_register_uart(AT572D940HF_ID_US1, 2, 0); | |
62 | ||
63 | /* USART2 on ttyS3. (Tx & Rx only */ | |
64 | at91_register_uart(AT572D940HF_ID_US2, 3, 0); | |
65 | ||
66 | /* set serial console to ttyS0 (ie, DBGU) */ | |
67 | at91_set_serial_console(0); | |
68 | } | |
69 | ||
70 | static void __init eb_init_irq(void) | |
71 | { | |
72 | at572d940hf_init_interrupts(NULL); | |
73 | } | |
74 | ||
75 | ||
76 | /* | |
77 | * USB Host Port | |
78 | */ | |
79 | static struct at91_usbh_data __initdata eb_usbh_data = { | |
80 | .ports = 2, | |
81 | }; | |
82 | ||
83 | ||
84 | /* | |
85 | * USB Device Port | |
86 | */ | |
87 | static struct at91_udc_data __initdata eb_udc_data = { | |
88 | .vbus_pin = 0, /* no VBUS detection,UDC always on */ | |
89 | .pullup_pin = 0, /* pull-up driven by UDC */ | |
90 | }; | |
91 | ||
92 | ||
93 | /* | |
94 | * MCI (SD/MMC) | |
95 | */ | |
96 | static struct at91_mmc_data __initdata eb_mmc_data = { | |
97 | .wire4 = 1, | |
98 | /* .det_pin = ... not connected */ | |
99 | /* .wp_pin = ... not connected */ | |
100 | /* .vcc_pin = ... not connected */ | |
101 | }; | |
102 | ||
103 | ||
104 | /* | |
105 | * MACB Ethernet device | |
106 | */ | |
107 | static struct at91_eth_data __initdata eb_eth_data = { | |
108 | .phy_irq_pin = AT91_PIN_PB25, | |
109 | .is_rmii = 1, | |
110 | }; | |
111 | ||
112 | /* | |
113 | * NOR flash | |
114 | */ | |
115 | ||
116 | static struct mtd_partition eb_nor_partitions[] = { | |
117 | { | |
118 | .name = "Raw Environment", | |
119 | .offset = 0, | |
120 | .size = SZ_4M, | |
121 | .mask_flags = 0, | |
122 | }, | |
123 | { | |
124 | .name = "OS FS", | |
125 | .offset = MTDPART_OFS_APPEND, | |
126 | .size = 3 * SZ_1M, | |
127 | .mask_flags = 0, | |
128 | }, | |
129 | { | |
130 | .name = "APP FS", | |
131 | .offset = MTDPART_OFS_APPEND, | |
132 | .size = MTDPART_SIZ_FULL, | |
133 | .mask_flags = 0, | |
134 | }, | |
135 | }; | |
136 | ||
137 | static void nor_flash_set_vpp(struct map_info* mi, int i) { | |
138 | }; | |
139 | ||
140 | static struct physmap_flash_data nor_flash_data = { | |
141 | .width = 4, | |
142 | .parts = eb_nor_partitions, | |
143 | .nr_parts = ARRAY_SIZE(eb_nor_partitions), | |
144 | .set_vpp = nor_flash_set_vpp, | |
145 | }; | |
146 | ||
147 | static struct resource nor_flash_resources[] = { | |
148 | { | |
149 | .start = AT91_CHIPSELECT_0, | |
150 | .end = AT91_CHIPSELECT_0 + SZ_16M - 1, | |
151 | .flags = IORESOURCE_MEM, | |
152 | }, | |
153 | }; | |
154 | ||
155 | static struct platform_device nor_flash = { | |
156 | .name = "physmap-flash", | |
157 | .id = 0, | |
158 | .dev = { | |
159 | .platform_data = &nor_flash_data, | |
160 | }, | |
161 | .resource = nor_flash_resources, | |
162 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
163 | }; | |
164 | ||
165 | static struct sam9_smc_config __initdata eb_nor_smc_config = { | |
166 | .ncs_read_setup = 1, | |
167 | .nrd_setup = 1, | |
168 | .ncs_write_setup = 1, | |
169 | .nwe_setup = 1, | |
170 | ||
171 | .ncs_read_pulse = 7, | |
172 | .nrd_pulse = 7, | |
173 | .ncs_write_pulse = 7, | |
174 | .nwe_pulse = 7, | |
175 | ||
176 | .read_cycle = 9, | |
177 | .write_cycle = 9, | |
178 | ||
179 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_32, | |
180 | .tdf_cycles = 1, | |
181 | }; | |
182 | ||
183 | static void __init eb_add_device_nor(void) | |
184 | { | |
185 | /* configure chip-select 0 (NOR) */ | |
186 | sam9_smc_configure(0, &eb_nor_smc_config); | |
187 | platform_device_register(&nor_flash); | |
188 | } | |
189 | ||
190 | /* | |
191 | * NAND flash | |
192 | */ | |
193 | static struct mtd_partition __initdata eb_nand_partition[] = { | |
194 | { | |
195 | .name = "Partition 1", | |
196 | .offset = 0, | |
197 | .size = SZ_16M, | |
198 | }, | |
199 | { | |
200 | .name = "Partition 2", | |
201 | .offset = MTDPART_OFS_NXTBLK, | |
202 | .size = MTDPART_SIZ_FULL, | |
203 | } | |
204 | }; | |
205 | ||
206 | static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) | |
207 | { | |
208 | *num_partitions = ARRAY_SIZE(eb_nand_partition); | |
209 | return eb_nand_partition; | |
210 | } | |
211 | ||
212 | static struct atmel_nand_data __initdata eb_nand_data = { | |
213 | .ale = 22, | |
214 | .cle = 21, | |
215 | /* .det_pin = ... not connected */ | |
216 | /* .rdy_pin = AT91_PIN_PC16, */ | |
217 | .enable_pin = AT91_PIN_PA15, | |
218 | .partition_info = nand_partitions, | |
9a400da8 | 219 | #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) |
c9a8fdd8 AV |
220 | .bus_width_16 = 1, |
221 | #else | |
222 | .bus_width_16 = 0, | |
223 | #endif | |
224 | }; | |
225 | ||
226 | static struct sam9_smc_config __initdata eb_nand_smc_config = { | |
227 | .ncs_read_setup = 0, | |
228 | .nrd_setup = 0, | |
229 | .ncs_write_setup = 1, | |
230 | .nwe_setup = 1, | |
231 | ||
232 | .ncs_read_pulse = 3, | |
233 | .nrd_pulse = 3, | |
234 | .ncs_write_pulse = 3, | |
235 | .nwe_pulse = 3, | |
236 | ||
237 | .read_cycle = 5, | |
238 | .write_cycle = 5, | |
239 | ||
240 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, | |
241 | .tdf_cycles = 12, | |
242 | }; | |
243 | ||
244 | static void __init eb_add_device_nand(void) | |
245 | { | |
246 | /* setup bus-width (8 or 16) */ | |
247 | if (eb_nand_data.bus_width_16) | |
248 | eb_nand_smc_config.mode |= AT91_SMC_DBW_16; | |
249 | else | |
250 | eb_nand_smc_config.mode |= AT91_SMC_DBW_8; | |
251 | ||
252 | /* configure chip-select 3 (NAND) */ | |
253 | sam9_smc_configure(3, &eb_nand_smc_config); | |
254 | ||
255 | at91_add_device_nand(&eb_nand_data); | |
256 | } | |
257 | ||
258 | ||
259 | /* | |
260 | * SPI devices | |
261 | */ | |
262 | static struct resource rtc_resources[] = { | |
263 | [0] = { | |
264 | .start = AT572D940HF_ID_IRQ1, | |
265 | .end = AT572D940HF_ID_IRQ1, | |
266 | .flags = IORESOURCE_IRQ, | |
267 | }, | |
268 | }; | |
269 | ||
270 | static struct ds1305_platform_data ds1306_data = { | |
271 | .is_ds1306 = true, | |
272 | .en_1hz = false, | |
273 | }; | |
274 | ||
275 | static struct spi_board_info eb_spi_devices[] = { | |
276 | { /* RTC Dallas DS1306 */ | |
277 | .modalias = "rtc-ds1305", | |
278 | .chip_select = 3, | |
279 | .mode = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA, | |
280 | .max_speed_hz = 500000, | |
281 | .bus_num = 0, | |
282 | .irq = AT572D940HF_ID_IRQ1, | |
283 | .platform_data = (void *) &ds1306_data, | |
284 | }, | |
285 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | |
286 | { /* Dataflash card */ | |
287 | .modalias = "mtd_dataflash", | |
288 | .chip_select = 0, | |
289 | .max_speed_hz = 15 * 1000 * 1000, | |
290 | .bus_num = 0, | |
291 | }, | |
292 | #endif | |
293 | }; | |
294 | ||
295 | static void __init eb_board_init(void) | |
296 | { | |
297 | /* Serial */ | |
298 | at91_add_device_serial(); | |
299 | /* USB Host */ | |
300 | at91_add_device_usbh(&eb_usbh_data); | |
301 | /* USB Device */ | |
302 | at91_add_device_udc(&eb_udc_data); | |
303 | /* I2C */ | |
304 | at91_add_device_i2c(NULL, 0); | |
305 | /* NOR */ | |
306 | eb_add_device_nor(); | |
307 | /* NAND */ | |
308 | eb_add_device_nand(); | |
309 | /* SPI */ | |
310 | at91_add_device_spi(eb_spi_devices, ARRAY_SIZE(eb_spi_devices)); | |
311 | /* MMC */ | |
312 | at91_add_device_mmc(0, &eb_mmc_data); | |
313 | /* Ethernet */ | |
314 | at91_add_device_eth(&eb_eth_data); | |
315 | /* mAgic */ | |
316 | at91_add_device_mAgic(); | |
317 | } | |
318 | ||
319 | MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB") | |
320 | /* Maintainer: Atmel <costa.antonior@gmail.com> */ | |
c9a8fdd8 AV |
321 | .boot_params = AT91_SDRAM_BASE + 0x100, |
322 | .timer = &at91sam926x_timer, | |
323 | .map_io = eb_map_io, | |
324 | .init_irq = eb_init_irq, | |
325 | .init_machine = eb_board_init, | |
326 | MACHINE_END |