[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / xscale-cp0.c

/*
 * linux/arch/arm/kernel/xscale-cp0.c
 *
 * XScale DSP and iWMMXt coprocessor context switching and handling
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/thread_notify.h>

static inline void dsp_save_state(u32 *state)
{
	__asm__ __volatile__ (
		"mrrc	p0, 0, %0, %1, c0\n"
		: "=r" (state[0]), "=r" (state[1]));
}

static inline void dsp_load_state(u32 *state)
{
	__asm__ __volatile__ (
		"mcrr	p0, 0, %0, %1, c0\n"
		: : "r" (state[0]), "r" (state[1]));
}

static int dsp_do(struct notifier_block *self, unsigned long cmd, void *t)
{
	struct thread_info *thread = t;

	switch (cmd) {
	case THREAD_NOTIFY_FLUSH:
		thread->cpu_context.extra[0] = 0;
		thread->cpu_context.extra[1] = 0;
		break;

	case THREAD_NOTIFY_SWITCH:
		dsp_save_state(current_thread_info()->cpu_context.extra);
		dsp_load_state(thread->cpu_context.extra);
		break;
	}

	return NOTIFY_DONE;
}

static struct notifier_block dsp_notifier_block = {
	.notifier_call	= dsp_do,
};


#ifdef CONFIG_IWMMXT
static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
{
	struct thread_info *thread = t;

	switch (cmd) {
	case THREAD_NOTIFY_FLUSH:
		/*
		 * flush_thread() zeroes thread->fpstate, so no need
		 * to do anything here.
		 *
		 * FALLTHROUGH: Ensure we don't try to overwrite our newly
		 * initialised state information on the first fault.
		 */

	case THREAD_NOTIFY_EXIT:
		iwmmxt_task_release(thread);
		break;

	case THREAD_NOTIFY_SWITCH:
		iwmmxt_task_switch(thread);
		break;
	}

	return NOTIFY_DONE;
}

static struct notifier_block iwmmxt_notifier_block = {
	.notifier_call	= iwmmxt_do,
};
#endif


static u32 __init xscale_cp_access_read(void)
{
	u32 value;

	__asm__ __volatile__ (
		"mrc	p15, 0, %0, c15, c1, 0\n\t"
		: "=r" (value));

	return value;
}

static void __init xscale_cp_access_write(u32 value)
{
	u32 temp;

	__asm__ __volatile__ (
		"mcr	p15, 0, %1, c15, c1, 0\n\t"
		"mrc	p15, 0, %0, c15, c1, 0\n\t"
		"mov	%0, %0\n\t"
		"sub	pc, pc, #4\n\t"
		: "=r" (temp) : "r" (value));
}

/*
 * Detect whether we have a MAC coprocessor (40 bit register) or an
 * iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
 * into a coprocessor register and reading it back, and checking
 * whether the upper word survived intact.
 */
static int __init cpu_has_iwmmxt(void)
{
	u32 lo;
	u32 hi;

	/*
	 * This sequence is interpreted by the DSP coprocessor as:
	 *	mar	acc0, %2, %3
	 *	mra	%0, %1, acc0
	 *
	 * And by the iWMMXt coprocessor as:
	 *	tmcrr	wR0, %2, %3
	 *	tmrrc	%0, %1, wR0
	 */
	__asm__ __volatile__ (
		"mcrr	p0, 0, %2, %3, c0\n"
		"mrrc	p0, 0, %0, %1, c0\n"
		: "=r" (lo), "=r" (hi)
		: "r" (0), "r" (0x100));

	return !!hi;
}


/*
 * If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
 * disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
 * switch code handle iWMMXt context switching.  If on the other
 * hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
 * all the time, and save/restore acc0 on context switch in non-lazy
 * fashion.
 */
static int __init xscale_cp0_init(void)
{
	u32 cp_access;

	cp_access = xscale_cp_access_read() & ~3;
	xscale_cp_access_write(cp_access | 1);

	if (cpu_has_iwmmxt()) {
#ifndef CONFIG_IWMMXT
		printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
			"detected, but kernel support is missing.\n");
#else
		printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
		elf_hwcap |= HWCAP_IWMMXT;
		thread_register_notifier(&iwmmxt_notifier_block);
#endif
	} else {
		printk(KERN_INFO "XScale DSP coprocessor detected.\n");
		thread_register_notifier(&dsp_notifier_block);
		cp_access |= 1;
	}

	xscale_cp_access_write(cp_access);

	return 0;
}

late_initcall(xscale_cp0_init);
Commit	Line	Data
afe4b25e LB	1	/*
	2	* linux/arch/arm/kernel/xscale-cp0.c
	3	*
	4	* XScale DSP and iWMMXt coprocessor context switching and handling
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
afe4b25e LB	11	#include <linux/types.h>
	12	#include <linux/kernel.h>
	13	#include <linux/signal.h>
	14	#include <linux/sched.h>
	15	#include <linux/init.h>
fced80c7	16	#include <linux/io.h>
afe4b25e	17	#include <asm/thread_notify.h>
afe4b25e LB	18
	19	static inline void dsp_save_state(u32 *state)
	20	{
	21	__asm__ __volatile__ (
	22	"mrrc p0, 0, %0, %1, c0\n"
	23	: "=r" (state[0]), "=r" (state[1]));
	24	}
	25
	26	static inline void dsp_load_state(u32 *state)
	27	{
	28	__asm__ __volatile__ (
	29	"mcrr p0, 0, %0, %1, c0\n"
	30	: : "r" (state[0]), "r" (state[1]));
	31	}
	32
	33	static int dsp_do(struct notifier_block self, unsigned long cmd, void t)
	34	{
	35	struct thread_info *thread = t;
	36
	37	switch (cmd) {
	38	case THREAD_NOTIFY_FLUSH:
	39	thread->cpu_context.extra[0] = 0;
	40	thread->cpu_context.extra[1] = 0;
	41	break;
	42
	43	case THREAD_NOTIFY_SWITCH:
	44	dsp_save_state(current_thread_info()->cpu_context.extra);
	45	dsp_load_state(thread->cpu_context.extra);
	46	break;
	47	}
	48
	49	return NOTIFY_DONE;
	50	}
	51
	52	static struct notifier_block dsp_notifier_block = {
	53	.notifier_call = dsp_do,
	54	};
	55
	56
	57	#ifdef CONFIG_IWMMXT
	58	static int iwmmxt_do(struct notifier_block self, unsigned long cmd, void t)
	59	{
	60	struct thread_info *thread = t;
	61
	62	switch (cmd) {
	63	case THREAD_NOTIFY_FLUSH:
	64	/*
	65	* flush_thread() zeroes thread->fpstate, so no need
	66	* to do anything here.
	67	*
	68	* FALLTHROUGH: Ensure we don't try to overwrite our newly
	69	* initialised state information on the first fault.
	70	*/
	71
797245f5	72	case THREAD_NOTIFY_EXIT:
afe4b25e LB	73	iwmmxt_task_release(thread);
	74	break;
	75
	76	case THREAD_NOTIFY_SWITCH:
	77	iwmmxt_task_switch(thread);
	78	break;
	79	}
	80
	81	return NOTIFY_DONE;
	82	}
	83
	84	static struct notifier_block iwmmxt_notifier_block = {
	85	.notifier_call = iwmmxt_do,
	86	};
	87	#endif
	88
	89
	90	static u32 __init xscale_cp_access_read(void)
	91	{
	92	u32 value;
	93
	94	__asm__ __volatile__ (
	95	"mrc p15, 0, %0, c15, c1, 0\n\t"
	96	: "=r" (value));
	97
	98	return value;
	99	}
	100
	101	static void __init xscale_cp_access_write(u32 value)
	102	{
	103	u32 temp;
	104
	105	__asm__ __volatile__ (
	106	"mcr p15, 0, %1, c15, c1, 0\n\t"
	107	"mrc p15, 0, %0, c15, c1, 0\n\t"
	108	"mov %0, %0\n\t"
	109	"sub pc, pc, #4\n\t"
	110	: "=r" (temp) : "r" (value));
	111	}
	112
	113	/*
	114	* Detect whether we have a MAC coprocessor (40 bit register) or an
	115	* iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
	116	* into a coprocessor register and reading it back, and checking
	117	* whether the upper word survived intact.
	118	*/
	119	static int __init cpu_has_iwmmxt(void)
	120	{
	121	u32 lo;
	122	u32 hi;
	123
	124	/*
	125	* This sequence is interpreted by the DSP coprocessor as:
	126	* mar acc0, %2, %3
	127	* mra %0, %1, acc0
	128	*
	129	* And by the iWMMXt coprocessor as:
	130	* tmcrr wR0, %2, %3
	131	* tmrrc %0, %1, wR0
	132	*/
	133	__asm__ __volatile__ (
	134	"mcrr p0, 0, %2, %3, c0\n"
	135	"mrrc p0, 0, %0, %1, c0\n"
	136	: "=r" (lo), "=r" (hi)
137	: "r" (0), "r" (0x100));
138
139	return !!hi;
140	}
141
142
143	/*
144	* If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
145	* disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
146	* switch code handle iWMMXt context switching. If on the other
147	* hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
148	* all the time, and save/restore acc0 on context switch in non-lazy
149	* fashion.
150	*/
151	static int __init xscale_cp0_init(void)
152	{
153	u32 cp_access;
154
155	cp_access = xscale_cp_access_read() & ~3;
156	xscale_cp_access_write(cp_access \| 1);
157
158	if (cpu_has_iwmmxt()) {
159	#ifndef CONFIG_IWMMXT
160	printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
161	"detected, but kernel support is missing.\n");
162	#else
163	printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
164	elf_hwcap \|= HWCAP_IWMMXT;
165	thread_register_notifier(&iwmmxt_notifier_block);
166	#endif
167	} else {
168	printk(KERN_INFO "XScale DSP coprocessor detected.\n");
169	thread_register_notifier(&dsp_notifier_block);
170	cp_access \|= 1;
171	}
172
173	xscale_cp_access_write(cp_access);
174
175	return 0;
176	}
177
178	late_initcall(xscale_cp0_init);