Commit | Line | Data |
---|---|---|
a8cbcd92 RK |
1 | /* |
2 | * linux/arch/arm/kernel/smp_scu.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Ltd. | |
5 | * All Rights Reserved | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include <linux/init.h> | |
12 | #include <linux/io.h> | |
13 | ||
14 | #include <asm/smp_scu.h> | |
af73110d | 15 | #include <asm/cacheflush.h> |
a8cbcd92 RK |
16 | |
17 | #define SCU_CTRL 0x00 | |
18 | #define SCU_CONFIG 0x04 | |
19 | #define SCU_CPU_STATUS 0x08 | |
20 | #define SCU_INVALIDATE 0x0c | |
21 | #define SCU_FPGA_REVISION 0x10 | |
22 | ||
23 | /* | |
24 | * Get the number of CPU cores from the SCU configuration | |
25 | */ | |
26 | unsigned int __init scu_get_core_count(void __iomem *scu_base) | |
27 | { | |
28 | unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); | |
29 | return (ncores & 0x03) + 1; | |
30 | } | |
31 | ||
32 | /* | |
33 | * Enable the SCU | |
34 | */ | |
35 | void __init scu_enable(void __iomem *scu_base) | |
36 | { | |
37 | u32 scu_ctrl; | |
38 | ||
39 | scu_ctrl = __raw_readl(scu_base + SCU_CTRL); | |
9b229fa0 CM |
40 | /* already enabled? */ |
41 | if (scu_ctrl & 1) | |
42 | return; | |
43 | ||
a8cbcd92 RK |
44 | scu_ctrl |= 1; |
45 | __raw_writel(scu_ctrl, scu_base + SCU_CTRL); | |
af73110d CM |
46 | |
47 | /* | |
48 | * Ensure that the data accessed by CPU0 before the SCU was | |
49 | * initialised is visible to the other CPUs. | |
50 | */ | |
51 | flush_cache_all(); | |
a8cbcd92 | 52 | } |