Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 LT |
21 | #include <linux/cpu.h> |
22 | #include <linux/smp.h> | |
23 | #include <linux/seq_file.h> | |
c97d4869 | 24 | #include <linux/irq.h> |
bc28248e RK |
25 | #include <linux/percpu.h> |
26 | #include <linux/clockchips.h> | |
3c030bea | 27 | #include <linux/completion.h> |
1da177e4 | 28 | |
60063497 | 29 | #include <linux/atomic.h> |
1da177e4 LT |
30 | #include <asm/cacheflush.h> |
31 | #include <asm/cpu.h> | |
42578c82 | 32 | #include <asm/cputype.h> |
5a567d78 | 33 | #include <asm/exception.h> |
8903826d | 34 | #include <asm/idmap.h> |
c9018aab | 35 | #include <asm/topology.h> |
e65f38ed RK |
36 | #include <asm/mmu_context.h> |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/pgalloc.h> | |
1da177e4 | 39 | #include <asm/processor.h> |
37b05b63 | 40 | #include <asm/sections.h> |
1da177e4 LT |
41 | #include <asm/tlbflush.h> |
42 | #include <asm/ptrace.h> | |
bc28248e | 43 | #include <asm/localtimer.h> |
d6257288 | 44 | #include <asm/smp_plat.h> |
1da177e4 | 45 | |
e65f38ed RK |
46 | /* |
47 | * as from 2.5, kernels no longer have an init_tasks structure | |
48 | * so we need some other way of telling a new secondary core | |
49 | * where to place its SVC stack | |
50 | */ | |
51 | struct secondary_data secondary_data; | |
52 | ||
1da177e4 | 53 | enum ipi_msg_type { |
24480d98 | 54 | IPI_TIMER = 2, |
1da177e4 LT |
55 | IPI_RESCHEDULE, |
56 | IPI_CALL_FUNC, | |
f6dd9fa5 | 57 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
58 | IPI_CPU_STOP, |
59 | }; | |
60 | ||
bd6f68af | 61 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 62 | { |
71f512e8 RK |
63 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
64 | struct task_struct *idle = ci->idle; | |
1da177e4 LT |
65 | int ret; |
66 | ||
67 | /* | |
71f512e8 RK |
68 | * Spawn a new process manually, if not already done. |
69 | * Grab a pointer to its task struct so we can mess with it | |
1da177e4 | 70 | */ |
71f512e8 RK |
71 | if (!idle) { |
72 | idle = fork_idle(cpu); | |
73 | if (IS_ERR(idle)) { | |
74 | printk(KERN_ERR "CPU%u: fork() failed\n", cpu); | |
75 | return PTR_ERR(idle); | |
76 | } | |
77 | ci->idle = idle; | |
13ea9cc8 SS |
78 | } else { |
79 | /* | |
80 | * Since this idle thread is being re-used, call | |
81 | * init_idle() to reinitialize the thread structure. | |
82 | */ | |
83 | init_idle(idle, cpu); | |
1da177e4 LT |
84 | } |
85 | ||
e65f38ed RK |
86 | /* |
87 | * We need to tell the secondary core where to find | |
88 | * its stack and the page tables. | |
89 | */ | |
32d39a93 | 90 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
4e8ee7de | 91 | secondary_data.pgdir = virt_to_phys(idmap_pgd); |
d427958a | 92 | secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); |
1027247f RK |
93 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
94 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); | |
e65f38ed | 95 | |
1da177e4 LT |
96 | /* |
97 | * Now bring the CPU into our world. | |
98 | */ | |
99 | ret = boot_secondary(cpu, idle); | |
e65f38ed RK |
100 | if (ret == 0) { |
101 | unsigned long timeout; | |
102 | ||
103 | /* | |
104 | * CPU was successfully started, wait for it | |
105 | * to come online or time out. | |
106 | */ | |
107 | timeout = jiffies + HZ; | |
108 | while (time_before(jiffies, timeout)) { | |
109 | if (cpu_online(cpu)) | |
110 | break; | |
111 | ||
112 | udelay(10); | |
113 | barrier(); | |
114 | } | |
115 | ||
58613cd1 RK |
116 | if (!cpu_online(cpu)) { |
117 | pr_crit("CPU%u: failed to come online\n", cpu); | |
e65f38ed | 118 | ret = -EIO; |
58613cd1 RK |
119 | } |
120 | } else { | |
121 | pr_err("CPU%u: failed to boot: %d\n", cpu, ret); | |
e65f38ed RK |
122 | } |
123 | ||
5d43045b | 124 | secondary_data.stack = NULL; |
e65f38ed RK |
125 | secondary_data.pgdir = 0; |
126 | ||
1da177e4 LT |
127 | return ret; |
128 | } | |
129 | ||
a054a811 | 130 | #ifdef CONFIG_HOTPLUG_CPU |
10034aab RK |
131 | static void percpu_timer_stop(void); |
132 | ||
a054a811 RK |
133 | /* |
134 | * __cpu_disable runs on the processor to be shutdown. | |
135 | */ | |
90140c30 | 136 | int __cpu_disable(void) |
a054a811 RK |
137 | { |
138 | unsigned int cpu = smp_processor_id(); | |
139 | struct task_struct *p; | |
140 | int ret; | |
141 | ||
8e2a43f5 | 142 | ret = platform_cpu_disable(cpu); |
a054a811 RK |
143 | if (ret) |
144 | return ret; | |
145 | ||
146 | /* | |
147 | * Take this CPU offline. Once we clear this, we can't return, | |
148 | * and we must not schedule until we're ready to give up the cpu. | |
149 | */ | |
e03cdade | 150 | set_cpu_online(cpu, false); |
a054a811 RK |
151 | |
152 | /* | |
153 | * OK - migrate IRQs away from this CPU | |
154 | */ | |
155 | migrate_irqs(); | |
156 | ||
37ee16ae RK |
157 | /* |
158 | * Stop the local timer for this CPU. | |
159 | */ | |
10034aab | 160 | percpu_timer_stop(); |
37ee16ae | 161 | |
a054a811 RK |
162 | /* |
163 | * Flush user cache and TLB mappings, and then remove this CPU | |
164 | * from the vm mask set of all processes. | |
165 | */ | |
166 | flush_cache_all(); | |
167 | local_flush_tlb_all(); | |
168 | ||
169 | read_lock(&tasklist_lock); | |
170 | for_each_process(p) { | |
171 | if (p->mm) | |
56f8ba83 | 172 | cpumask_clear_cpu(cpu, mm_cpumask(p->mm)); |
a054a811 RK |
173 | } |
174 | read_unlock(&tasklist_lock); | |
175 | ||
176 | return 0; | |
177 | } | |
178 | ||
3c030bea RK |
179 | static DECLARE_COMPLETION(cpu_died); |
180 | ||
a054a811 RK |
181 | /* |
182 | * called on the thread which is asking for a CPU to be shutdown - | |
183 | * waits until shutdown has completed, or it is timed out. | |
184 | */ | |
90140c30 | 185 | void __cpu_die(unsigned int cpu) |
a054a811 | 186 | { |
3c030bea RK |
187 | if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { |
188 | pr_err("CPU%u: cpu didn't die\n", cpu); | |
189 | return; | |
190 | } | |
191 | printk(KERN_NOTICE "CPU%u: shutdown\n", cpu); | |
192 | ||
a054a811 RK |
193 | if (!platform_cpu_kill(cpu)) |
194 | printk("CPU%u: unable to kill\n", cpu); | |
195 | } | |
196 | ||
197 | /* | |
198 | * Called from the idle thread for the CPU which has been shutdown. | |
199 | * | |
200 | * Note that we disable IRQs here, but do not re-enable them | |
201 | * before returning to the caller. This is also the behaviour | |
202 | * of the other hotplug-cpu capable cores, so presumably coming | |
203 | * out of idle fixes this. | |
204 | */ | |
90140c30 | 205 | void __ref cpu_die(void) |
a054a811 RK |
206 | { |
207 | unsigned int cpu = smp_processor_id(); | |
208 | ||
a054a811 RK |
209 | idle_task_exit(); |
210 | ||
f36d3401 RK |
211 | local_irq_disable(); |
212 | mb(); | |
213 | ||
3c030bea RK |
214 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ |
215 | complete(&cpu_died); | |
216 | ||
a054a811 RK |
217 | /* |
218 | * actual CPU shutdown procedure is at least platform (if not | |
3c030bea | 219 | * CPU) specific. |
a054a811 RK |
220 | */ |
221 | platform_cpu_die(cpu); | |
222 | ||
223 | /* | |
224 | * Do not return to the idle loop - jump back to the secondary | |
225 | * cpu initialisation. There's some initialisation which needs | |
226 | * to be repeated to undo the effects of taking the CPU offline. | |
227 | */ | |
228 | __asm__("mov sp, %0\n" | |
faabfa08 | 229 | " mov fp, #0\n" |
a054a811 RK |
230 | " b secondary_start_kernel" |
231 | : | |
32d39a93 | 232 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
233 | } |
234 | #endif /* CONFIG_HOTPLUG_CPU */ | |
235 | ||
05c74a6c RK |
236 | /* |
237 | * Called by both boot and secondaries to move global data into | |
238 | * per-processor storage. | |
239 | */ | |
240 | static void __cpuinit smp_store_cpu_info(unsigned int cpuid) | |
241 | { | |
242 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
243 | ||
244 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
c9018aab VG |
245 | |
246 | store_cpu_topology(cpuid); | |
05c74a6c RK |
247 | } |
248 | ||
e65f38ed RK |
249 | /* |
250 | * This is the secondary CPU boot entry. We're using this CPUs | |
251 | * idle thread stack, but a set of temporary page tables. | |
252 | */ | |
bd6f68af | 253 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
254 | { |
255 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 256 | unsigned int cpu = smp_processor_id(); |
e65f38ed RK |
257 | |
258 | printk("CPU%u: Booted secondary processor\n", cpu); | |
259 | ||
260 | /* | |
261 | * All kernel threads share the same mm context; grab a | |
262 | * reference and switch to it. | |
263 | */ | |
e65f38ed RK |
264 | atomic_inc(&mm->mm_count); |
265 | current->active_mm = mm; | |
56f8ba83 | 266 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
e65f38ed RK |
267 | cpu_switch_mm(mm->pgd, mm); |
268 | enter_lazy_tlb(mm, current); | |
505d7b19 | 269 | local_flush_tlb_all(); |
e65f38ed RK |
270 | |
271 | cpu_init(); | |
5bfb5d69 | 272 | preempt_disable(); |
2c0136db | 273 | trace_hardirqs_off(); |
e65f38ed RK |
274 | |
275 | /* | |
276 | * Give the platform a chance to do its own initialisation. | |
277 | */ | |
278 | platform_secondary_init(cpu); | |
279 | ||
e545a614 | 280 | notify_cpu_starting(cpu); |
a8655e83 | 281 | |
e65f38ed RK |
282 | calibrate_delay(); |
283 | ||
284 | smp_store_cpu_info(cpu); | |
285 | ||
286 | /* | |
573619d1 RK |
287 | * OK, now it's safe to let the boot CPU continue. Wait for |
288 | * the CPU migration code to notice that the CPU is online | |
289 | * before we continue. | |
e65f38ed | 290 | */ |
e03cdade | 291 | set_cpu_online(cpu, true); |
eb047454 TG |
292 | |
293 | /* | |
294 | * Setup the percpu timer for this CPU. | |
295 | */ | |
296 | percpu_timer_setup(); | |
297 | ||
573619d1 RK |
298 | while (!cpu_active(cpu)) |
299 | cpu_relax(); | |
e65f38ed | 300 | |
eb047454 TG |
301 | /* |
302 | * cpu_active bit is set, so it's safe to enalbe interrupts | |
303 | * now. | |
304 | */ | |
305 | local_irq_enable(); | |
306 | local_fiq_enable(); | |
307 | ||
e65f38ed RK |
308 | /* |
309 | * OK, it's off to the idle thread for us | |
310 | */ | |
311 | cpu_idle(); | |
312 | } | |
313 | ||
1da177e4 LT |
314 | void __init smp_cpus_done(unsigned int max_cpus) |
315 | { | |
316 | int cpu; | |
317 | unsigned long bogosum = 0; | |
318 | ||
319 | for_each_online_cpu(cpu) | |
320 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
321 | ||
322 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
323 | "(%lu.%02lu BogoMIPS).\n", | |
324 | num_online_cpus(), | |
325 | bogosum / (500000/HZ), | |
326 | (bogosum / (5000/HZ)) % 100); | |
327 | } | |
328 | ||
329 | void __init smp_prepare_boot_cpu(void) | |
330 | { | |
331 | unsigned int cpu = smp_processor_id(); | |
332 | ||
71f512e8 | 333 | per_cpu(cpu_data, cpu).idle = current; |
1da177e4 LT |
334 | } |
335 | ||
05c74a6c | 336 | void __init smp_prepare_cpus(unsigned int max_cpus) |
1da177e4 | 337 | { |
05c74a6c | 338 | unsigned int ncores = num_possible_cpus(); |
1da177e4 | 339 | |
c9018aab VG |
340 | init_cpu_topology(); |
341 | ||
05c74a6c | 342 | smp_store_cpu_info(smp_processor_id()); |
1da177e4 LT |
343 | |
344 | /* | |
05c74a6c | 345 | * are we trying to boot more cores than exist? |
1da177e4 | 346 | */ |
05c74a6c RK |
347 | if (max_cpus > ncores) |
348 | max_cpus = ncores; | |
7fa22bd5 | 349 | if (ncores > 1 && max_cpus) { |
05c74a6c RK |
350 | /* |
351 | * Enable the local timer or broadcast device for the | |
352 | * boot CPU, but only if we have more than one CPU. | |
353 | */ | |
354 | percpu_timer_setup(); | |
1da177e4 | 355 | |
7fa22bd5 SB |
356 | /* |
357 | * Initialise the present map, which describes the set of CPUs | |
358 | * actually populated at the present time. A platform should | |
359 | * re-initialize the map in platform_smp_prepare_cpus() if | |
360 | * present != possible (e.g. physical hotplug). | |
361 | */ | |
362 | init_cpu_present(&cpu_possible_map); | |
363 | ||
05c74a6c RK |
364 | /* |
365 | * Initialise the SCU if there are more than one CPU | |
366 | * and let them know where to start. | |
367 | */ | |
368 | platform_smp_prepare_cpus(max_cpus); | |
369 | } | |
1da177e4 LT |
370 | } |
371 | ||
0f7b332f RK |
372 | static void (*smp_cross_call)(const struct cpumask *, unsigned int); |
373 | ||
374 | void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) | |
375 | { | |
376 | smp_cross_call = fn; | |
377 | } | |
378 | ||
82668104 | 379 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 380 | { |
e3fbb087 | 381 | smp_cross_call(mask, IPI_CALL_FUNC); |
1da177e4 LT |
382 | } |
383 | ||
f6dd9fa5 | 384 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 385 | { |
e3fbb087 | 386 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 387 | } |
3e459990 | 388 | |
4a88abd7 RK |
389 | static const char *ipi_types[NR_IPI] = { |
390 | #define S(x,s) [x - IPI_TIMER] = s | |
391 | S(IPI_TIMER, "Timer broadcast interrupts"), | |
392 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), | |
393 | S(IPI_CALL_FUNC, "Function call interrupts"), | |
394 | S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), | |
395 | S(IPI_CPU_STOP, "CPU stop interrupts"), | |
396 | }; | |
397 | ||
f13cd417 | 398 | void show_ipi_list(struct seq_file *p, int prec) |
1da177e4 | 399 | { |
4a88abd7 | 400 | unsigned int cpu, i; |
1da177e4 | 401 | |
4a88abd7 RK |
402 | for (i = 0; i < NR_IPI; i++) { |
403 | seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); | |
1da177e4 | 404 | |
4a88abd7 RK |
405 | for_each_present_cpu(cpu) |
406 | seq_printf(p, "%10u ", | |
407 | __get_irq_stat(cpu, ipi_irqs[i])); | |
1da177e4 | 408 | |
4a88abd7 RK |
409 | seq_printf(p, " %s\n", ipi_types[i]); |
410 | } | |
1da177e4 LT |
411 | } |
412 | ||
b54992fe | 413 | u64 smp_irq_stat_cpu(unsigned int cpu) |
37ee16ae | 414 | { |
b54992fe RK |
415 | u64 sum = 0; |
416 | int i; | |
37ee16ae | 417 | |
b54992fe RK |
418 | for (i = 0; i < NR_IPI; i++) |
419 | sum += __get_irq_stat(cpu, ipi_irqs[i]); | |
37ee16ae | 420 | |
b54992fe | 421 | return sum; |
37ee16ae RK |
422 | } |
423 | ||
bc28248e RK |
424 | /* |
425 | * Timer (local or broadcast) support | |
426 | */ | |
427 | static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent); | |
428 | ||
c97d4869 | 429 | static void ipi_timer(void) |
1da177e4 | 430 | { |
bc28248e | 431 | struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); |
bc28248e | 432 | evt->event_handler(evt); |
1da177e4 LT |
433 | } |
434 | ||
bc28248e RK |
435 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
436 | static void smp_timer_broadcast(const struct cpumask *mask) | |
437 | { | |
e3fbb087 | 438 | smp_cross_call(mask, IPI_TIMER); |
bc28248e | 439 | } |
5388a6b2 RK |
440 | #else |
441 | #define smp_timer_broadcast NULL | |
442 | #endif | |
bc28248e RK |
443 | |
444 | static void broadcast_timer_set_mode(enum clock_event_mode mode, | |
445 | struct clock_event_device *evt) | |
446 | { | |
447 | } | |
448 | ||
a8d2518c | 449 | static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) |
bc28248e RK |
450 | { |
451 | evt->name = "dummy_timer"; | |
452 | evt->features = CLOCK_EVT_FEAT_ONESHOT | | |
453 | CLOCK_EVT_FEAT_PERIODIC | | |
454 | CLOCK_EVT_FEAT_DUMMY; | |
455 | evt->rating = 400; | |
456 | evt->mult = 1; | |
457 | evt->set_mode = broadcast_timer_set_mode; | |
bc28248e RK |
458 | |
459 | clockevents_register_device(evt); | |
460 | } | |
bc28248e | 461 | |
0ef330e1 MZ |
462 | static struct local_timer_ops *lt_ops; |
463 | ||
464 | #ifdef CONFIG_LOCAL_TIMERS | |
465 | int local_timer_register(struct local_timer_ops *ops) | |
466 | { | |
467 | if (lt_ops) | |
468 | return -EBUSY; | |
469 | ||
470 | lt_ops = ops; | |
471 | return 0; | |
472 | } | |
473 | #endif | |
474 | ||
475 | int __cpuinit __attribute__ ((weak)) local_timer_setup(struct clock_event_device *clk) | |
476 | { | |
477 | if (lt_ops) | |
478 | return lt_ops->setup(clk); | |
479 | ||
480 | return -ENXIO; | |
481 | } | |
482 | ||
483 | void __attribute__ ((weak)) local_timer_stop(struct clock_event_device *clk) | |
484 | { | |
485 | if (lt_ops) | |
486 | lt_ops->stop(clk); | |
487 | } | |
488 | ||
bc28248e RK |
489 | void __cpuinit percpu_timer_setup(void) |
490 | { | |
491 | unsigned int cpu = smp_processor_id(); | |
492 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
493 | ||
494 | evt->cpumask = cpumask_of(cpu); | |
5388a6b2 | 495 | evt->broadcast = smp_timer_broadcast; |
bc28248e | 496 | |
af90f10d SS |
497 | if (local_timer_setup(evt)) |
498 | broadcast_timer_setup(evt); | |
bc28248e RK |
499 | } |
500 | ||
10034aab RK |
501 | #ifdef CONFIG_HOTPLUG_CPU |
502 | /* | |
503 | * The generic clock events code purposely does not stop the local timer | |
504 | * on CPU_DEAD/CPU_DEAD_FROZEN hotplug events, so we have to do it | |
505 | * manually here. | |
506 | */ | |
507 | static void percpu_timer_stop(void) | |
508 | { | |
509 | unsigned int cpu = smp_processor_id(); | |
510 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
511 | ||
28af690a | 512 | local_timer_stop(evt); |
10034aab RK |
513 | } |
514 | #endif | |
515 | ||
bd31b859 | 516 | static DEFINE_RAW_SPINLOCK(stop_lock); |
1da177e4 LT |
517 | |
518 | /* | |
519 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
520 | */ | |
521 | static void ipi_cpu_stop(unsigned int cpu) | |
522 | { | |
3d3f78d7 RK |
523 | if (system_state == SYSTEM_BOOTING || |
524 | system_state == SYSTEM_RUNNING) { | |
bd31b859 | 525 | raw_spin_lock(&stop_lock); |
3d3f78d7 RK |
526 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); |
527 | dump_stack(); | |
bd31b859 | 528 | raw_spin_unlock(&stop_lock); |
3d3f78d7 | 529 | } |
1da177e4 | 530 | |
e03cdade | 531 | set_cpu_online(cpu, false); |
1da177e4 LT |
532 | |
533 | local_fiq_disable(); | |
534 | local_irq_disable(); | |
535 | ||
02b73e2e WD |
536 | #ifdef CONFIG_HOTPLUG_CPU |
537 | platform_cpu_kill(cpu); | |
538 | #endif | |
539 | ||
1da177e4 LT |
540 | while (1) |
541 | cpu_relax(); | |
542 | } | |
543 | ||
544 | /* | |
545 | * Main handler for inter-processor interrupts | |
1da177e4 | 546 | */ |
4073723a | 547 | asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) |
0b5a1b95 SG |
548 | { |
549 | handle_IPI(ipinr, regs); | |
550 | } | |
551 | ||
552 | void handle_IPI(int ipinr, struct pt_regs *regs) | |
1da177e4 LT |
553 | { |
554 | unsigned int cpu = smp_processor_id(); | |
c97d4869 | 555 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 | 556 | |
4a88abd7 RK |
557 | if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) |
558 | __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); | |
1da177e4 | 559 | |
24480d98 RK |
560 | switch (ipinr) { |
561 | case IPI_TIMER: | |
7deabca0 | 562 | irq_enter(); |
24480d98 | 563 | ipi_timer(); |
7deabca0 | 564 | irq_exit(); |
24480d98 | 565 | break; |
1da177e4 | 566 | |
24480d98 | 567 | case IPI_RESCHEDULE: |
184748cc | 568 | scheduler_ipi(); |
24480d98 | 569 | break; |
1da177e4 | 570 | |
24480d98 | 571 | case IPI_CALL_FUNC: |
7deabca0 | 572 | irq_enter(); |
24480d98 | 573 | generic_smp_call_function_interrupt(); |
7deabca0 | 574 | irq_exit(); |
24480d98 | 575 | break; |
f6dd9fa5 | 576 | |
24480d98 | 577 | case IPI_CALL_FUNC_SINGLE: |
7deabca0 | 578 | irq_enter(); |
24480d98 | 579 | generic_smp_call_function_single_interrupt(); |
7deabca0 | 580 | irq_exit(); |
24480d98 | 581 | break; |
1da177e4 | 582 | |
24480d98 | 583 | case IPI_CPU_STOP: |
7deabca0 | 584 | irq_enter(); |
24480d98 | 585 | ipi_cpu_stop(cpu); |
7deabca0 | 586 | irq_exit(); |
24480d98 | 587 | break; |
1da177e4 | 588 | |
24480d98 RK |
589 | default: |
590 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
591 | cpu, ipinr); | |
592 | break; | |
1da177e4 | 593 | } |
c97d4869 | 594 | set_irq_regs(old_regs); |
1da177e4 LT |
595 | } |
596 | ||
597 | void smp_send_reschedule(int cpu) | |
598 | { | |
e3fbb087 | 599 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
1da177e4 LT |
600 | } |
601 | ||
1da177e4 LT |
602 | void smp_send_stop(void) |
603 | { | |
28e18293 | 604 | unsigned long timeout; |
1da177e4 | 605 | |
28e18293 RK |
606 | if (num_online_cpus() > 1) { |
607 | cpumask_t mask = cpu_online_map; | |
608 | cpu_clear(smp_processor_id(), mask); | |
4b0ef3b1 | 609 | |
e3fbb087 | 610 | smp_cross_call(&mask, IPI_CPU_STOP); |
28e18293 | 611 | } |
4b0ef3b1 | 612 | |
28e18293 RK |
613 | /* Wait up to one second for other CPUs to stop */ |
614 | timeout = USEC_PER_SEC; | |
615 | while (num_online_cpus() > 1 && timeout--) | |
616 | udelay(1); | |
4b0ef3b1 | 617 | |
28e18293 RK |
618 | if (num_online_cpus() > 1) |
619 | pr_warning("SMP: failed to stop secondary CPUs\n"); | |
4b0ef3b1 RK |
620 | } |
621 | ||
4b0ef3b1 | 622 | /* |
1da177e4 | 623 | * not supported here |
4b0ef3b1 | 624 | */ |
5048bcba | 625 | int setup_profiling_timer(unsigned int multiplier) |
4b0ef3b1 | 626 | { |
1da177e4 | 627 | return -EINVAL; |
4b0ef3b1 | 628 | } |