Merge branch 'master' into next
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / ptrace.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/ptrace.c
3 *
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
1da177e4
LT
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/smp.h>
1da177e4
LT
16#include <linux/ptrace.h>
17#include <linux/user.h>
18#include <linux/security.h>
19#include <linux/init.h>
7ed20e1a 20#include <linux/signal.h>
33fa9b13 21#include <linux/uaccess.h>
864232fa
WD
22#include <linux/perf_event.h>
23#include <linux/hw_breakpoint.h>
1da177e4 24
1da177e4
LT
25#include <asm/pgtable.h>
26#include <asm/system.h>
27#include <asm/traps.h>
28
1da177e4
LT
29#define REG_PC 15
30#define REG_PSR 16
31/*
32 * does not yet catch signals sent when the child dies.
33 * in exit.c or in signal.c.
34 */
35
36#if 0
37/*
38 * Breakpoint SWI instruction: SWI &9F0001
39 */
40#define BREAKINST_ARM 0xef9f0001
41#define BREAKINST_THUMB 0xdf00 /* fill this in later */
42#else
43/*
44 * New breakpoints - use an undefined instruction. The ARM architecture
45 * reference manual guarantees that the following instruction space
46 * will produce an undefined instruction exception on all CPUs:
47 *
48 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
49 * Thumb: 1101 1110 xxxx xxxx
50 */
51#define BREAKINST_ARM 0xe7f001f0
52#define BREAKINST_THUMB 0xde01
53#endif
54
e513f8bf
WD
55struct pt_regs_offset {
56 const char *name;
57 int offset;
58};
59
60#define REG_OFFSET_NAME(r) \
61 {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
62#define REG_OFFSET_END {.name = NULL, .offset = 0}
63
64static const struct pt_regs_offset regoffset_table[] = {
65 REG_OFFSET_NAME(r0),
66 REG_OFFSET_NAME(r1),
67 REG_OFFSET_NAME(r2),
68 REG_OFFSET_NAME(r3),
69 REG_OFFSET_NAME(r4),
70 REG_OFFSET_NAME(r5),
71 REG_OFFSET_NAME(r6),
72 REG_OFFSET_NAME(r7),
73 REG_OFFSET_NAME(r8),
74 REG_OFFSET_NAME(r9),
75 REG_OFFSET_NAME(r10),
76 REG_OFFSET_NAME(fp),
77 REG_OFFSET_NAME(ip),
78 REG_OFFSET_NAME(sp),
79 REG_OFFSET_NAME(lr),
80 REG_OFFSET_NAME(pc),
81 REG_OFFSET_NAME(cpsr),
82 REG_OFFSET_NAME(ORIG_r0),
83 REG_OFFSET_END,
84};
85
86/**
87 * regs_query_register_offset() - query register offset from its name
88 * @name: the name of a register
89 *
90 * regs_query_register_offset() returns the offset of a register in struct
91 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
92 */
93int regs_query_register_offset(const char *name)
94{
95 const struct pt_regs_offset *roff;
96 for (roff = regoffset_table; roff->name != NULL; roff++)
97 if (!strcmp(roff->name, name))
98 return roff->offset;
99 return -EINVAL;
100}
101
102/**
103 * regs_query_register_name() - query register name from its offset
104 * @offset: the offset of a register in struct pt_regs.
105 *
106 * regs_query_register_name() returns the name of a register from its
107 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
108 */
109const char *regs_query_register_name(unsigned int offset)
110{
111 const struct pt_regs_offset *roff;
112 for (roff = regoffset_table; roff->name != NULL; roff++)
113 if (roff->offset == offset)
114 return roff->name;
115 return NULL;
116}
117
118/**
119 * regs_within_kernel_stack() - check the address in the stack
120 * @regs: pt_regs which contains kernel stack pointer.
121 * @addr: address which is checked.
122 *
123 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
124 * If @addr is within the kernel stack, it returns true. If not, returns false.
125 */
126bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
127{
128 return ((addr & ~(THREAD_SIZE - 1)) ==
129 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
130}
131
132/**
133 * regs_get_kernel_stack_nth() - get Nth entry of the stack
134 * @regs: pt_regs which contains kernel stack pointer.
135 * @n: stack entry number.
136 *
137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
138 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
139 * this returns 0.
140 */
141unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
142{
143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
144 addr += n;
145 if (regs_within_kernel_stack(regs, (unsigned long)addr))
146 return *addr;
147 else
148 return 0;
149}
150
1da177e4
LT
151/*
152 * this routine will get a word off of the processes privileged stack.
153 * the offset is how far from the base addr as stored in the THREAD.
154 * this routine assumes that all the privileged stacks are in our
155 * data space.
156 */
157static inline long get_user_reg(struct task_struct *task, int offset)
158{
815d5ec8 159 return task_pt_regs(task)->uregs[offset];
1da177e4
LT
160}
161
162/*
163 * this routine will put a word on the processes privileged stack.
164 * the offset is how far from the base addr as stored in the THREAD.
165 * this routine assumes that all the privileged stacks are in our
166 * data space.
167 */
168static inline int
169put_user_reg(struct task_struct *task, int offset, long data)
170{
815d5ec8 171 struct pt_regs newregs, *regs = task_pt_regs(task);
1da177e4
LT
172 int ret = -EINVAL;
173
174 newregs = *regs;
175 newregs.uregs[offset] = data;
176
177 if (valid_user_regs(&newregs)) {
178 regs->uregs[offset] = data;
179 ret = 0;
180 }
181
182 return ret;
183}
184
1da177e4
LT
185/*
186 * Called by kernel/ptrace.c when detaching..
1da177e4
LT
187 */
188void ptrace_disable(struct task_struct *child)
189{
425fc47a 190 /* Nothing to do. */
1da177e4
LT
191}
192
193/*
194 * Handle hitting a breakpoint.
195 */
196void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
197{
198 siginfo_t info;
199
1da177e4
LT
200 info.si_signo = SIGTRAP;
201 info.si_errno = 0;
202 info.si_code = TRAP_BRKPT;
203 info.si_addr = (void __user *)instruction_pointer(regs);
204
205 force_sig_info(SIGTRAP, &info, tsk);
206}
207
208static int break_trap(struct pt_regs *regs, unsigned int instr)
209{
210 ptrace_break(current, regs);
211 return 0;
212}
213
214static struct undef_hook arm_break_hook = {
215 .instr_mask = 0x0fffffff,
216 .instr_val = 0x07f001f0,
217 .cpsr_mask = PSR_T_BIT,
218 .cpsr_val = 0,
219 .fn = break_trap,
220};
221
222static struct undef_hook thumb_break_hook = {
223 .instr_mask = 0xffff,
224 .instr_val = 0xde01,
225 .cpsr_mask = PSR_T_BIT,
226 .cpsr_val = PSR_T_BIT,
227 .fn = break_trap,
228};
229
d23bc1b3
DJ
230static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr)
231{
232 unsigned int instr2;
233 void __user *pc;
234
235 /* Check the second half of the instruction. */
236 pc = (void __user *)(instruction_pointer(regs) + 2);
237
238 if (processor_mode(regs) == SVC_MODE) {
239 instr2 = *(u16 *) pc;
240 } else {
241 get_user(instr2, (u16 __user *)pc);
242 }
243
244 if (instr2 == 0xa000) {
245 ptrace_break(current, regs);
246 return 0;
247 } else {
248 return 1;
249 }
250}
251
252static struct undef_hook thumb2_break_hook = {
253 .instr_mask = 0xffff,
254 .instr_val = 0xf7f0,
255 .cpsr_mask = PSR_T_BIT,
256 .cpsr_val = PSR_T_BIT,
257 .fn = thumb2_break_trap,
258};
259
1da177e4
LT
260static int __init ptrace_break_init(void)
261{
262 register_undef_hook(&arm_break_hook);
263 register_undef_hook(&thumb_break_hook);
d23bc1b3 264 register_undef_hook(&thumb2_break_hook);
1da177e4
LT
265 return 0;
266}
267
268core_initcall(ptrace_break_init);
269
270/*
271 * Read the word at offset "off" into the "struct user". We
272 * actually access the pt_regs stored on the kernel stack.
273 */
274static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
275 unsigned long __user *ret)
276{
277 unsigned long tmp;
278
279 if (off & 3 || off >= sizeof(struct user))
280 return -EIO;
281
282 tmp = 0;
68b7f715
PB
283 if (off == PT_TEXT_ADDR)
284 tmp = tsk->mm->start_code;
285 else if (off == PT_DATA_ADDR)
286 tmp = tsk->mm->start_data;
287 else if (off == PT_TEXT_END_ADDR)
288 tmp = tsk->mm->end_code;
289 else if (off < sizeof(struct pt_regs))
1da177e4
LT
290 tmp = get_user_reg(tsk, off >> 2);
291
292 return put_user(tmp, ret);
293}
294
295/*
296 * Write the word at offset "off" into "struct user". We
297 * actually access the pt_regs stored on the kernel stack.
298 */
299static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
300 unsigned long val)
301{
302 if (off & 3 || off >= sizeof(struct user))
303 return -EIO;
304
305 if (off >= sizeof(struct pt_regs))
306 return 0;
307
308 return put_user_reg(tsk, off >> 2, val);
309}
310
311/*
312 * Get all user integer registers.
313 */
314static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
315{
815d5ec8 316 struct pt_regs *regs = task_pt_regs(tsk);
1da177e4
LT
317
318 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
319}
320
321/*
322 * Set all user integer registers.
323 */
324static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
325{
326 struct pt_regs newregs;
327 int ret;
328
329 ret = -EFAULT;
330 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
815d5ec8 331 struct pt_regs *regs = task_pt_regs(tsk);
1da177e4
LT
332
333 ret = -EINVAL;
334 if (valid_user_regs(&newregs)) {
335 *regs = newregs;
336 ret = 0;
337 }
338 }
339
340 return ret;
341}
342
343/*
344 * Get the child FPU state.
345 */
346static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
347{
e7c1b32f 348 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
1da177e4
LT
349 sizeof(struct user_fp)) ? -EFAULT : 0;
350}
351
352/*
353 * Set the child FPU state.
354 */
355static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
356{
e7c1b32f 357 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
358 thread->used_cp[1] = thread->used_cp[2] = 1;
359 return copy_from_user(&thread->fpstate, ufp,
360 sizeof(struct user_fp)) ? -EFAULT : 0;
361}
362
363#ifdef CONFIG_IWMMXT
364
365/*
366 * Get the child iWMMXt state.
367 */
368static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
369{
e7c1b32f 370 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
371
372 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
373 return -ENODATA;
374 iwmmxt_task_disable(thread); /* force it to ram */
cdaabbd7
RK
375 return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
376 ? -EFAULT : 0;
1da177e4
LT
377}
378
379/*
380 * Set the child iWMMXt state.
381 */
382static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
383{
e7c1b32f 384 struct thread_info *thread = task_thread_info(tsk);
1da177e4
LT
385
386 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
387 return -EACCES;
388 iwmmxt_task_release(thread); /* force a reload */
17320a96 389 return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
cdaabbd7 390 ? -EFAULT : 0;
1da177e4
LT
391}
392
393#endif
394
5429b060
LB
395#ifdef CONFIG_CRUNCH
396/*
397 * Get the child Crunch state.
398 */
399static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
400{
401 struct thread_info *thread = task_thread_info(tsk);
402
403 crunch_task_disable(thread); /* force it to ram */
404 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
405 ? -EFAULT : 0;
406}
407
408/*
409 * Set the child Crunch state.
410 */
411static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
412{
413 struct thread_info *thread = task_thread_info(tsk);
414
415 crunch_task_release(thread); /* force a reload */
416 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
417 ? -EFAULT : 0;
418}
419#endif
420
3d1228ea
CM
421#ifdef CONFIG_VFP
422/*
423 * Get the child VFP state.
424 */
425static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data)
426{
427 struct thread_info *thread = task_thread_info(tsk);
428 union vfp_state *vfp = &thread->vfpstate;
429 struct user_vfp __user *ufp = data;
430
ad187f95 431 vfp_sync_hwstate(thread);
3d1228ea
CM
432
433 /* copy the floating point registers */
434 if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs,
435 sizeof(vfp->hard.fpregs)))
436 return -EFAULT;
437
438 /* copy the status and control register */
439 if (put_user(vfp->hard.fpscr, &ufp->fpscr))
440 return -EFAULT;
441
442 return 0;
443}
444
445/*
446 * Set the child VFP state.
447 */
448static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data)
449{
450 struct thread_info *thread = task_thread_info(tsk);
451 union vfp_state *vfp = &thread->vfpstate;
452 struct user_vfp __user *ufp = data;
453
ad187f95 454 vfp_sync_hwstate(thread);
3d1228ea
CM
455
456 /* copy the floating point registers */
457 if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs,
458 sizeof(vfp->hard.fpregs)))
459 return -EFAULT;
460
461 /* copy the status and control register */
462 if (get_user(vfp->hard.fpscr, &ufp->fpscr))
463 return -EFAULT;
464
ad187f95
RK
465 vfp_flush_hwstate(thread);
466
3d1228ea
CM
467 return 0;
468}
469#endif
470
864232fa
WD
471#ifdef CONFIG_HAVE_HW_BREAKPOINT
472/*
473 * Convert a virtual register number into an index for a thread_info
474 * breakpoint array. Breakpoints are identified using positive numbers
475 * whilst watchpoints are negative. The registers are laid out as pairs
476 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
477 * Register 0 is reserved for describing resource information.
478 */
479static int ptrace_hbp_num_to_idx(long num)
480{
481 if (num < 0)
482 num = (ARM_MAX_BRP << 1) - num;
483 return (num - 1) >> 1;
484}
485
486/*
487 * Returns the virtual register number for the address of the
488 * breakpoint at index idx.
489 */
490static long ptrace_hbp_idx_to_num(int idx)
491{
492 long mid = ARM_MAX_BRP << 1;
493 long num = (idx << 1) + 1;
494 return num > mid ? mid - num : num;
495}
496
497/*
498 * Handle hitting a HW-breakpoint.
499 */
500static void ptrace_hbptriggered(struct perf_event *bp, int unused,
501 struct perf_sample_data *data,
502 struct pt_regs *regs)
503{
504 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
505 long num;
506 int i;
507 siginfo_t info;
508
509 for (i = 0; i < ARM_MAX_HBP_SLOTS; ++i)
510 if (current->thread.debug.hbp[i] == bp)
511 break;
512
513 num = (i == ARM_MAX_HBP_SLOTS) ? 0 : ptrace_hbp_idx_to_num(i);
514
515 info.si_signo = SIGTRAP;
516 info.si_errno = (int)num;
517 info.si_code = TRAP_HWBKPT;
518 info.si_addr = (void __user *)(bkpt->trigger);
519
520 force_sig_info(SIGTRAP, &info, current);
521}
522
523/*
524 * Set ptrace breakpoint pointers to zero for this task.
525 * This is required in order to prevent child processes from unregistering
526 * breakpoints held by their parent.
527 */
528void clear_ptrace_hw_breakpoint(struct task_struct *tsk)
529{
530 memset(tsk->thread.debug.hbp, 0, sizeof(tsk->thread.debug.hbp));
531}
532
533/*
534 * Unregister breakpoints from this task and reset the pointers in
535 * the thread_struct.
536 */
537void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
538{
539 int i;
540 struct thread_struct *t = &tsk->thread;
541
542 for (i = 0; i < ARM_MAX_HBP_SLOTS; i++) {
543 if (t->debug.hbp[i]) {
544 unregister_hw_breakpoint(t->debug.hbp[i]);
545 t->debug.hbp[i] = NULL;
546 }
547 }
548}
549
550static u32 ptrace_get_hbp_resource_info(void)
551{
552 u8 num_brps, num_wrps, debug_arch, wp_len;
553 u32 reg = 0;
554
555 num_brps = hw_breakpoint_slots(TYPE_INST);
556 num_wrps = hw_breakpoint_slots(TYPE_DATA);
557 debug_arch = arch_get_debug_arch();
558 wp_len = arch_get_max_wp_len();
559
560 reg |= debug_arch;
561 reg <<= 8;
562 reg |= wp_len;
563 reg <<= 8;
564 reg |= num_wrps;
565 reg <<= 8;
566 reg |= num_brps;
567
568 return reg;
569}
570
571static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
572{
573 struct perf_event_attr attr;
574
575 ptrace_breakpoint_init(&attr);
576
577 /* Initialise fields to sane defaults. */
578 attr.bp_addr = 0;
579 attr.bp_len = HW_BREAKPOINT_LEN_4;
580 attr.bp_type = type;
581 attr.disabled = 1;
582
583 return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, tsk);
584}
585
586static int ptrace_gethbpregs(struct task_struct *tsk, long num,
587 unsigned long __user *data)
588{
589 u32 reg;
590 int idx, ret = 0;
591 struct perf_event *bp;
592 struct arch_hw_breakpoint_ctrl arch_ctrl;
593
594 if (num == 0) {
595 reg = ptrace_get_hbp_resource_info();
596 } else {
597 idx = ptrace_hbp_num_to_idx(num);
598 if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) {
599 ret = -EINVAL;
600 goto out;
601 }
602
603 bp = tsk->thread.debug.hbp[idx];
604 if (!bp) {
605 reg = 0;
606 goto put;
607 }
608
609 arch_ctrl = counter_arch_bp(bp)->ctrl;
610
611 /*
612 * Fix up the len because we may have adjusted it
613 * to compensate for an unaligned address.
614 */
615 while (!(arch_ctrl.len & 0x1))
616 arch_ctrl.len >>= 1;
617
ba55d3db 618 if (num & 0x1)
864232fa 619 reg = bp->attr.bp_addr;
ba55d3db
WD
620 else
621 reg = encode_ctrl_reg(arch_ctrl);
864232fa
WD
622 }
623
624put:
625 if (put_user(reg, data))
626 ret = -EFAULT;
627
628out:
629 return ret;
630}
631
632static int ptrace_sethbpregs(struct task_struct *tsk, long num,
633 unsigned long __user *data)
634{
635 int idx, gen_len, gen_type, implied_type, ret = 0;
636 u32 user_val;
637 struct perf_event *bp;
638 struct arch_hw_breakpoint_ctrl ctrl;
639 struct perf_event_attr attr;
640
641 if (num == 0)
642 goto out;
643 else if (num < 0)
644 implied_type = HW_BREAKPOINT_RW;
645 else
646 implied_type = HW_BREAKPOINT_X;
647
648 idx = ptrace_hbp_num_to_idx(num);
649 if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) {
650 ret = -EINVAL;
651 goto out;
652 }
653
654 if (get_user(user_val, data)) {
655 ret = -EFAULT;
656 goto out;
657 }
658
659 bp = tsk->thread.debug.hbp[idx];
660 if (!bp) {
661 bp = ptrace_hbp_create(tsk, implied_type);
662 if (IS_ERR(bp)) {
663 ret = PTR_ERR(bp);
664 goto out;
665 }
666 tsk->thread.debug.hbp[idx] = bp;
667 }
668
669 attr = bp->attr;
670
671 if (num & 0x1) {
672 /* Address */
673 attr.bp_addr = user_val;
674 } else {
675 /* Control */
676 decode_ctrl_reg(user_val, &ctrl);
677 ret = arch_bp_generic_fields(ctrl, &gen_len, &gen_type);
678 if (ret)
679 goto out;
680
681 if ((gen_type & implied_type) != gen_type) {
ce9b1b09
WD
682 ret = -EINVAL;
683 goto out;
864232fa
WD
684 }
685
686 attr.bp_len = gen_len;
687 attr.bp_type = gen_type;
688 attr.disabled = !ctrl.enabled;
689 }
690
691 ret = modify_user_hw_breakpoint(bp, &attr);
692out:
693 return ret;
694}
695#endif
696
9b05a69e
NK
697long arch_ptrace(struct task_struct *child, long request,
698 unsigned long addr, unsigned long data)
1da177e4 699{
1da177e4 700 int ret;
b640a0d1 701 unsigned long __user *datap = (unsigned long __user *) data;
1da177e4
LT
702
703 switch (request) {
1da177e4 704 case PTRACE_PEEKUSR:
b640a0d1 705 ret = ptrace_read_user(child, addr, datap);
1da177e4
LT
706 break;
707
1da177e4
LT
708 case PTRACE_POKEUSR:
709 ret = ptrace_write_user(child, addr, data);
710 break;
711
1da177e4 712 case PTRACE_GETREGS:
b640a0d1 713 ret = ptrace_getregs(child, datap);
1da177e4
LT
714 break;
715
716 case PTRACE_SETREGS:
b640a0d1 717 ret = ptrace_setregs(child, datap);
1da177e4
LT
718 break;
719
720 case PTRACE_GETFPREGS:
b640a0d1 721 ret = ptrace_getfpregs(child, datap);
1da177e4
LT
722 break;
723
724 case PTRACE_SETFPREGS:
b640a0d1 725 ret = ptrace_setfpregs(child, datap);
1da177e4
LT
726 break;
727
728#ifdef CONFIG_IWMMXT
729 case PTRACE_GETWMMXREGS:
b640a0d1 730 ret = ptrace_getwmmxregs(child, datap);
1da177e4
LT
731 break;
732
733 case PTRACE_SETWMMXREGS:
b640a0d1 734 ret = ptrace_setwmmxregs(child, datap);
1da177e4
LT
735 break;
736#endif
737
738 case PTRACE_GET_THREAD_AREA:
e7c1b32f 739 ret = put_user(task_thread_info(child)->tp_value,
b640a0d1 740 datap);
1da177e4
LT
741 break;
742
3f471126 743 case PTRACE_SET_SYSCALL:
5ba6d3fe 744 task_thread_info(child)->syscall = data;
3f471126 745 ret = 0;
3f471126
NP
746 break;
747
5429b060
LB
748#ifdef CONFIG_CRUNCH
749 case PTRACE_GETCRUNCHREGS:
b640a0d1 750 ret = ptrace_getcrunchregs(child, datap);
5429b060
LB
751 break;
752
753 case PTRACE_SETCRUNCHREGS:
b640a0d1 754 ret = ptrace_setcrunchregs(child, datap);
5429b060
LB
755 break;
756#endif
757
3d1228ea
CM
758#ifdef CONFIG_VFP
759 case PTRACE_GETVFPREGS:
b640a0d1 760 ret = ptrace_getvfpregs(child, datap);
3d1228ea
CM
761 break;
762
763 case PTRACE_SETVFPREGS:
b640a0d1 764 ret = ptrace_setvfpregs(child, datap);
3d1228ea
CM
765 break;
766#endif
767
864232fa
WD
768#ifdef CONFIG_HAVE_HW_BREAKPOINT
769 case PTRACE_GETHBPREGS:
bf0b8f4b
FW
770 if (ptrace_get_breakpoints(child) < 0)
771 return -ESRCH;
772
864232fa
WD
773 ret = ptrace_gethbpregs(child, addr,
774 (unsigned long __user *)data);
bf0b8f4b 775 ptrace_put_breakpoints(child);
864232fa
WD
776 break;
777 case PTRACE_SETHBPREGS:
bf0b8f4b
FW
778 if (ptrace_get_breakpoints(child) < 0)
779 return -ESRCH;
780
864232fa
WD
781 ret = ptrace_sethbpregs(child, addr,
782 (unsigned long __user *)data);
bf0b8f4b 783 ptrace_put_breakpoints(child);
864232fa
WD
784 break;
785#endif
786
1da177e4
LT
787 default:
788 ret = ptrace_request(child, request, addr, data);
789 break;
790 }
791
792 return ret;
793}
794
3f471126 795asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
1da177e4
LT
796{
797 unsigned long ip;
798
799 if (!test_thread_flag(TIF_SYSCALL_TRACE))
3f471126 800 return scno;
1da177e4 801 if (!(current->ptrace & PT_PTRACED))
3f471126 802 return scno;
1da177e4
LT
803
804 /*
805 * Save IP. IP is used to denote syscall entry/exit:
806 * IP = 0 -> entry, = 1 -> exit
807 */
808 ip = regs->ARM_ip;
809 regs->ARM_ip = why;
810
5ba6d3fe 811 current_thread_info()->syscall = scno;
3f471126 812
1da177e4
LT
813 /* the 0x80 provides a way for the tracing parent to distinguish
814 between a syscall stop and SIGTRAP delivery */
815 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
816 ? 0x80 : 0));
817 /*
818 * this isn't the same as continuing with a signal, but it will do
819 * for normal use. strace only continues with a signal if the
820 * stopping signal is not SIGTRAP. -brl
821 */
822 if (current->exit_code) {
823 send_sig(current->exit_code, current, 1);
824 current->exit_code = 0;
825 }
826 regs->ARM_ip = ip;
3f471126 827
5ba6d3fe 828 return current_thread_info()->syscall;
1da177e4 829}