[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / asm-offsets.c

/*
 * Copyright (C) 1995-2003 Russell King
 *               2001-2002 Keith Owens
 *     
 * Generate definitions needed by assembly language modules.
 * This code generates raw asm output which is post-processed to extract
 * and format the required data.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <asm/cacheflush.h>
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/mach/arch.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/procinfo.h>
#include <asm/hardware/cache-l2x0.h>
#include <linux/kbuild.h>

/*
 * Make sure that the compiler and target are compatible.
 */
#if defined(__APCS_26__)
#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
#endif
/*
 * GCC 3.0, 3.1: general bad code generation.
 * GCC 3.2.0: incorrect function argument offset calculation.
 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
 *            (http://gcc.gnu.org/PR8896) and incorrect structure
 *	      initialisation in fs/jffs2/erase.c
 */
#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
#error Your compiler is too buggy; it is known to miscompile kernels.
#error    Known good compilers: 3.3
#endif

int main(void)
{
  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
#ifdef CONFIG_CC_STACKPROTECTOR
  DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
#endif
  BLANK();
  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
  DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
  DEFINE(TI_TASK,		offsetof(struct thread_info, task));
  DEFINE(TI_EXEC_DOMAIN,	offsetof(struct thread_info, exec_domain));
  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
  DEFINE(TI_CPU_DOMAIN,		offsetof(struct thread_info, cpu_domain));
  DEFINE(TI_CPU_SAVE,		offsetof(struct thread_info, cpu_context));
  DEFINE(TI_USED_CP,		offsetof(struct thread_info, used_cp));
  DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
  DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
  DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
#ifdef CONFIG_SMP
  DEFINE(VFP_CPU,		offsetof(union vfp_state, hard.cpu));
#endif
#ifdef CONFIG_ARM_THUMBEE
  DEFINE(TI_THUMBEE_STATE,	offsetof(struct thread_info, thumbee_state));
#endif
#ifdef CONFIG_IWMMXT
  DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
#endif
#ifdef CONFIG_CRUNCH
  DEFINE(TI_CRUNCH_STATE,	offsetof(struct thread_info, crunchstate));
#endif
  BLANK();
  DEFINE(S_R0,			offsetof(struct pt_regs, ARM_r0));
  DEFINE(S_R1,			offsetof(struct pt_regs, ARM_r1));
  DEFINE(S_R2,			offsetof(struct pt_regs, ARM_r2));
  DEFINE(S_R3,			offsetof(struct pt_regs, ARM_r3));
  DEFINE(S_R4,			offsetof(struct pt_regs, ARM_r4));
  DEFINE(S_R5,			offsetof(struct pt_regs, ARM_r5));
  DEFINE(S_R6,			offsetof(struct pt_regs, ARM_r6));
  DEFINE(S_R7,			offsetof(struct pt_regs, ARM_r7));
  DEFINE(S_R8,			offsetof(struct pt_regs, ARM_r8));
  DEFINE(S_R9,			offsetof(struct pt_regs, ARM_r9));
  DEFINE(S_R10,			offsetof(struct pt_regs, ARM_r10));
  DEFINE(S_FP,			offsetof(struct pt_regs, ARM_fp));
  DEFINE(S_IP,			offsetof(struct pt_regs, ARM_ip));
  DEFINE(S_SP,			offsetof(struct pt_regs, ARM_sp));
  DEFINE(S_LR,			offsetof(struct pt_regs, ARM_lr));
  DEFINE(S_PC,			offsetof(struct pt_regs, ARM_pc));
  DEFINE(S_PSR,			offsetof(struct pt_regs, ARM_cpsr));
  DEFINE(S_OLD_R0,		offsetof(struct pt_regs, ARM_ORIG_r0));
  DEFINE(S_FRAME_SIZE,		sizeof(struct pt_regs));
  BLANK();
#ifdef CONFIG_CACHE_L2X0
  DEFINE(L2X0_R_PHY_BASE,	offsetof(struct l2x0_regs, phy_base));
  DEFINE(L2X0_R_AUX_CTRL,	offsetof(struct l2x0_regs, aux_ctrl));
  DEFINE(L2X0_R_TAG_LATENCY,	offsetof(struct l2x0_regs, tag_latency));
  DEFINE(L2X0_R_DATA_LATENCY,	offsetof(struct l2x0_regs, data_latency));
  DEFINE(L2X0_R_FILTER_START,	offsetof(struct l2x0_regs, filter_start));
  DEFINE(L2X0_R_FILTER_END,	offsetof(struct l2x0_regs, filter_end));
  DEFINE(L2X0_R_PREFETCH_CTRL,	offsetof(struct l2x0_regs, prefetch_ctrl));
  DEFINE(L2X0_R_PWR_CTRL,	offsetof(struct l2x0_regs, pwr_ctrl));
  BLANK();
#endif
#ifdef CONFIG_CPU_HAS_ASID
  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id));
  BLANK();
#endif
  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
  BLANK();
  DEFINE(VM_EXEC,	       	VM_EXEC);
  BLANK();
  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
  BLANK();
  DEFINE(SYS_ERROR0,		0x9f0000);
  BLANK();
  DEFINE(SIZEOF_MACHINE_DESC,	sizeof(struct machine_desc));
  DEFINE(MACHINFO_TYPE,		offsetof(struct machine_desc, nr));
  DEFINE(MACHINFO_NAME,		offsetof(struct machine_desc, name));
  BLANK();
  DEFINE(PROC_INFO_SZ,		sizeof(struct proc_info_list));
  DEFINE(PROCINFO_INITFUNC,	offsetof(struct proc_info_list, __cpu_flush));
  DEFINE(PROCINFO_MM_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
  DEFINE(PROCINFO_IO_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_io_mmu_flags));
  BLANK();
#ifdef MULTI_DABORT
  DEFINE(PROCESSOR_DABT_FUNC,	offsetof(struct processor, _data_abort));
#endif
#ifdef MULTI_PABORT
  DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
#endif
#ifdef MULTI_CPU
  DEFINE(CPU_SLEEP_SIZE,	offsetof(struct processor, suspend_size));
  DEFINE(CPU_DO_SUSPEND,	offsetof(struct processor, do_suspend));
  DEFINE(CPU_DO_RESUME,		offsetof(struct processor, do_resume));
#endif
#ifdef MULTI_CACHE
  DEFINE(CACHE_FLUSH_KERN_ALL,	offsetof(struct cpu_cache_fns, flush_kern_all));
#endif
  BLANK();
  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
  return 0; 
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 1995-2003 Russell King
	3	* 2001-2002 Keith Owens
	4	*
	5	* Generate definitions needed by assembly language modules.
	6	* This code generates raw asm output which is post-processed to extract
	7	* and format the required data.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13	#include <linux/sched.h>
	14	#include <linux/mm.h>
a9c9147e	15	#include <linux/dma-mapping.h>
f6b0fa02	16	#include <asm/cacheflush.h>
753790e7 RK	17	#include <asm/glue-df.h>
753790e7 RK	18	#include <asm/glue-pf.h>
1da177e4 LT	19	#include <asm/mach/arch.h>
	20	#include <asm/thread_info.h>
	21	#include <asm/memory.h>
ee90dabc	22	#include <asm/procinfo.h>
91c2ebb9	23	#include <asm/hardware/cache-l2x0.h>
02cbe474	24	#include <linux/kbuild.h>
1da177e4 LT	25
	26	/*
	27	* Make sure that the compiler and target are compatible.
	28	*/
	29	#if defined(__APCS_26__)
	30	#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
	31	#endif
	32	/*
1da177e4 LT	33	* GCC 3.0, 3.1: general bad code generation.
	34	* GCC 3.2.0: incorrect function argument offset calculation.
	35	* GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
	36	* (http://gcc.gnu.org/PR8896) and incorrect structure
	37	* initialisation in fs/jffs2/erase.c
	38	*/
a1365647	39	#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
1da177e4	40	#error Your compiler is too buggy; it is known to miscompile kernels.
a1365647	41	#error Known good compilers: 3.3
1da177e4 LT	42	#endif
1da177e4 LT	43
1da177e4 LT	44	int main(void)
	45	{
	46	DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
df0698be NP	47	#ifdef CONFIG_CC_STACKPROTECTOR
	48	DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
	49	#endif
1da177e4 LT	50	BLANK();
	51	DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
	52	DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
	53	DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
	54	DEFINE(TI_TASK, offsetof(struct thread_info, task));
	55	DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
	56	DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
	57	DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
	58	DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
	59	DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
	60	DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
	61	DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
	62	DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
f8f2a852 RK	63	#ifdef CONFIG_SMP
	64	DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
	65	#endif
d7f864be CM	66	#ifdef CONFIG_ARM_THUMBEE
	67	DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
	68	#endif
cdaabbd7 RK	69	#ifdef CONFIG_IWMMXT
cdaabbd7 RK	70	DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
c17fad11 LB	71	#endif
	72	#ifdef CONFIG_CRUNCH
	73	DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
cdaabbd7	74	#endif
1da177e4	75	BLANK();
925c8a1a RK	76	DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
	77	DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
	78	DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
	79	DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
	80	DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
	81	DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
	82	DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
	83	DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
	84	DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
	85	DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
	86	DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
	87	DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
	88	DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
	89	DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
	90	DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
	91	DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
	92	DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
	93	DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
	94	DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
	95	BLANK();
91c2ebb9 BS	96	#ifdef CONFIG_CACHE_L2X0
	97	DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
	98	DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
	99	DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
	100	DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
	101	DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
	102	DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
	103	DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
	104	DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
	105	BLANK();
	106	#endif
516793c6	107	#ifdef CONFIG_CPU_HAS_ASID
1da177e4 LT	108	DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
	109	BLANK();
	110	#endif
	111	DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
	112	DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
	113	BLANK();
	114	DEFINE(VM_EXEC, VM_EXEC);
	115	BLANK();
	116	DEFINE(PAGE_SZ, PAGE_SIZE);
1da177e4 LT	117	BLANK();
	118	DEFINE(SYS_ERROR0, 0x9f0000);
	119	BLANK();
	120	DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
2eb9d315 UZ	121	DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
2eb9d315 UZ	122	DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
2ceec0c8 UZ	123	BLANK();
2ceec0c8 UZ	124	DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
2eb9d315	125	DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
8799ee9f RK	126	DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
8799ee9f RK	127	DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
48d7927b PB	128	BLANK();
	129	#ifdef MULTI_DABORT
	130	DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
	131	#endif
	132	#ifdef MULTI_PABORT
	133	DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
f6b0fa02 RK	134	#endif
	135	#ifdef MULTI_CPU
	136	DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
	137	DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
	138	DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
	139	#endif
	140	#ifdef MULTI_CACHE
	141	DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
48d7927b	142	#endif
a9c9147e RK	143	BLANK();
	144	DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
	145	DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
	146	DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
1da177e4 LT	147	return 0;
1da177e4 LT	148	}