ARM: move cache/processor/fault glue to separate include files
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / asm-offsets.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (C) 1995-2003 Russell King
3 * 2001-2002 Keith Owens
4 *
5 * Generate definitions needed by assembly language modules.
6 * This code generates raw asm output which is post-processed to extract
7 * and format the required data.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/sched.h>
14#include <linux/mm.h>
a9c9147e 15#include <linux/dma-mapping.h>
753790e7
RK
16#include <asm/glue-df.h>
17#include <asm/glue-pf.h>
1da177e4
LT
18#include <asm/mach/arch.h>
19#include <asm/thread_info.h>
20#include <asm/memory.h>
ee90dabc 21#include <asm/procinfo.h>
02cbe474 22#include <linux/kbuild.h>
1da177e4
LT
23
24/*
25 * Make sure that the compiler and target are compatible.
26 */
27#if defined(__APCS_26__)
28#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
29#endif
30/*
1da177e4
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31 * GCC 3.0, 3.1: general bad code generation.
32 * GCC 3.2.0: incorrect function argument offset calculation.
33 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
34 * (http://gcc.gnu.org/PR8896) and incorrect structure
35 * initialisation in fs/jffs2/erase.c
36 */
a1365647 37#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
1da177e4 38#error Your compiler is too buggy; it is known to miscompile kernels.
a1365647 39#error Known good compilers: 3.3
1da177e4
LT
40#endif
41
1da177e4
LT
42int main(void)
43{
44 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
df0698be
NP
45#ifdef CONFIG_CC_STACKPROTECTOR
46 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
47#endif
1da177e4
LT
48 BLANK();
49 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
50 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
51 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
52 DEFINE(TI_TASK, offsetof(struct thread_info, task));
53 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
54 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
55 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
56 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
57 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
58 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
59 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
60 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
d7f864be
CM
61#ifdef CONFIG_ARM_THUMBEE
62 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
63#endif
cdaabbd7
RK
64#ifdef CONFIG_IWMMXT
65 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
c17fad11
LB
66#endif
67#ifdef CONFIG_CRUNCH
68 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
cdaabbd7 69#endif
1da177e4 70 BLANK();
925c8a1a
RK
71 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
72 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
73 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
74 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
75 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
76 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
77 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
78 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
79 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
80 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
81 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
82 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
83 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
84 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
85 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
86 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
87 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
88 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
89 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
90 BLANK();
516793c6 91#ifdef CONFIG_CPU_HAS_ASID
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LT
92 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
93 BLANK();
94#endif
95 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
96 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
97 BLANK();
98 DEFINE(VM_EXEC, VM_EXEC);
99 BLANK();
100 DEFINE(PAGE_SZ, PAGE_SIZE);
1da177e4
LT
101 BLANK();
102 DEFINE(SYS_ERROR0, 0x9f0000);
103 BLANK();
104 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
2eb9d315
UZ
105 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
106 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
2ceec0c8
UZ
107 BLANK();
108 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
2eb9d315 109 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
8799ee9f
RK
110 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
111 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
48d7927b
PB
112 BLANK();
113#ifdef MULTI_DABORT
114 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
115#endif
116#ifdef MULTI_PABORT
117 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
118#endif
a9c9147e
RK
119 BLANK();
120 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
121 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
122 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
1da177e4
LT
123 return 0;
124}