projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 | 1 | /* |
| 4baa9922 | 2 | * arch/arm/include/asm/smp.h |
| 1da177e4 LT |
3 | * |
| 4 | * Copyright (C) 2004-2005 ARM Ltd. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | #ifndef __ASM_ARM_SMP_H | |
| 11 | #define __ASM_ARM_SMP_H | |
| 12 | ||
| 1da177e4 LT |
13 | #include <linux/threads.h> |
| 14 | #include <linux/cpumask.h> | |
| 15 | #include <linux/thread_info.h> | |
| 16 | ||
| a09e64fb | 17 | #include <mach/smp.h> |
| 1da177e4 LT |
18 | |
| 19 | #ifndef CONFIG_SMP | |
| 4baa9922 | 20 | # error "<asm/smp.h> included in non-SMP build" |
| 1da177e4 LT |
21 | #endif |
| 22 | ||
| 39c715b7 | 23 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
| 1da177e4 | 24 | |
| 1da177e4 LT |
25 | /* |
| 26 | * at the moment, there's not a big penalty for changing CPUs | |
| 27 | * (the >big< penalty is running SMP in the first place) | |
| 28 | */ | |
| 29 | #define PROC_CHANGE_PENALTY 15 | |
| 30 | ||
| 31 | struct seq_file; | |
| 32 | ||
| 33 | /* | |
| 34 | * generate IPI list text | |
| 35 | */ | |
| 36 | extern void show_ipi_list(struct seq_file *p); | |
| 37 | ||
| 3b6353fa RK |
38 | /* |
| 39 | * Called from assembly code, this handles an IPI. | |
| 40 | */ | |
| 41 | asmlinkage void do_IPI(struct pt_regs *regs); | |
| 42 | ||
| 7bbb7940 | 43 | /* |
| e03cdade | 44 | * Setup the set of possible CPUs (via set_cpu_possible) |
| 7bbb7940 RK |
45 | */ |
| 46 | extern void smp_init_cpus(void); | |
| 47 | ||
| 1da177e4 LT |
48 | /* |
| 49 | * Move global data into per-processor storage. | |
| 50 | */ | |
| 51 | extern void smp_store_cpu_info(unsigned int cpuid); | |
| 52 | ||
| 53 | /* | |
| 54 | * Raise an IPI cross call on CPUs in callmap. | |
| 55 | */ | |
| 82668104 | 56 | extern void smp_cross_call(const struct cpumask *mask); |
| dbebb4cb | 57 | |
| 1da177e4 LT |
58 | /* |
| 59 | * Boot a secondary CPU, and assign it the specified idle task. | |
| 60 | * This also gives us the initial stack to use for this CPU. | |
| 61 | */ | |
| 62 | extern int boot_secondary(unsigned int cpu, struct task_struct *); | |
| 63 | ||
| 3b6353fa RK |
64 | /* |
| 65 | * Called from platform specific assembly code, this is the | |
| 66 | * secondary CPU entry point. | |
| 67 | */ | |
| 68 | asmlinkage void secondary_start_kernel(void); | |
| 69 | ||
| e65f38ed RK |
70 | /* |
| 71 | * Perform platform specific initialisation of the specified CPU. | |
| 72 | */ | |
| 73 | extern void platform_secondary_init(unsigned int cpu); | |
| 74 | ||
| 75 | /* | |
| 76 | * Initial data for bringing up a secondary CPU. | |
| 77 | */ | |
| 78 | struct secondary_data { | |
| 79 | unsigned long pgdir; | |
| 80 | void *stack; | |
| 81 | }; | |
| 82 | extern struct secondary_data secondary_data; | |
| 83 | ||
| a054a811 | 84 | extern int __cpu_disable(void); |
| 8e2a43f5 | 85 | extern int platform_cpu_disable(unsigned int cpu); |
| a054a811 RK |
86 | |
| 87 | extern void __cpu_die(unsigned int cpu); | |
| 88 | extern void cpu_die(void); | |
| 89 | ||
| 90 | extern void platform_cpu_die(unsigned int cpu); | |
| 91 | extern int platform_cpu_kill(unsigned int cpu); | |
| 92 | extern void platform_cpu_enable(unsigned int cpu); | |
| 93 | ||
| f6dd9fa5 | 94 | extern void arch_send_call_function_single_ipi(int cpu); |
| 82668104 | 95 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); |
| f6dd9fa5 | 96 | |
| 37ee16ae RK |
97 | /* |
| 98 | * show local interrupt info | |
| 99 | */ | |
| 100 | extern void show_local_irqs(struct seq_file *); | |
| 101 | ||
| 1da177e4 | 102 | #endif /* ifndef __ASM_ARM_SMP_H */ |