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33f663ff CM |
1 | /* |
2 | * arch/arm/include/asm/outercache.h | |
3 | * | |
4 | * Copyright (C) 2010 ARM Ltd. | |
5 | * Written by Catalin Marinas <catalin.marinas@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #ifndef __ASM_OUTERCACHE_H | |
22 | #define __ASM_OUTERCACHE_H | |
23 | ||
ad6b9c9d WD |
24 | #include <linux/types.h> |
25 | ||
33f663ff CM |
26 | struct outer_cache_fns { |
27 | void (*inv_range)(unsigned long, unsigned long); | |
28 | void (*clean_range)(unsigned long, unsigned long); | |
29 | void (*flush_range)(unsigned long, unsigned long); | |
ae360a78 TG |
30 | void (*flush_all)(void); |
31 | void (*inv_all)(void); | |
32 | void (*disable)(void); | |
319f551a CM |
33 | #ifdef CONFIG_OUTER_CACHE_SYNC |
34 | void (*sync)(void); | |
35 | #endif | |
2839e06c | 36 | void (*set_debug)(unsigned long); |
91c2ebb9 | 37 | void (*resume)(void); |
33f663ff CM |
38 | }; |
39 | ||
40 | #ifdef CONFIG_OUTER_CACHE | |
41 | ||
42 | extern struct outer_cache_fns outer_cache; | |
43 | ||
ad6b9c9d | 44 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
33f663ff CM |
45 | { |
46 | if (outer_cache.inv_range) | |
47 | outer_cache.inv_range(start, end); | |
48 | } | |
ad6b9c9d | 49 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
33f663ff CM |
50 | { |
51 | if (outer_cache.clean_range) | |
52 | outer_cache.clean_range(start, end); | |
53 | } | |
ad6b9c9d | 54 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
33f663ff CM |
55 | { |
56 | if (outer_cache.flush_range) | |
57 | outer_cache.flush_range(start, end); | |
58 | } | |
59 | ||
ae360a78 TG |
60 | static inline void outer_flush_all(void) |
61 | { | |
62 | if (outer_cache.flush_all) | |
63 | outer_cache.flush_all(); | |
64 | } | |
65 | ||
66 | static inline void outer_inv_all(void) | |
67 | { | |
68 | if (outer_cache.inv_all) | |
69 | outer_cache.inv_all(); | |
70 | } | |
71 | ||
72 | static inline void outer_disable(void) | |
73 | { | |
74 | if (outer_cache.disable) | |
75 | outer_cache.disable(); | |
76 | } | |
77 | ||
91c2ebb9 BS |
78 | static inline void outer_resume(void) |
79 | { | |
80 | if (outer_cache.resume) | |
81 | outer_cache.resume(); | |
82 | } | |
83 | ||
33f663ff CM |
84 | #else |
85 | ||
ad6b9c9d | 86 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 87 | { } |
ad6b9c9d | 88 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 89 | { } |
ad6b9c9d | 90 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
33f663ff | 91 | { } |
ae360a78 TG |
92 | static inline void outer_flush_all(void) { } |
93 | static inline void outer_inv_all(void) { } | |
94 | static inline void outer_disable(void) { } | |
33f663ff CM |
95 | |
96 | #endif | |
97 | ||
319f551a CM |
98 | #ifdef CONFIG_OUTER_CACHE_SYNC |
99 | static inline void outer_sync(void) | |
100 | { | |
101 | if (outer_cache.sync) | |
102 | outer_cache.sync(); | |
103 | } | |
104 | #else | |
105 | static inline void outer_sync(void) | |
106 | { } | |
107 | #endif | |
108 | ||
33f663ff | 109 | #endif /* __ASM_OUTERCACHE_H */ |