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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/sa1111.c | |
3 | * | |
4 | * SA1111 support | |
5 | * | |
6 | * Original code by John Dorsey | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This file contains all generic SA1111 support. | |
13 | * | |
14 | * All initialization functions provided here are intended to be called | |
15 | * from machine specific code with proper arguments when required. | |
16 | */ | |
17 | #include <linux/config.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/errno.h> | |
24 | #include <linux/ioport.h> | |
d052d1be | 25 | #include <linux/platform_device.h> |
1da177e4 LT |
26 | #include <linux/slab.h> |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/dma-mapping.h> | |
97d654f8 | 29 | #include <linux/clk.h> |
1da177e4 LT |
30 | |
31 | #include <asm/hardware.h> | |
32 | #include <asm/mach-types.h> | |
33 | #include <asm/io.h> | |
34 | #include <asm/irq.h> | |
35 | #include <asm/mach/irq.h> | |
45e109d0 | 36 | #include <asm/sizes.h> |
1da177e4 LT |
37 | |
38 | #include <asm/hardware/sa1111.h> | |
39 | ||
1da177e4 LT |
40 | extern void __init sa1110_mb_enable(void); |
41 | ||
42 | /* | |
43 | * We keep the following data for the overall SA1111. Note that the | |
44 | * struct device and struct resource are "fake"; they should be supplied | |
45 | * by the bus above us. However, in the interests of getting all SA1111 | |
46 | * drivers converted over to the device model, we provide this as an | |
47 | * anchor point for all the other drivers. | |
48 | */ | |
49 | struct sa1111 { | |
50 | struct device *dev; | |
97d654f8 | 51 | struct clk *clk; |
1da177e4 LT |
52 | unsigned long phys; |
53 | int irq; | |
54 | spinlock_t lock; | |
55 | void __iomem *base; | |
56 | }; | |
57 | ||
58 | /* | |
59 | * We _really_ need to eliminate this. Its only users | |
60 | * are the PWM and DMA checking code. | |
61 | */ | |
62 | static struct sa1111 *g_sa1111; | |
63 | ||
64 | struct sa1111_dev_info { | |
65 | unsigned long offset; | |
66 | unsigned long skpcr_mask; | |
67 | unsigned int devid; | |
68 | unsigned int irq[6]; | |
69 | }; | |
70 | ||
71 | static struct sa1111_dev_info sa1111_devices[] = { | |
72 | { | |
73 | .offset = SA1111_USB, | |
74 | .skpcr_mask = SKPCR_UCLKEN, | |
75 | .devid = SA1111_DEVID_USB, | |
76 | .irq = { | |
77 | IRQ_USBPWR, | |
78 | IRQ_HCIM, | |
79 | IRQ_HCIBUFFACC, | |
80 | IRQ_HCIRMTWKP, | |
81 | IRQ_NHCIMFCIR, | |
82 | IRQ_USB_PORT_RESUME | |
83 | }, | |
84 | }, | |
85 | { | |
86 | .offset = 0x0600, | |
87 | .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, | |
88 | .devid = SA1111_DEVID_SAC, | |
89 | .irq = { | |
90 | AUDXMTDMADONEA, | |
91 | AUDXMTDMADONEB, | |
92 | AUDRCVDMADONEA, | |
93 | AUDRCVDMADONEB | |
94 | }, | |
95 | }, | |
96 | { | |
97 | .offset = 0x0800, | |
98 | .skpcr_mask = SKPCR_SCLKEN, | |
99 | .devid = SA1111_DEVID_SSP, | |
100 | }, | |
101 | { | |
102 | .offset = SA1111_KBD, | |
103 | .skpcr_mask = SKPCR_PTCLKEN, | |
104 | .devid = SA1111_DEVID_PS2, | |
105 | .irq = { | |
106 | IRQ_TPRXINT, | |
107 | IRQ_TPTXINT | |
108 | }, | |
109 | }, | |
110 | { | |
111 | .offset = SA1111_MSE, | |
112 | .skpcr_mask = SKPCR_PMCLKEN, | |
113 | .devid = SA1111_DEVID_PS2, | |
114 | .irq = { | |
115 | IRQ_MSRXINT, | |
116 | IRQ_MSTXINT | |
117 | }, | |
118 | }, | |
119 | { | |
120 | .offset = 0x1800, | |
121 | .skpcr_mask = 0, | |
122 | .devid = SA1111_DEVID_PCMCIA, | |
123 | .irq = { | |
124 | IRQ_S0_READY_NINT, | |
125 | IRQ_S0_CD_VALID, | |
126 | IRQ_S0_BVD1_STSCHG, | |
127 | IRQ_S1_READY_NINT, | |
128 | IRQ_S1_CD_VALID, | |
129 | IRQ_S1_BVD1_STSCHG, | |
130 | }, | |
131 | }, | |
132 | }; | |
133 | ||
1b12050f RK |
134 | void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes) |
135 | { | |
136 | unsigned int sz = SZ_1M >> PAGE_SHIFT; | |
137 | ||
138 | if (node != 0) | |
139 | sz = 0; | |
140 | ||
141 | size[1] = size[0] - sz; | |
142 | size[0] = sz; | |
143 | } | |
144 | ||
1da177e4 LT |
145 | /* |
146 | * SA1111 interrupt support. Since clearing an IRQ while there are | |
147 | * active IRQs causes the interrupt output to pulse, the upper levels | |
148 | * will call us again if there are more interrupts to process. | |
149 | */ | |
150 | static void | |
151 | sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) | |
152 | { | |
153 | unsigned int stat0, stat1, i; | |
154 | void __iomem *base = desc->data; | |
155 | ||
156 | stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); | |
157 | stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); | |
158 | ||
159 | sa1111_writel(stat0, base + SA1111_INTSTATCLR0); | |
160 | ||
161 | desc->chip->ack(irq); | |
162 | ||
163 | sa1111_writel(stat1, base + SA1111_INTSTATCLR1); | |
164 | ||
165 | if (stat0 == 0 && stat1 == 0) { | |
166 | do_bad_IRQ(irq, desc, regs); | |
167 | return; | |
168 | } | |
169 | ||
170 | for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) | |
171 | if (stat0 & 1) | |
172 | do_edge_IRQ(i, irq_desc + i, regs); | |
173 | ||
174 | for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) | |
175 | if (stat1 & 1) | |
176 | do_edge_IRQ(i, irq_desc + i, regs); | |
177 | ||
178 | /* For level-based interrupts */ | |
179 | desc->chip->unmask(irq); | |
180 | } | |
181 | ||
182 | #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) | |
183 | #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) | |
184 | ||
185 | static void sa1111_ack_irq(unsigned int irq) | |
186 | { | |
187 | } | |
188 | ||
189 | static void sa1111_mask_lowirq(unsigned int irq) | |
190 | { | |
191 | void __iomem *mapbase = get_irq_chipdata(irq); | |
192 | unsigned long ie0; | |
193 | ||
194 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
195 | ie0 &= ~SA1111_IRQMASK_LO(irq); | |
196 | writel(ie0, mapbase + SA1111_INTEN0); | |
197 | } | |
198 | ||
199 | static void sa1111_unmask_lowirq(unsigned int irq) | |
200 | { | |
201 | void __iomem *mapbase = get_irq_chipdata(irq); | |
202 | unsigned long ie0; | |
203 | ||
204 | ie0 = sa1111_readl(mapbase + SA1111_INTEN0); | |
205 | ie0 |= SA1111_IRQMASK_LO(irq); | |
206 | sa1111_writel(ie0, mapbase + SA1111_INTEN0); | |
207 | } | |
208 | ||
209 | /* | |
210 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
211 | * (INTSET) which claims to do this. However, in practice no amount of | |
212 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
213 | * be triggered. In fact, its very difficult, if not impossible to get | |
214 | * INTSET to re-trigger the interrupt. | |
215 | */ | |
216 | static int sa1111_retrigger_lowirq(unsigned int irq) | |
217 | { | |
218 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
219 | void __iomem *mapbase = get_irq_chipdata(irq); | |
220 | unsigned long ip0; | |
221 | int i; | |
222 | ||
223 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
224 | for (i = 0; i < 8; i++) { | |
225 | sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); | |
226 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
227 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) | |
228 | break; | |
229 | } | |
230 | ||
231 | if (i == 8) | |
232 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
233 | "re-trigger IRQ%d\n", irq); | |
234 | return i == 8 ? -1 : 0; | |
235 | } | |
236 | ||
237 | static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) | |
238 | { | |
239 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
240 | void __iomem *mapbase = get_irq_chipdata(irq); | |
241 | unsigned long ip0; | |
242 | ||
243 | if (flags == IRQT_PROBE) | |
244 | return 0; | |
245 | ||
246 | if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) | |
247 | return -EINVAL; | |
248 | ||
249 | ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); | |
250 | if (flags & __IRQT_RISEDGE) | |
251 | ip0 &= ~mask; | |
252 | else | |
253 | ip0 |= mask; | |
254 | sa1111_writel(ip0, mapbase + SA1111_INTPOL0); | |
255 | sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); | |
256 | ||
257 | return 0; | |
258 | } | |
259 | ||
260 | static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) | |
261 | { | |
262 | unsigned int mask = SA1111_IRQMASK_LO(irq); | |
263 | void __iomem *mapbase = get_irq_chipdata(irq); | |
264 | unsigned long we0; | |
265 | ||
266 | we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); | |
267 | if (on) | |
268 | we0 |= mask; | |
269 | else | |
270 | we0 &= ~mask; | |
271 | sa1111_writel(we0, mapbase + SA1111_WAKEEN0); | |
272 | ||
273 | return 0; | |
274 | } | |
275 | ||
276 | static struct irqchip sa1111_low_chip = { | |
277 | .ack = sa1111_ack_irq, | |
278 | .mask = sa1111_mask_lowirq, | |
279 | .unmask = sa1111_unmask_lowirq, | |
280 | .retrigger = sa1111_retrigger_lowirq, | |
7801907b RK |
281 | .set_type = sa1111_type_lowirq, |
282 | .set_wake = sa1111_wake_lowirq, | |
1da177e4 LT |
283 | }; |
284 | ||
285 | static void sa1111_mask_highirq(unsigned int irq) | |
286 | { | |
287 | void __iomem *mapbase = get_irq_chipdata(irq); | |
288 | unsigned long ie1; | |
289 | ||
290 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
291 | ie1 &= ~SA1111_IRQMASK_HI(irq); | |
292 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); | |
293 | } | |
294 | ||
295 | static void sa1111_unmask_highirq(unsigned int irq) | |
296 | { | |
297 | void __iomem *mapbase = get_irq_chipdata(irq); | |
298 | unsigned long ie1; | |
299 | ||
300 | ie1 = sa1111_readl(mapbase + SA1111_INTEN1); | |
301 | ie1 |= SA1111_IRQMASK_HI(irq); | |
302 | sa1111_writel(ie1, mapbase + SA1111_INTEN1); | |
303 | } | |
304 | ||
305 | /* | |
306 | * Attempt to re-trigger the interrupt. The SA1111 contains a register | |
307 | * (INTSET) which claims to do this. However, in practice no amount of | |
308 | * manipulation of INTEN and INTSET guarantees that the interrupt will | |
309 | * be triggered. In fact, its very difficult, if not impossible to get | |
310 | * INTSET to re-trigger the interrupt. | |
311 | */ | |
312 | static int sa1111_retrigger_highirq(unsigned int irq) | |
313 | { | |
314 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
315 | void __iomem *mapbase = get_irq_chipdata(irq); | |
316 | unsigned long ip1; | |
317 | int i; | |
318 | ||
319 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
320 | for (i = 0; i < 8; i++) { | |
321 | sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); | |
322 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
323 | if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) | |
324 | break; | |
325 | } | |
326 | ||
327 | if (i == 8) | |
328 | printk(KERN_ERR "Danger Will Robinson: failed to " | |
329 | "re-trigger IRQ%d\n", irq); | |
330 | return i == 8 ? -1 : 0; | |
331 | } | |
332 | ||
333 | static int sa1111_type_highirq(unsigned int irq, unsigned int flags) | |
334 | { | |
335 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
336 | void __iomem *mapbase = get_irq_chipdata(irq); | |
337 | unsigned long ip1; | |
338 | ||
339 | if (flags == IRQT_PROBE) | |
340 | return 0; | |
341 | ||
342 | if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) | |
343 | return -EINVAL; | |
344 | ||
345 | ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); | |
346 | if (flags & __IRQT_RISEDGE) | |
347 | ip1 &= ~mask; | |
348 | else | |
349 | ip1 |= mask; | |
350 | sa1111_writel(ip1, mapbase + SA1111_INTPOL1); | |
351 | sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | static int sa1111_wake_highirq(unsigned int irq, unsigned int on) | |
357 | { | |
358 | unsigned int mask = SA1111_IRQMASK_HI(irq); | |
359 | void __iomem *mapbase = get_irq_chipdata(irq); | |
360 | unsigned long we1; | |
361 | ||
362 | we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); | |
363 | if (on) | |
364 | we1 |= mask; | |
365 | else | |
366 | we1 &= ~mask; | |
367 | sa1111_writel(we1, mapbase + SA1111_WAKEEN1); | |
368 | ||
369 | return 0; | |
370 | } | |
371 | ||
372 | static struct irqchip sa1111_high_chip = { | |
373 | .ack = sa1111_ack_irq, | |
374 | .mask = sa1111_mask_highirq, | |
375 | .unmask = sa1111_unmask_highirq, | |
376 | .retrigger = sa1111_retrigger_highirq, | |
7801907b RK |
377 | .set_type = sa1111_type_highirq, |
378 | .set_wake = sa1111_wake_highirq, | |
1da177e4 LT |
379 | }; |
380 | ||
381 | static void sa1111_setup_irq(struct sa1111 *sachip) | |
382 | { | |
383 | void __iomem *irqbase = sachip->base + SA1111_INTC; | |
384 | unsigned int irq; | |
385 | ||
386 | /* | |
387 | * We're guaranteed that this region hasn't been taken. | |
388 | */ | |
389 | request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); | |
390 | ||
391 | /* disable all IRQs */ | |
392 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
393 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
394 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
395 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
396 | ||
397 | /* | |
398 | * detect on rising edge. Note: Feb 2001 Errata for SA1111 | |
399 | * specifies that S0ReadyInt and S1ReadyInt should be '1'. | |
400 | */ | |
401 | sa1111_writel(0, irqbase + SA1111_INTPOL0); | |
402 | sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) | | |
403 | SA1111_IRQMASK_HI(IRQ_S1_READY_NINT), | |
404 | irqbase + SA1111_INTPOL1); | |
405 | ||
406 | /* clear all IRQs */ | |
407 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); | |
408 | sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); | |
409 | ||
410 | for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { | |
411 | set_irq_chip(irq, &sa1111_low_chip); | |
412 | set_irq_chipdata(irq, irqbase); | |
413 | set_irq_handler(irq, do_edge_IRQ); | |
414 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
415 | } | |
416 | ||
417 | for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { | |
418 | set_irq_chip(irq, &sa1111_high_chip); | |
419 | set_irq_chipdata(irq, irqbase); | |
420 | set_irq_handler(irq, do_edge_IRQ); | |
421 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
422 | } | |
423 | ||
424 | /* | |
425 | * Register SA1111 interrupt | |
426 | */ | |
427 | set_irq_type(sachip->irq, IRQT_RISING); | |
428 | set_irq_data(sachip->irq, irqbase); | |
429 | set_irq_chained_handler(sachip->irq, sa1111_irq_handler); | |
430 | } | |
431 | ||
432 | /* | |
433 | * Bring the SA1111 out of reset. This requires a set procedure: | |
434 | * 1. nRESET asserted (by hardware) | |
435 | * 2. CLK turned on from SA1110 | |
436 | * 3. nRESET deasserted | |
437 | * 4. VCO turned on, PLL_BYPASS turned off | |
438 | * 5. Wait lock time, then assert RCLKEn | |
439 | * 7. PCR set to allow clocking of individual functions | |
440 | * | |
441 | * Until we've done this, the only registers we can access are: | |
442 | * SBI_SKCR | |
443 | * SBI_SMCR | |
444 | * SBI_SKID | |
445 | */ | |
446 | static void sa1111_wake(struct sa1111 *sachip) | |
447 | { | |
448 | unsigned long flags, r; | |
449 | ||
450 | spin_lock_irqsave(&sachip->lock, flags); | |
451 | ||
97d654f8 | 452 | clk_enable(sachip->clk); |
1da177e4 LT |
453 | |
454 | /* | |
455 | * Turn VCO on, and disable PLL Bypass. | |
456 | */ | |
457 | r = sa1111_readl(sachip->base + SA1111_SKCR); | |
458 | r &= ~SKCR_VCO_OFF; | |
459 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
460 | r |= SKCR_PLL_BYPASS | SKCR_OE_EN; | |
461 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
462 | ||
463 | /* | |
464 | * Wait lock time. SA1111 manual _doesn't_ | |
465 | * specify a figure for this! We choose 100us. | |
466 | */ | |
467 | udelay(100); | |
468 | ||
469 | /* | |
470 | * Enable RCLK. We also ensure that RDYEN is set. | |
471 | */ | |
472 | r |= SKCR_RCLKEN | SKCR_RDYEN; | |
473 | sa1111_writel(r, sachip->base + SA1111_SKCR); | |
474 | ||
475 | /* | |
476 | * Wait 14 RCLK cycles for the chip to finish coming out | |
477 | * of reset. (RCLK=24MHz). This is 590ns. | |
478 | */ | |
479 | udelay(1); | |
480 | ||
481 | /* | |
482 | * Ensure all clocks are initially off. | |
483 | */ | |
484 | sa1111_writel(0, sachip->base + SA1111_SKPCR); | |
485 | ||
486 | spin_unlock_irqrestore(&sachip->lock, flags); | |
487 | } | |
488 | ||
489 | #ifdef CONFIG_ARCH_SA1100 | |
490 | ||
491 | static u32 sa1111_dma_mask[] = { | |
492 | ~0, | |
493 | ~(1 << 20), | |
494 | ~(1 << 23), | |
495 | ~(1 << 24), | |
496 | ~(1 << 25), | |
497 | ~(1 << 20), | |
498 | ~(1 << 20), | |
499 | 0, | |
500 | }; | |
501 | ||
502 | /* | |
503 | * Configure the SA1111 shared memory controller. | |
504 | */ | |
505 | void | |
506 | sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, | |
507 | unsigned int cas_latency) | |
508 | { | |
509 | unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); | |
510 | ||
511 | if (cas_latency == 3) | |
512 | smcr |= SMCR_CLAT; | |
513 | ||
514 | sa1111_writel(smcr, sachip->base + SA1111_SMCR); | |
515 | ||
516 | /* | |
517 | * Now clear the bits in the DMA mask to work around the SA1111 | |
518 | * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion | |
519 | * Chip Specification Update, June 2000, Erratum #7). | |
520 | */ | |
521 | if (sachip->dev->dma_mask) | |
522 | *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; | |
523 | ||
524 | sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; | |
525 | } | |
526 | ||
527 | #endif | |
528 | ||
529 | static void sa1111_dev_release(struct device *_dev) | |
530 | { | |
531 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
532 | ||
533 | release_resource(&dev->res); | |
534 | kfree(dev); | |
535 | } | |
536 | ||
537 | static int | |
538 | sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, | |
539 | struct sa1111_dev_info *info) | |
540 | { | |
541 | struct sa1111_dev *dev; | |
542 | int ret; | |
543 | ||
d2a02b93 | 544 | dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); |
1da177e4 LT |
545 | if (!dev) { |
546 | ret = -ENOMEM; | |
547 | goto out; | |
548 | } | |
1da177e4 LT |
549 | |
550 | snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id), | |
551 | "%4.4lx", info->offset); | |
552 | ||
553 | dev->devid = info->devid; | |
554 | dev->dev.parent = sachip->dev; | |
555 | dev->dev.bus = &sa1111_bus_type; | |
556 | dev->dev.release = sa1111_dev_release; | |
557 | dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; | |
558 | dev->res.start = sachip->phys + info->offset; | |
559 | dev->res.end = dev->res.start + 511; | |
560 | dev->res.name = dev->dev.bus_id; | |
561 | dev->res.flags = IORESOURCE_MEM; | |
562 | dev->mapbase = sachip->base + info->offset; | |
563 | dev->skpcr_mask = info->skpcr_mask; | |
564 | memmove(dev->irq, info->irq, sizeof(dev->irq)); | |
565 | ||
566 | ret = request_resource(parent, &dev->res); | |
567 | if (ret) { | |
568 | printk("SA1111: failed to allocate resource for %s\n", | |
569 | dev->res.name); | |
570 | kfree(dev); | |
571 | goto out; | |
572 | } | |
573 | ||
574 | ||
575 | ret = device_register(&dev->dev); | |
576 | if (ret) { | |
577 | release_resource(&dev->res); | |
578 | kfree(dev); | |
579 | goto out; | |
580 | } | |
581 | ||
582 | /* | |
583 | * If the parent device has a DMA mask associated with it, | |
584 | * propagate it down to the children. | |
585 | */ | |
586 | if (sachip->dev->dma_mask) { | |
587 | dev->dma_mask = *sachip->dev->dma_mask; | |
588 | dev->dev.dma_mask = &dev->dma_mask; | |
589 | ||
590 | if (dev->dma_mask != 0xffffffffUL) { | |
591 | ret = dmabounce_register_dev(&dev->dev, 1024, 4096); | |
592 | if (ret) { | |
593 | printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id); | |
594 | device_unregister(&dev->dev); | |
595 | } | |
596 | } | |
597 | } | |
598 | ||
599 | out: | |
600 | return ret; | |
601 | } | |
602 | ||
603 | /** | |
604 | * sa1111_probe - probe for a single SA1111 chip. | |
605 | * @phys_addr: physical address of device. | |
606 | * | |
607 | * Probe for a SA1111 chip. This must be called | |
608 | * before any other SA1111-specific code. | |
609 | * | |
610 | * Returns: | |
611 | * %-ENODEV device not found. | |
612 | * %-EBUSY physical address already marked in-use. | |
613 | * %0 successful. | |
614 | */ | |
615 | static int | |
616 | __sa1111_probe(struct device *me, struct resource *mem, int irq) | |
617 | { | |
618 | struct sa1111 *sachip; | |
619 | unsigned long id; | |
620 | unsigned int has_devs, val; | |
621 | int i, ret = -ENODEV; | |
622 | ||
d2a02b93 | 623 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
1da177e4 LT |
624 | if (!sachip) |
625 | return -ENOMEM; | |
626 | ||
97d654f8 RK |
627 | sachip->clk = clk_get(me, "GPIO27_CLK"); |
628 | if (!sachip->clk) { | |
629 | ret = PTR_ERR(sachip->clk); | |
630 | goto err_free; | |
631 | } | |
632 | ||
1da177e4 LT |
633 | spin_lock_init(&sachip->lock); |
634 | ||
635 | sachip->dev = me; | |
636 | dev_set_drvdata(sachip->dev, sachip); | |
637 | ||
638 | sachip->phys = mem->start; | |
639 | sachip->irq = irq; | |
640 | ||
641 | /* | |
642 | * Map the whole region. This also maps the | |
643 | * registers for our children. | |
644 | */ | |
645 | sachip->base = ioremap(mem->start, PAGE_SIZE * 2); | |
646 | if (!sachip->base) { | |
647 | ret = -ENOMEM; | |
97d654f8 | 648 | goto err_clkput; |
1da177e4 LT |
649 | } |
650 | ||
651 | /* | |
652 | * Probe for the chip. Only touch the SBI registers. | |
653 | */ | |
654 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
655 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
656 | printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); | |
657 | ret = -ENODEV; | |
97d654f8 | 658 | goto err_unmap; |
1da177e4 LT |
659 | } |
660 | ||
661 | printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " | |
662 | "silicon revision %lx, metal revision %lx\n", | |
663 | (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); | |
664 | ||
665 | /* | |
666 | * We found it. Wake the chip up, and initialise. | |
667 | */ | |
668 | sa1111_wake(sachip); | |
669 | ||
670 | #ifdef CONFIG_ARCH_SA1100 | |
671 | /* | |
672 | * The SDRAM configuration of the SA1110 and the SA1111 must | |
673 | * match. This is very important to ensure that SA1111 accesses | |
674 | * don't corrupt the SDRAM. Note that this ungates the SA1111's | |
675 | * MBGNT signal, so we must have called sa1110_mb_disable() | |
676 | * beforehand. | |
677 | */ | |
678 | sa1111_configure_smc(sachip, 1, | |
679 | FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), | |
680 | FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); | |
681 | ||
682 | /* | |
683 | * We only need to turn on DCLK whenever we want to use the | |
684 | * DMA. It can otherwise be held firmly in the off position. | |
685 | * (currently, we always enable it.) | |
686 | */ | |
687 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
688 | sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); | |
689 | ||
690 | /* | |
691 | * Enable the SA1110 memory bus request and grant signals. | |
692 | */ | |
693 | sa1110_mb_enable(); | |
694 | #endif | |
695 | ||
696 | /* | |
697 | * The interrupt controller must be initialised before any | |
698 | * other device to ensure that the interrupts are available. | |
699 | */ | |
700 | if (sachip->irq != NO_IRQ) | |
701 | sa1111_setup_irq(sachip); | |
702 | ||
703 | g_sa1111 = sachip; | |
704 | ||
705 | has_devs = ~0; | |
706 | if (machine_is_assabet() || machine_is_jornada720() || | |
707 | machine_is_badge4()) | |
708 | has_devs &= ~(1 << 4); | |
709 | else | |
710 | has_devs &= ~(1 << 1); | |
711 | ||
712 | for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) | |
713 | if (has_devs & (1 << i)) | |
714 | sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); | |
715 | ||
716 | return 0; | |
717 | ||
97d654f8 | 718 | err_unmap: |
1da177e4 | 719 | iounmap(sachip->base); |
97d654f8 RK |
720 | err_clkput: |
721 | clk_put(sachip->clk); | |
722 | err_free: | |
1da177e4 LT |
723 | kfree(sachip); |
724 | return ret; | |
725 | } | |
726 | ||
522c37b9 RK |
727 | static int sa1111_remove_one(struct device *dev, void *data) |
728 | { | |
729 | device_unregister(dev); | |
730 | return 0; | |
731 | } | |
732 | ||
1da177e4 LT |
733 | static void __sa1111_remove(struct sa1111 *sachip) |
734 | { | |
1da177e4 LT |
735 | void __iomem *irqbase = sachip->base + SA1111_INTC; |
736 | ||
522c37b9 | 737 | device_for_each_child(sachip->dev, NULL, sa1111_remove_one); |
1da177e4 LT |
738 | |
739 | /* disable all IRQs */ | |
740 | sa1111_writel(0, irqbase + SA1111_INTEN0); | |
741 | sa1111_writel(0, irqbase + SA1111_INTEN1); | |
742 | sa1111_writel(0, irqbase + SA1111_WAKEEN0); | |
743 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); | |
744 | ||
97d654f8 RK |
745 | clk_disable(sachip->clk); |
746 | ||
1da177e4 LT |
747 | if (sachip->irq != NO_IRQ) { |
748 | set_irq_chained_handler(sachip->irq, NULL); | |
749 | set_irq_data(sachip->irq, NULL); | |
750 | ||
751 | release_mem_region(sachip->phys + SA1111_INTC, 512); | |
752 | } | |
753 | ||
754 | iounmap(sachip->base); | |
97d654f8 | 755 | clk_put(sachip->clk); |
1da177e4 LT |
756 | kfree(sachip); |
757 | } | |
758 | ||
759 | /* | |
760 | * According to the "Intel StrongARM SA-1111 Microprocessor Companion | |
761 | * Chip Specification Update" (June 2000), erratum #7, there is a | |
762 | * significant bug in the SA1111 SDRAM shared memory controller. If | |
763 | * an access to a region of memory above 1MB relative to the bank base, | |
764 | * it is important that address bit 10 _NOT_ be asserted. Depending | |
765 | * on the configuration of the RAM, bit 10 may correspond to one | |
766 | * of several different (processor-relative) address bits. | |
767 | * | |
768 | * This routine only identifies whether or not a given DMA address | |
769 | * is susceptible to the bug. | |
770 | * | |
771 | * This should only get called for sa1111_device types due to the | |
772 | * way we configure our device dma_masks. | |
773 | */ | |
774 | int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) | |
775 | { | |
776 | /* | |
777 | * Section 4.6 of the "Intel StrongARM SA-1111 Development Module | |
778 | * User's Guide" mentions that jumpers R51 and R52 control the | |
779 | * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or | |
780 | * SDRAM bank 1 on Neponset). The default configuration selects | |
781 | * Assabet, so any address in bank 1 is necessarily invalid. | |
782 | */ | |
783 | return ((machine_is_assabet() || machine_is_pfs168()) && | |
784 | (addr >= 0xc8000000 || (addr + size) >= 0xc8000000)); | |
785 | } | |
786 | ||
787 | struct sa1111_save_data { | |
788 | unsigned int skcr; | |
789 | unsigned int skpcr; | |
790 | unsigned int skcdr; | |
791 | unsigned char skaud; | |
792 | unsigned char skpwm0; | |
793 | unsigned char skpwm1; | |
794 | ||
795 | /* | |
796 | * Interrupt controller | |
797 | */ | |
798 | unsigned int intpol0; | |
799 | unsigned int intpol1; | |
800 | unsigned int inten0; | |
801 | unsigned int inten1; | |
802 | unsigned int wakepol0; | |
803 | unsigned int wakepol1; | |
804 | unsigned int wakeen0; | |
805 | unsigned int wakeen1; | |
806 | }; | |
807 | ||
808 | #ifdef CONFIG_PM | |
809 | ||
3ae5eaec | 810 | static int sa1111_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 811 | { |
3ae5eaec | 812 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
813 | struct sa1111_save_data *save; |
814 | unsigned long flags; | |
815 | unsigned int val; | |
816 | void __iomem *base; | |
817 | ||
1da177e4 LT |
818 | save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); |
819 | if (!save) | |
820 | return -ENOMEM; | |
3ae5eaec | 821 | dev->dev.power.saved_state = save; |
1da177e4 LT |
822 | |
823 | spin_lock_irqsave(&sachip->lock, flags); | |
824 | ||
825 | /* | |
826 | * Save state. | |
827 | */ | |
828 | base = sachip->base; | |
829 | save->skcr = sa1111_readl(base + SA1111_SKCR); | |
830 | save->skpcr = sa1111_readl(base + SA1111_SKPCR); | |
831 | save->skcdr = sa1111_readl(base + SA1111_SKCDR); | |
832 | save->skaud = sa1111_readl(base + SA1111_SKAUD); | |
833 | save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); | |
834 | save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); | |
835 | ||
836 | base = sachip->base + SA1111_INTC; | |
837 | save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); | |
838 | save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); | |
839 | save->inten0 = sa1111_readl(base + SA1111_INTEN0); | |
840 | save->inten1 = sa1111_readl(base + SA1111_INTEN1); | |
841 | save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); | |
842 | save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); | |
843 | save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); | |
844 | save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); | |
845 | ||
846 | /* | |
847 | * Disable. | |
848 | */ | |
849 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
850 | sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); | |
851 | sa1111_writel(0, sachip->base + SA1111_SKPWM0); | |
852 | sa1111_writel(0, sachip->base + SA1111_SKPWM1); | |
853 | ||
97d654f8 RK |
854 | clk_disable(sachip->clk); |
855 | ||
1da177e4 LT |
856 | spin_unlock_irqrestore(&sachip->lock, flags); |
857 | ||
858 | return 0; | |
859 | } | |
860 | ||
861 | /* | |
862 | * sa1111_resume - Restore the SA1111 device state. | |
863 | * @dev: device to restore | |
1da177e4 LT |
864 | * |
865 | * Restore the general state of the SA1111; clock control and | |
866 | * interrupt controller. Other parts of the SA1111 must be | |
867 | * restored by their respective drivers, and must be called | |
868 | * via LDM after this function. | |
869 | */ | |
3ae5eaec | 870 | static int sa1111_resume(struct platform_device *dev) |
1da177e4 | 871 | { |
3ae5eaec | 872 | struct sa1111 *sachip = platform_get_drvdata(dev); |
1da177e4 LT |
873 | struct sa1111_save_data *save; |
874 | unsigned long flags, id; | |
875 | void __iomem *base; | |
876 | ||
3ae5eaec | 877 | save = (struct sa1111_save_data *)dev->dev.power.saved_state; |
1da177e4 LT |
878 | if (!save) |
879 | return 0; | |
880 | ||
881 | spin_lock_irqsave(&sachip->lock, flags); | |
882 | ||
883 | /* | |
884 | * Ensure that the SA1111 is still here. | |
885 | * FIXME: shouldn't do this here. | |
886 | */ | |
887 | id = sa1111_readl(sachip->base + SA1111_SKID); | |
888 | if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { | |
889 | __sa1111_remove(sachip); | |
3ae5eaec | 890 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
891 | kfree(save); |
892 | return 0; | |
893 | } | |
894 | ||
895 | /* | |
896 | * First of all, wake up the chip. | |
897 | */ | |
898 | sa1111_wake(sachip); | |
899 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); | |
900 | sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); | |
901 | ||
902 | base = sachip->base; | |
903 | sa1111_writel(save->skcr, base + SA1111_SKCR); | |
904 | sa1111_writel(save->skpcr, base + SA1111_SKPCR); | |
905 | sa1111_writel(save->skcdr, base + SA1111_SKCDR); | |
906 | sa1111_writel(save->skaud, base + SA1111_SKAUD); | |
907 | sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); | |
908 | sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); | |
909 | ||
910 | base = sachip->base + SA1111_INTC; | |
911 | sa1111_writel(save->intpol0, base + SA1111_INTPOL0); | |
912 | sa1111_writel(save->intpol1, base + SA1111_INTPOL1); | |
913 | sa1111_writel(save->inten0, base + SA1111_INTEN0); | |
914 | sa1111_writel(save->inten1, base + SA1111_INTEN1); | |
915 | sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); | |
916 | sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); | |
917 | sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); | |
918 | sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); | |
919 | ||
920 | spin_unlock_irqrestore(&sachip->lock, flags); | |
921 | ||
3ae5eaec | 922 | dev->dev.power.saved_state = NULL; |
1da177e4 LT |
923 | kfree(save); |
924 | ||
925 | return 0; | |
926 | } | |
927 | ||
928 | #else | |
929 | #define sa1111_suspend NULL | |
930 | #define sa1111_resume NULL | |
931 | #endif | |
932 | ||
3ae5eaec | 933 | static int sa1111_probe(struct platform_device *pdev) |
1da177e4 | 934 | { |
1da177e4 LT |
935 | struct resource *mem; |
936 | int irq; | |
937 | ||
938 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
939 | if (!mem) | |
940 | return -EINVAL; | |
941 | irq = platform_get_irq(pdev, 0); | |
48944738 DV |
942 | if (irq < 0) |
943 | return -ENXIO; | |
1da177e4 | 944 | |
3ae5eaec | 945 | return __sa1111_probe(&pdev->dev, mem, irq); |
1da177e4 LT |
946 | } |
947 | ||
3ae5eaec | 948 | static int sa1111_remove(struct platform_device *pdev) |
1da177e4 | 949 | { |
3ae5eaec | 950 | struct sa1111 *sachip = platform_get_drvdata(pdev); |
1da177e4 LT |
951 | |
952 | if (sachip) { | |
953 | __sa1111_remove(sachip); | |
3ae5eaec | 954 | platform_set_drvdata(pdev, NULL); |
1da177e4 LT |
955 | |
956 | #ifdef CONFIG_PM | |
3ae5eaec RK |
957 | kfree(pdev->dev.power.saved_state); |
958 | pdev->dev.power.saved_state = NULL; | |
1da177e4 LT |
959 | #endif |
960 | } | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
965 | /* | |
966 | * Not sure if this should be on the system bus or not yet. | |
967 | * We really want some way to register a system device at | |
968 | * the per-machine level, and then have this driver pick | |
969 | * up the registered devices. | |
970 | * | |
971 | * We also need to handle the SDRAM configuration for | |
972 | * PXA250/SA1110 machine classes. | |
973 | */ | |
3ae5eaec | 974 | static struct platform_driver sa1111_device_driver = { |
1da177e4 LT |
975 | .probe = sa1111_probe, |
976 | .remove = sa1111_remove, | |
977 | .suspend = sa1111_suspend, | |
978 | .resume = sa1111_resume, | |
3ae5eaec RK |
979 | .driver = { |
980 | .name = "sa1111", | |
981 | }, | |
1da177e4 LT |
982 | }; |
983 | ||
984 | /* | |
985 | * Get the parent device driver (us) structure | |
986 | * from a child function device | |
987 | */ | |
988 | static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) | |
989 | { | |
990 | return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); | |
991 | } | |
992 | ||
993 | /* | |
994 | * The bits in the opdiv field are non-linear. | |
995 | */ | |
996 | static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; | |
997 | ||
998 | static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) | |
999 | { | |
1000 | unsigned int skcdr, fbdiv, ipdiv, opdiv; | |
1001 | ||
1002 | skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); | |
1003 | ||
1004 | fbdiv = (skcdr & 0x007f) + 2; | |
1005 | ipdiv = ((skcdr & 0x0f80) >> 7) + 2; | |
1006 | opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; | |
1007 | ||
1008 | return 3686400 * fbdiv / (ipdiv * opdiv); | |
1009 | } | |
1010 | ||
1011 | /** | |
1012 | * sa1111_pll_clock - return the current PLL clock frequency. | |
1013 | * @sadev: SA1111 function block | |
1014 | * | |
1015 | * BUG: we should look at SKCR. We also blindly believe that | |
1016 | * the chip is being fed with the 3.6864MHz clock. | |
1017 | * | |
1018 | * Returns the PLL clock in Hz. | |
1019 | */ | |
1020 | unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) | |
1021 | { | |
1022 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1023 | ||
1024 | return __sa1111_pll_clock(sachip); | |
1025 | } | |
1026 | ||
1027 | /** | |
1028 | * sa1111_select_audio_mode - select I2S or AC link mode | |
1029 | * @sadev: SA1111 function block | |
1030 | * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S | |
1031 | * | |
1032 | * Frob the SKCR to select AC Link mode or I2S mode for | |
1033 | * the audio block. | |
1034 | */ | |
1035 | void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) | |
1036 | { | |
1037 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1038 | unsigned long flags; | |
1039 | unsigned int val; | |
1040 | ||
1041 | spin_lock_irqsave(&sachip->lock, flags); | |
1042 | ||
1043 | val = sa1111_readl(sachip->base + SA1111_SKCR); | |
1044 | if (mode == SA1111_AUDIO_I2S) { | |
1045 | val &= ~SKCR_SELAC; | |
1046 | } else { | |
1047 | val |= SKCR_SELAC; | |
1048 | } | |
1049 | sa1111_writel(val, sachip->base + SA1111_SKCR); | |
1050 | ||
1051 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1052 | } | |
1053 | ||
1054 | /** | |
1055 | * sa1111_set_audio_rate - set the audio sample rate | |
1056 | * @sadev: SA1111 SAC function block | |
1057 | * @rate: sample rate to select | |
1058 | */ | |
1059 | int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) | |
1060 | { | |
1061 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1062 | unsigned int div; | |
1063 | ||
1064 | if (sadev->devid != SA1111_DEVID_SAC) | |
1065 | return -EINVAL; | |
1066 | ||
1067 | div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; | |
1068 | if (div == 0) | |
1069 | div = 1; | |
1070 | if (div > 128) | |
1071 | div = 128; | |
1072 | ||
1073 | sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); | |
1074 | ||
1075 | return 0; | |
1076 | } | |
1077 | ||
1078 | /** | |
1079 | * sa1111_get_audio_rate - get the audio sample rate | |
1080 | * @sadev: SA1111 SAC function block device | |
1081 | */ | |
1082 | int sa1111_get_audio_rate(struct sa1111_dev *sadev) | |
1083 | { | |
1084 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1085 | unsigned long div; | |
1086 | ||
1087 | if (sadev->devid != SA1111_DEVID_SAC) | |
1088 | return -EINVAL; | |
1089 | ||
1090 | div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; | |
1091 | ||
1092 | return __sa1111_pll_clock(sachip) / (256 * div); | |
1093 | } | |
1094 | ||
1095 | void sa1111_set_io_dir(struct sa1111_dev *sadev, | |
1096 | unsigned int bits, unsigned int dir, | |
1097 | unsigned int sleep_dir) | |
1098 | { | |
1099 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1100 | unsigned long flags; | |
1101 | unsigned int val; | |
1102 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1103 | ||
1104 | #define MODIFY_BITS(port, mask, dir) \ | |
1105 | if (mask) { \ | |
1106 | val = sa1111_readl(port); \ | |
1107 | val &= ~(mask); \ | |
1108 | val |= (dir) & (mask); \ | |
1109 | sa1111_writel(val, port); \ | |
1110 | } | |
1111 | ||
1112 | spin_lock_irqsave(&sachip->lock, flags); | |
1113 | MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); | |
1114 | MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); | |
1115 | MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); | |
1116 | ||
1117 | MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); | |
1118 | MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); | |
1119 | MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); | |
1120 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1121 | } | |
1122 | ||
1123 | void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1124 | { | |
1125 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1126 | unsigned long flags; | |
1127 | unsigned int val; | |
1128 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1129 | ||
1130 | spin_lock_irqsave(&sachip->lock, flags); | |
1131 | MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); | |
1132 | MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); | |
1133 | MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); | |
1134 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1135 | } | |
1136 | ||
1137 | void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) | |
1138 | { | |
1139 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1140 | unsigned long flags; | |
1141 | unsigned int val; | |
1142 | void __iomem *gpio = sachip->base + SA1111_GPIO; | |
1143 | ||
1144 | spin_lock_irqsave(&sachip->lock, flags); | |
1145 | MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); | |
1146 | MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); | |
1147 | MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); | |
1148 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1149 | } | |
1150 | ||
1151 | /* | |
1152 | * Individual device operations. | |
1153 | */ | |
1154 | ||
1155 | /** | |
1156 | * sa1111_enable_device - enable an on-chip SA1111 function block | |
1157 | * @sadev: SA1111 function block device to enable | |
1158 | */ | |
1159 | void sa1111_enable_device(struct sa1111_dev *sadev) | |
1160 | { | |
1161 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1162 | unsigned long flags; | |
1163 | unsigned int val; | |
1164 | ||
1165 | spin_lock_irqsave(&sachip->lock, flags); | |
1166 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1167 | sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1168 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1169 | } | |
1170 | ||
1171 | /** | |
1172 | * sa1111_disable_device - disable an on-chip SA1111 function block | |
1173 | * @sadev: SA1111 function block device to disable | |
1174 | */ | |
1175 | void sa1111_disable_device(struct sa1111_dev *sadev) | |
1176 | { | |
1177 | struct sa1111 *sachip = sa1111_chip_driver(sadev); | |
1178 | unsigned long flags; | |
1179 | unsigned int val; | |
1180 | ||
1181 | spin_lock_irqsave(&sachip->lock, flags); | |
1182 | val = sa1111_readl(sachip->base + SA1111_SKPCR); | |
1183 | sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); | |
1184 | spin_unlock_irqrestore(&sachip->lock, flags); | |
1185 | } | |
1186 | ||
1187 | /* | |
1188 | * SA1111 "Register Access Bus." | |
1189 | * | |
1190 | * We model this as a regular bus type, and hang devices directly | |
1191 | * off this. | |
1192 | */ | |
1193 | static int sa1111_match(struct device *_dev, struct device_driver *_drv) | |
1194 | { | |
1195 | struct sa1111_dev *dev = SA1111_DEV(_dev); | |
1196 | struct sa1111_driver *drv = SA1111_DRV(_drv); | |
1197 | ||
1198 | return dev->devid == drv->devid; | |
1199 | } | |
1200 | ||
1201 | static int sa1111_bus_suspend(struct device *dev, pm_message_t state) | |
1202 | { | |
1203 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1204 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1205 | int ret = 0; | |
1206 | ||
1207 | if (drv && drv->suspend) | |
1208 | ret = drv->suspend(sadev, state); | |
1209 | return ret; | |
1210 | } | |
1211 | ||
1212 | static int sa1111_bus_resume(struct device *dev) | |
1213 | { | |
1214 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1215 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1216 | int ret = 0; | |
1217 | ||
1218 | if (drv && drv->resume) | |
1219 | ret = drv->resume(sadev); | |
1220 | return ret; | |
1221 | } | |
1222 | ||
1223 | static int sa1111_bus_probe(struct device *dev) | |
1224 | { | |
1225 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1226 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1227 | int ret = -ENODEV; | |
1228 | ||
1229 | if (drv->probe) | |
1230 | ret = drv->probe(sadev); | |
1231 | return ret; | |
1232 | } | |
1233 | ||
1234 | static int sa1111_bus_remove(struct device *dev) | |
1235 | { | |
1236 | struct sa1111_dev *sadev = SA1111_DEV(dev); | |
1237 | struct sa1111_driver *drv = SA1111_DRV(dev->driver); | |
1238 | int ret = 0; | |
1239 | ||
1240 | if (drv->remove) | |
1241 | ret = drv->remove(sadev); | |
1242 | return ret; | |
1243 | } | |
1244 | ||
1245 | struct bus_type sa1111_bus_type = { | |
1246 | .name = "sa1111-rab", | |
1247 | .match = sa1111_match, | |
2876ba43 RK |
1248 | .probe = sa1111_bus_probe, |
1249 | .remove = sa1111_bus_remove, | |
1da177e4 LT |
1250 | .suspend = sa1111_bus_suspend, |
1251 | .resume = sa1111_bus_resume, | |
1252 | }; | |
1253 | ||
1254 | int sa1111_driver_register(struct sa1111_driver *driver) | |
1255 | { | |
1da177e4 LT |
1256 | driver->drv.bus = &sa1111_bus_type; |
1257 | return driver_register(&driver->drv); | |
1258 | } | |
1259 | ||
1260 | void sa1111_driver_unregister(struct sa1111_driver *driver) | |
1261 | { | |
1262 | driver_unregister(&driver->drv); | |
1263 | } | |
1264 | ||
1265 | static int __init sa1111_init(void) | |
1266 | { | |
1267 | int ret = bus_register(&sa1111_bus_type); | |
1268 | if (ret == 0) | |
3ae5eaec | 1269 | platform_driver_register(&sa1111_device_driver); |
1da177e4 LT |
1270 | return ret; |
1271 | } | |
1272 | ||
1273 | static void __exit sa1111_exit(void) | |
1274 | { | |
3ae5eaec | 1275 | platform_driver_unregister(&sa1111_device_driver); |
1da177e4 LT |
1276 | bus_unregister(&sa1111_bus_type); |
1277 | } | |
1278 | ||
72724382 | 1279 | subsys_initcall(sa1111_init); |
1da177e4 LT |
1280 | module_exit(sa1111_exit); |
1281 | ||
1282 | MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); | |
1283 | MODULE_LICENSE("GPL"); | |
1284 | ||
1285 | EXPORT_SYMBOL(sa1111_select_audio_mode); | |
1286 | EXPORT_SYMBOL(sa1111_set_audio_rate); | |
1287 | EXPORT_SYMBOL(sa1111_get_audio_rate); | |
1288 | EXPORT_SYMBOL(sa1111_set_io_dir); | |
1289 | EXPORT_SYMBOL(sa1111_set_io); | |
1290 | EXPORT_SYMBOL(sa1111_set_sleep_io); | |
1291 | EXPORT_SYMBOL(sa1111_enable_device); | |
1292 | EXPORT_SYMBOL(sa1111_disable_device); | |
1293 | EXPORT_SYMBOL(sa1111_pll_clock); | |
1294 | EXPORT_SYMBOL(sa1111_bus_type); | |
1295 | EXPORT_SYMBOL(sa1111_driver_register); | |
1296 | EXPORT_SYMBOL(sa1111_driver_unregister); |