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[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / common / sa1111.c
CommitLineData
1da177e4 1/*
f30c2269 2 * linux/arch/arm/common/sa1111.c
1da177e4
LT		 3 *
4 * SA1111 support
5 *
6 * Original code by John Dorsey
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This file contains all generic SA1111 support.
13 *
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
16 */
1da177e4
LT		 17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
1da177e4
LT		 21#include <linux/errno.h>
22#include <linux/ioport.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4
LT		 24#include <linux/slab.h>
25#include <linux/spinlock.h>
26#include <linux/dma-mapping.h>
97d654f8 27#include <linux/clk.h>
1da177e4 28
a09e64fb 29#include <mach/hardware.h>
1da177e4
LT		 30#include <asm/mach-types.h>
31#include <asm/io.h>
32#include <asm/irq.h>
33#include <asm/mach/irq.h>
45e109d0 34#include <asm/sizes.h>
1da177e4
LT		 35
36#include <asm/hardware/sa1111.h>
37
1da177e4
LT		 38extern void __init sa1110_mb_enable(void);
39
40/*
41 * We keep the following data for the overall SA1111. Note that the
42 * struct device and struct resource are "fake"; they should be supplied
43 * by the bus above us. However, in the interests of getting all SA1111
44 * drivers converted over to the device model, we provide this as an
45 * anchor point for all the other drivers.
46 */
47struct sa1111 {
48 struct device *dev;
97d654f8 49 struct clk *clk;
1da177e4
LT		 50 unsigned long phys;
51 int irq;
52 spinlock_t lock;
53 void __iomem *base;
93160c63
RW		 54#ifdef CONFIG_PM
55 void *saved_state;
56#endif
1da177e4
LT		 57};
58
59/*
60 * We _really_ need to eliminate this. Its only users
61 * are the PWM and DMA checking code.
62 */
63static struct sa1111 *g_sa1111;
64
65struct sa1111_dev_info {
66 unsigned long offset;
67 unsigned long skpcr_mask;
68 unsigned int devid;
69 unsigned int irq[6];
70};
71
72static struct sa1111_dev_info sa1111_devices[] = {
73 {
74 .offset = SA1111_USB,
75 .skpcr_mask = SKPCR_UCLKEN,
76 .devid = SA1111_DEVID_USB,
77 .irq = {
78 IRQ_USBPWR,
79 IRQ_HCIM,
80 IRQ_HCIBUFFACC,
81 IRQ_HCIRMTWKP,
82 IRQ_NHCIMFCIR,
83 IRQ_USB_PORT_RESUME
84 },
85 },
86 {
87 .offset = 0x0600,
88 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
89 .devid = SA1111_DEVID_SAC,
90 .irq = {
91 AUDXMTDMADONEA,
92 AUDXMTDMADONEB,
93 AUDRCVDMADONEA,
94 AUDRCVDMADONEB
95 },
96 },
97 {
98 .offset = 0x0800,
99 .skpcr_mask = SKPCR_SCLKEN,
100 .devid = SA1111_DEVID_SSP,
101 },
102 {
103 .offset = SA1111_KBD,
104 .skpcr_mask = SKPCR_PTCLKEN,
105 .devid = SA1111_DEVID_PS2,
106 .irq = {
107 IRQ_TPRXINT,
108 IRQ_TPTXINT
109 },
110 },
111 {
112 .offset = SA1111_MSE,
113 .skpcr_mask = SKPCR_PMCLKEN,
114 .devid = SA1111_DEVID_PS2,
115 .irq = {
116 IRQ_MSRXINT,
117 IRQ_MSTXINT
118 },
119 },
120 {
121 .offset = 0x1800,
122 .skpcr_mask = 0,
123 .devid = SA1111_DEVID_PCMCIA,
124 .irq = {
125 IRQ_S0_READY_NINT,
126 IRQ_S0_CD_VALID,
127 IRQ_S0_BVD1_STSCHG,
128 IRQ_S1_READY_NINT,
129 IRQ_S1_CD_VALID,
130 IRQ_S1_BVD1_STSCHG,
131 },
132 },
133};
134
1b12050f
RK		 135void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
136{
137 unsigned int sz = SZ_1M >> PAGE_SHIFT;
138
139 if (node != 0)
140 sz = 0;
141
142 size[1] = size[0] - sz;
143 size[0] = sz;
144}
145
1da177e4
LT		 146/*
147 * SA1111 interrupt support. Since clearing an IRQ while there are
148 * active IRQs causes the interrupt output to pulse, the upper levels
149 * will call us again if there are more interrupts to process.
150 */
151static void
10dd5ce2 152sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4
LT		 153{
154 unsigned int stat0, stat1, i;
c4bfa28a 155 void __iomem *base = get_irq_data(irq);
1da177e4
LT		 156
157 stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
158 stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
159
160 sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
161
162 desc->chip->ack(irq);
163
164 sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
165
166 if (stat0 == 0 && stat1 == 0) {
0cd61b68 167 do_bad_IRQ(irq, desc);
1da177e4
LT		 168 return;
169 }
170
171 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
172 if (stat0 & 1)
0cd61b68 173 handle_edge_irq(i, irq_desc + i);
1da177e4
LT		 174
175 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
176 if (stat1 & 1)
0cd61b68 177 handle_edge_irq(i, irq_desc + i);
1da177e4
LT		 178
179 /* For level-based interrupts */
180 desc->chip->unmask(irq);
181}
182
183#define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
184#define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
185
186static void sa1111_ack_irq(unsigned int irq)
187{
188}
189
190static void sa1111_mask_lowirq(unsigned int irq)
191{
10dd5ce2 192 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 193 unsigned long ie0;
194
195 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
196 ie0 &= ~SA1111_IRQMASK_LO(irq);
197 writel(ie0, mapbase + SA1111_INTEN0);
198}
199
200static void sa1111_unmask_lowirq(unsigned int irq)
201{
10dd5ce2 202 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 203 unsigned long ie0;
204
205 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
206 ie0 |= SA1111_IRQMASK_LO(irq);
207 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
208}
209
210/*
211 * Attempt to re-trigger the interrupt. The SA1111 contains a register
212 * (INTSET) which claims to do this. However, in practice no amount of
213 * manipulation of INTEN and INTSET guarantees that the interrupt will
214 * be triggered. In fact, its very difficult, if not impossible to get
215 * INTSET to re-trigger the interrupt.
216 */
217static int sa1111_retrigger_lowirq(unsigned int irq)
218{
219 unsigned int mask = SA1111_IRQMASK_LO(irq);
10dd5ce2 220 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 221 unsigned long ip0;
222 int i;
223
224 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
225 for (i = 0; i < 8; i++) {
226 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
227 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
228 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
229 break;
230 }
231
232 if (i == 8)
233 printk(KERN_ERR "Danger Will Robinson: failed to "
234 "re-trigger IRQ%d\n", irq);
235 return i == 8 ? -1 : 0;
236}
237
238static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
239{
240 unsigned int mask = SA1111_IRQMASK_LO(irq);
10dd5ce2 241 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 242 unsigned long ip0;
243
6cab4860 244 if (flags == IRQ_TYPE_PROBE)
1da177e4
LT		 245 return 0;
246
6cab4860 247 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
1da177e4
LT		 248 return -EINVAL;
249
250 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
6cab4860 251 if (flags & IRQ_TYPE_EDGE_RISING)
1da177e4
LT		 252 ip0 &= ~mask;
253 else
254 ip0 |= mask;
255 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
256 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
257
258 return 0;
259}
260
261static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
262{
263 unsigned int mask = SA1111_IRQMASK_LO(irq);
10dd5ce2 264 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 265 unsigned long we0;
266
267 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
268 if (on)
269 we0 |= mask;
270 else
271 we0 &= ~mask;
272 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
273
274 return 0;
275}
276
38c677cb
DB		 277static struct irq_chip sa1111_low_chip = {
278 .name = "SA1111-l",
1da177e4
LT		 279 .ack = sa1111_ack_irq,
280 .mask = sa1111_mask_lowirq,
281 .unmask = sa1111_unmask_lowirq,
282 .retrigger = sa1111_retrigger_lowirq,
7801907b
RK		 283 .set_type = sa1111_type_lowirq,
284 .set_wake = sa1111_wake_lowirq,
1da177e4
LT		 285};
286
287static void sa1111_mask_highirq(unsigned int irq)
288{
10dd5ce2 289 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 290 unsigned long ie1;
291
292 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
293 ie1 &= ~SA1111_IRQMASK_HI(irq);
294 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
295}
296
297static void sa1111_unmask_highirq(unsigned int irq)
298{
10dd5ce2 299 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 300 unsigned long ie1;
301
302 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
303 ie1 |= SA1111_IRQMASK_HI(irq);
304 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
305}
306
307/*
308 * Attempt to re-trigger the interrupt. The SA1111 contains a register
309 * (INTSET) which claims to do this. However, in practice no amount of
310 * manipulation of INTEN and INTSET guarantees that the interrupt will
311 * be triggered. In fact, its very difficult, if not impossible to get
312 * INTSET to re-trigger the interrupt.
313 */
314static int sa1111_retrigger_highirq(unsigned int irq)
315{
316 unsigned int mask = SA1111_IRQMASK_HI(irq);
10dd5ce2 317 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 318 unsigned long ip1;
319 int i;
320
321 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
322 for (i = 0; i < 8; i++) {
323 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
324 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
325 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
326 break;
327 }
328
329 if (i == 8)
330 printk(KERN_ERR "Danger Will Robinson: failed to "
331 "re-trigger IRQ%d\n", irq);
332 return i == 8 ? -1 : 0;
333}
334
335static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
336{
337 unsigned int mask = SA1111_IRQMASK_HI(irq);
10dd5ce2 338 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 339 unsigned long ip1;
340
6cab4860 341 if (flags == IRQ_TYPE_PROBE)
1da177e4
LT		 342 return 0;
343
6cab4860 344 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
1da177e4
LT		 345 return -EINVAL;
346
347 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
6cab4860 348 if (flags & IRQ_TYPE_EDGE_RISING)
1da177e4
LT		 349 ip1 &= ~mask;
350 else
351 ip1 |= mask;
352 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
353 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
354
355 return 0;
356}
357
358static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
359{
360 unsigned int mask = SA1111_IRQMASK_HI(irq);
10dd5ce2 361 void __iomem *mapbase = get_irq_chip_data(irq);
1da177e4
LT		 362 unsigned long we1;
363
364 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
365 if (on)
366 we1 |= mask;
367 else
368 we1 &= ~mask;
369 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
370
371 return 0;
372}
373
38c677cb
DB		 374static struct irq_chip sa1111_high_chip = {
375 .name = "SA1111-h",
1da177e4
LT		 376 .ack = sa1111_ack_irq,
377 .mask = sa1111_mask_highirq,
378 .unmask = sa1111_unmask_highirq,
379 .retrigger = sa1111_retrigger_highirq,
7801907b
RK		 380 .set_type = sa1111_type_highirq,
381 .set_wake = sa1111_wake_highirq,
1da177e4
LT		 382};
383
384static void sa1111_setup_irq(struct sa1111 *sachip)
385{
386 void __iomem *irqbase = sachip->base + SA1111_INTC;
387 unsigned int irq;
388
389 /*
390 * We're guaranteed that this region hasn't been taken.
391 */
392 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
393
394 /* disable all IRQs */
395 sa1111_writel(0, irqbase + SA1111_INTEN0);
396 sa1111_writel(0, irqbase + SA1111_INTEN1);
397 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
398 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
399
400 /*
401 * detect on rising edge. Note: Feb 2001 Errata for SA1111
402 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
403 */
404 sa1111_writel(0, irqbase + SA1111_INTPOL0);
405 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
406 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
407 irqbase + SA1111_INTPOL1);
408
409 /* clear all IRQs */
410 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
411 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
412
413 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
414 set_irq_chip(irq, &sa1111_low_chip);
10dd5ce2
RK		 415 set_irq_chip_data(irq, irqbase);
416 set_irq_handler(irq, handle_edge_irq);
1da177e4
LT		 417 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
418 }
419
420 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
421 set_irq_chip(irq, &sa1111_high_chip);
10dd5ce2
RK		 422 set_irq_chip_data(irq, irqbase);
423 set_irq_handler(irq, handle_edge_irq);
1da177e4
LT		 424 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
425 }
426
427 /*
428 * Register SA1111 interrupt
429 */
6cab4860 430 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
1da177e4
LT		 431 set_irq_data(sachip->irq, irqbase);
432 set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
433}
434
435/*
436 * Bring the SA1111 out of reset. This requires a set procedure:
437 * 1. nRESET asserted (by hardware)
438 * 2. CLK turned on from SA1110
439 * 3. nRESET deasserted
440 * 4. VCO turned on, PLL_BYPASS turned off
441 * 5. Wait lock time, then assert RCLKEn
442 * 7. PCR set to allow clocking of individual functions
443 *
444 * Until we've done this, the only registers we can access are:
445 * SBI_SKCR
446 * SBI_SMCR
447 * SBI_SKID
448 */
449static void sa1111_wake(struct sa1111 *sachip)
450{
451 unsigned long flags, r;
452
453 spin_lock_irqsave(&sachip->lock, flags);
454
97d654f8 455 clk_enable(sachip->clk);
1da177e4
LT		 456
457 /*
458 * Turn VCO on, and disable PLL Bypass.
459 */
460 r = sa1111_readl(sachip->base + SA1111_SKCR);
461 r &= ~SKCR_VCO_OFF;
462 sa1111_writel(r, sachip->base + SA1111_SKCR);
463 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
464 sa1111_writel(r, sachip->base + SA1111_SKCR);
465
466 /*
467 * Wait lock time. SA1111 manual _doesn't_
468 * specify a figure for this! We choose 100us.
469 */
470 udelay(100);
471
472 /*
473 * Enable RCLK. We also ensure that RDYEN is set.
474 */
475 r |= SKCR_RCLKEN | SKCR_RDYEN;
476 sa1111_writel(r, sachip->base + SA1111_SKCR);
477
478 /*
479 * Wait 14 RCLK cycles for the chip to finish coming out
480 * of reset. (RCLK=24MHz). This is 590ns.
481 */
482 udelay(1);
483
484 /*
485 * Ensure all clocks are initially off.
486 */
487 sa1111_writel(0, sachip->base + SA1111_SKPCR);
488
489 spin_unlock_irqrestore(&sachip->lock, flags);
490}
491
492#ifdef CONFIG_ARCH_SA1100
493
494static u32 sa1111_dma_mask[] = {
495 ~0,
496 ~(1 << 20),
497 ~(1 << 23),
498 ~(1 << 24),
499 ~(1 << 25),
500 ~(1 << 20),
501 ~(1 << 20),
502 0,
503};
504
505/*
506 * Configure the SA1111 shared memory controller.
507 */
508void
509sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
510 unsigned int cas_latency)
511{
512 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
513
514 if (cas_latency == 3)
515 smcr |= SMCR_CLAT;
516
517 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
518
519 /*
520 * Now clear the bits in the DMA mask to work around the SA1111
521 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
522 * Chip Specification Update, June 2000, Erratum #7).
523 */
524 if (sachip->dev->dma_mask)
525 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
526
527 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
528}
529
530#endif
531
532static void sa1111_dev_release(struct device *_dev)
533{
534 struct sa1111_dev *dev = SA1111_DEV(_dev);
535
536 release_resource(&dev->res);
537 kfree(dev);
538}
539
540static int
541sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
542 struct sa1111_dev_info *info)
543{
544 struct sa1111_dev *dev;
545 int ret;
546
d2a02b93 547 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
1da177e4
LT		 548 if (!dev) {
549 ret = -ENOMEM;
550 goto out;
551 }
1da177e4 552
3f978704 553 dev_set_name(&dev->dev, "%4.4lx", info->offset);
1da177e4
LT		 554 dev->devid = info->devid;
555 dev->dev.parent = sachip->dev;
556 dev->dev.bus = &sa1111_bus_type;
557 dev->dev.release = sa1111_dev_release;
558 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
559 dev->res.start = sachip->phys + info->offset;
560 dev->res.end = dev->res.start + 511;
3f978704 561 dev->res.name = dev_name(&dev->dev);
1da177e4
LT		 562 dev->res.flags = IORESOURCE_MEM;
563 dev->mapbase = sachip->base + info->offset;
564 dev->skpcr_mask = info->skpcr_mask;
565 memmove(dev->irq, info->irq, sizeof(dev->irq));
566
567 ret = request_resource(parent, &dev->res);
568 if (ret) {
569 printk("SA1111: failed to allocate resource for %s\n",
570 dev->res.name);
3f978704 571 dev_set_name(&dev->dev, NULL);
1da177e4
LT		 572 kfree(dev);
573 goto out;
574 }
575
576
577 ret = device_register(&dev->dev);
578 if (ret) {
579 release_resource(&dev->res);
580 kfree(dev);
581 goto out;
582 }
583
584 /*
585 * If the parent device has a DMA mask associated with it,
586 * propagate it down to the children.
587 */
588 if (sachip->dev->dma_mask) {
589 dev->dma_mask = *sachip->dev->dma_mask;
590 dev->dev.dma_mask = &dev->dma_mask;
591
592 if (dev->dma_mask != 0xffffffffUL) {
593 ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
594 if (ret) {
fc3a8828
GKH		 595 dev_err(&dev->dev, "SA1111: Failed to register"
596 " with dmabounce\n");
1da177e4
LT		 597 device_unregister(&dev->dev);
598 }
599 }
600 }
601
602out:
603 return ret;
604}
605
606/**
607 * sa1111_probe - probe for a single SA1111 chip.
608 * @phys_addr: physical address of device.
609 *
610 * Probe for a SA1111 chip. This must be called
611 * before any other SA1111-specific code.
612 *
613 * Returns:
614 * %-ENODEV device not found.
615 * %-EBUSY physical address already marked in-use.
616 * %0 successful.
617 */
618static int
619__sa1111_probe(struct device *me, struct resource *mem, int irq)
620{
621 struct sa1111 *sachip;
622 unsigned long id;
416112f8 623 unsigned int has_devs;
1da177e4
LT		 624 int i, ret = -ENODEV;
625
d2a02b93 626 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
1da177e4
LT		 627 if (!sachip)
628 return -ENOMEM;
629
13f75582 630 sachip->clk = clk_get(me, "SA1111_CLK");
97d654f8
RK		 631 if (!sachip->clk) {
632 ret = PTR_ERR(sachip->clk);
633 goto err_free;
634 }
635
1da177e4
LT		 636 spin_lock_init(&sachip->lock);
637
638 sachip->dev = me;
639 dev_set_drvdata(sachip->dev, sachip);
640
641 sachip->phys = mem->start;
642 sachip->irq = irq;
643
644 /*
645 * Map the whole region. This also maps the
646 * registers for our children.
647 */
648 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
649 if (!sachip->base) {
650 ret = -ENOMEM;
97d654f8 651 goto err_clkput;
1da177e4
LT		 652 }
653
654 /*
655 * Probe for the chip. Only touch the SBI registers.
656 */
657 id = sa1111_readl(sachip->base + SA1111_SKID);
658 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
659 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
660 ret = -ENODEV;
97d654f8 661 goto err_unmap;
1da177e4
LT		 662 }
663
664 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
665 "silicon revision %lx, metal revision %lx\n",
666 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
667
668 /*
669 * We found it. Wake the chip up, and initialise.
670 */
671 sa1111_wake(sachip);
672
673#ifdef CONFIG_ARCH_SA1100
416112f8
DB		 674 {
675 unsigned int val;
676
1da177e4
LT		 677 /*
678 * The SDRAM configuration of the SA1110 and the SA1111 must
679 * match. This is very important to ensure that SA1111 accesses
680 * don't corrupt the SDRAM. Note that this ungates the SA1111's
681 * MBGNT signal, so we must have called sa1110_mb_disable()
682 * beforehand.
683 */
684 sa1111_configure_smc(sachip, 1,
685 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
686 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
687
688 /*
689 * We only need to turn on DCLK whenever we want to use the
690 * DMA. It can otherwise be held firmly in the off position.
691 * (currently, we always enable it.)
692 */
693 val = sa1111_readl(sachip->base + SA1111_SKPCR);
694 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
695
696 /*
697 * Enable the SA1110 memory bus request and grant signals.
698 */
699 sa1110_mb_enable();
416112f8 700 }
1da177e4
LT		 701#endif
702
703 /*
704 * The interrupt controller must be initialised before any
705 * other device to ensure that the interrupts are available.
706 */
707 if (sachip->irq != NO_IRQ)
708 sa1111_setup_irq(sachip);
709
710 g_sa1111 = sachip;
711
712 has_devs = ~0;
713 if (machine_is_assabet() || machine_is_jornada720() ||
714 machine_is_badge4())
715 has_devs &= ~(1 << 4);
716 else
717 has_devs &= ~(1 << 1);
718
719 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
720 if (has_devs & (1 << i))
721 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
722
723 return 0;
724
97d654f8 725 err_unmap:
1da177e4 726 iounmap(sachip->base);
97d654f8
RK		 727 err_clkput:
728 clk_put(sachip->clk);
729 err_free:
1da177e4
LT		 730 kfree(sachip);
731 return ret;
732}
733
522c37b9
RK		 734static int sa1111_remove_one(struct device *dev, void *data)
735{
736 device_unregister(dev);
737 return 0;
738}
739
1da177e4
LT		 740static void __sa1111_remove(struct sa1111 *sachip)
741{
1da177e4
LT		 742 void __iomem *irqbase = sachip->base + SA1111_INTC;
743
522c37b9 744 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
1da177e4
LT		 745
746 /* disable all IRQs */
747 sa1111_writel(0, irqbase + SA1111_INTEN0);
748 sa1111_writel(0, irqbase + SA1111_INTEN1);
749 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
750 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
751
97d654f8
RK		 752 clk_disable(sachip->clk);
753
1da177e4
LT		 754 if (sachip->irq != NO_IRQ) {
755 set_irq_chained_handler(sachip->irq, NULL);
756 set_irq_data(sachip->irq, NULL);
757
758 release_mem_region(sachip->phys + SA1111_INTC, 512);
759 }
760
761 iounmap(sachip->base);
97d654f8 762 clk_put(sachip->clk);
1da177e4
LT		 763 kfree(sachip);
764}
765
766/*
767 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
768 * Chip Specification Update" (June 2000), erratum #7, there is a
769 * significant bug in the SA1111 SDRAM shared memory controller. If
770 * an access to a region of memory above 1MB relative to the bank base,
771 * it is important that address bit 10 _NOT_ be asserted. Depending
772 * on the configuration of the RAM, bit 10 may correspond to one
773 * of several different (processor-relative) address bits.
774 *
775 * This routine only identifies whether or not a given DMA address
776 * is susceptible to the bug.
777 *
778 * This should only get called for sa1111_device types due to the
779 * way we configure our device dma_masks.
780 */
781int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
782{
783 /*
784 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
785 * User's Guide" mentions that jumpers R51 and R52 control the
786 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
787 * SDRAM bank 1 on Neponset). The default configuration selects
788 * Assabet, so any address in bank 1 is necessarily invalid.
789 */
790 return ((machine_is_assabet() || machine_is_pfs168()) &&
791 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
792}
793
794struct sa1111_save_data {
795 unsigned int skcr;
796 unsigned int skpcr;
797 unsigned int skcdr;
798 unsigned char skaud;
799 unsigned char skpwm0;
800 unsigned char skpwm1;
801
802 /*
803 * Interrupt controller
804 */
805 unsigned int intpol0;
806 unsigned int intpol1;
807 unsigned int inten0;
808 unsigned int inten1;
809 unsigned int wakepol0;
810 unsigned int wakepol1;
811 unsigned int wakeen0;
812 unsigned int wakeen1;
813};
814
815#ifdef CONFIG_PM
816
3ae5eaec 817static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 818{
3ae5eaec 819 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 820 struct sa1111_save_data *save;
821 unsigned long flags;
822 unsigned int val;
823 void __iomem *base;
824
1da177e4
LT		 825 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
826 if (!save)
827 return -ENOMEM;
93160c63 828 sachip->saved_state = save;
1da177e4
LT		 829
830 spin_lock_irqsave(&sachip->lock, flags);
831
832 /*
833 * Save state.
834 */
835 base = sachip->base;
836 save->skcr = sa1111_readl(base + SA1111_SKCR);
837 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
838 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
839 save->skaud = sa1111_readl(base + SA1111_SKAUD);
840 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
841 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
842
843 base = sachip->base + SA1111_INTC;
844 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
845 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
846 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
847 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
848 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
849 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
850 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
851 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
852
853 /*
854 * Disable.
855 */
856 val = sa1111_readl(sachip->base + SA1111_SKCR);
857 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
858 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
859 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
860
97d654f8
RK		 861 clk_disable(sachip->clk);
862
1da177e4
LT		 863 spin_unlock_irqrestore(&sachip->lock, flags);
864
865 return 0;
866}
867
868/*
869 * sa1111_resume - Restore the SA1111 device state.
870 * @dev: device to restore
1da177e4
LT		 871 *
872 * Restore the general state of the SA1111; clock control and
873 * interrupt controller. Other parts of the SA1111 must be
874 * restored by their respective drivers, and must be called
875 * via LDM after this function.
876 */
3ae5eaec 877static int sa1111_resume(struct platform_device *dev)
1da177e4 878{
3ae5eaec 879 struct sa1111 *sachip = platform_get_drvdata(dev);
1da177e4
LT		 880 struct sa1111_save_data *save;
881 unsigned long flags, id;
882 void __iomem *base;
883
93160c63 884 save = sachip->saved_state;
1da177e4
LT		 885 if (!save)
886 return 0;
887
888 spin_lock_irqsave(&sachip->lock, flags);
889
890 /*
891 * Ensure that the SA1111 is still here.
892 * FIXME: shouldn't do this here.
893 */
894 id = sa1111_readl(sachip->base + SA1111_SKID);
895 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
896 __sa1111_remove(sachip);
3ae5eaec 897 platform_set_drvdata(dev, NULL);
1da177e4
LT		 898 kfree(save);
899 return 0;
900 }
901
902 /*
903 * First of all, wake up the chip.
904 */
905 sa1111_wake(sachip);
906 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
907 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
908
909 base = sachip->base;
910 sa1111_writel(save->skcr, base + SA1111_SKCR);
911 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
912 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
913 sa1111_writel(save->skaud, base + SA1111_SKAUD);
914 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
915 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
916
917 base = sachip->base + SA1111_INTC;
918 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
919 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
920 sa1111_writel(save->inten0, base + SA1111_INTEN0);
921 sa1111_writel(save->inten1, base + SA1111_INTEN1);
922 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
923 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
924 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
925 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
926
927 spin_unlock_irqrestore(&sachip->lock, flags);
928
93160c63 929 sachip->saved_state = NULL;
1da177e4
LT		 930 kfree(save);
931
932 return 0;
933}
934
935#else
936#define sa1111_suspend NULL
937#define sa1111_resume NULL
938#endif
939
3ae5eaec 940static int sa1111_probe(struct platform_device *pdev)
1da177e4 941{
1da177e4
LT		 942 struct resource *mem;
943 int irq;
944
945 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
946 if (!mem)
947 return -EINVAL;
948 irq = platform_get_irq(pdev, 0);
48944738
DV		 949 if (irq < 0)
950 return -ENXIO;
1da177e4 951
3ae5eaec 952 return __sa1111_probe(&pdev->dev, mem, irq);
1da177e4
LT		 953}
954
3ae5eaec 955static int sa1111_remove(struct platform_device *pdev)
1da177e4 956{
3ae5eaec 957 struct sa1111 *sachip = platform_get_drvdata(pdev);
1da177e4
LT		 958
959 if (sachip) {
960 __sa1111_remove(sachip);
3ae5eaec 961 platform_set_drvdata(pdev, NULL);
1da177e4
LT		 962
963#ifdef CONFIG_PM
93160c63
RW		 964 kfree(sachip->saved_state);
965 sachip->saved_state = NULL;
1da177e4
LT		 966#endif
967 }
968
969 return 0;
970}
971
972/*
973 * Not sure if this should be on the system bus or not yet.
974 * We really want some way to register a system device at
975 * the per-machine level, and then have this driver pick
976 * up the registered devices.
977 *
978 * We also need to handle the SDRAM configuration for
979 * PXA250/SA1110 machine classes.
980 */
3ae5eaec 981static struct platform_driver sa1111_device_driver = {
1da177e4
LT		 982 .probe = sa1111_probe,
983 .remove = sa1111_remove,
984 .suspend = sa1111_suspend,
985 .resume = sa1111_resume,
3ae5eaec
RK		 986 .driver = {
987 .name = "sa1111",
988 },
1da177e4
LT		 989};
990
991/*
992 * Get the parent device driver (us) structure
993 * from a child function device
994 */
995static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
996{
997 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
998}
999
1000/*
1001 * The bits in the opdiv field are non-linear.
1002 */
1003static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1004
1005static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1006{
1007 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1008
1009 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1010
1011 fbdiv = (skcdr & 0x007f) + 2;
1012 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1013 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1014
1015 return 3686400 * fbdiv / (ipdiv * opdiv);
1016}
1017
1018/**
1019 * sa1111_pll_clock - return the current PLL clock frequency.
1020 * @sadev: SA1111 function block
1021 *
1022 * BUG: we should look at SKCR. We also blindly believe that
1023 * the chip is being fed with the 3.6864MHz clock.
1024 *
1025 * Returns the PLL clock in Hz.
1026 */
1027unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1028{
1029 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1030
1031 return __sa1111_pll_clock(sachip);
1032}
1033
1034/**
1035 * sa1111_select_audio_mode - select I2S or AC link mode
1036 * @sadev: SA1111 function block
1037 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1038 *
1039 * Frob the SKCR to select AC Link mode or I2S mode for
1040 * the audio block.
1041 */
1042void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1043{
1044 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1045 unsigned long flags;
1046 unsigned int val;
1047
1048 spin_lock_irqsave(&sachip->lock, flags);
1049
1050 val = sa1111_readl(sachip->base + SA1111_SKCR);
1051 if (mode == SA1111_AUDIO_I2S) {
1052 val &= ~SKCR_SELAC;
1053 } else {
1054 val |= SKCR_SELAC;
1055 }
1056 sa1111_writel(val, sachip->base + SA1111_SKCR);
1057
1058 spin_unlock_irqrestore(&sachip->lock, flags);
1059}
1060
1061/**
1062 * sa1111_set_audio_rate - set the audio sample rate
1063 * @sadev: SA1111 SAC function block
1064 * @rate: sample rate to select
1065 */
1066int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1067{
1068 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1069 unsigned int div;
1070
1071 if (sadev->devid != SA1111_DEVID_SAC)
1072 return -EINVAL;
1073
1074 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1075 if (div == 0)
1076 div = 1;
1077 if (div > 128)
1078 div = 128;
1079
1080 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1081
1082 return 0;
1083}
1084
1085/**
1086 * sa1111_get_audio_rate - get the audio sample rate
1087 * @sadev: SA1111 SAC function block device
1088 */
1089int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1090{
1091 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1092 unsigned long div;
1093
1094 if (sadev->devid != SA1111_DEVID_SAC)
1095 return -EINVAL;
1096
1097 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1098
1099 return __sa1111_pll_clock(sachip) / (256 * div);
1100}
1101
1102void sa1111_set_io_dir(struct sa1111_dev *sadev,
1103 unsigned int bits, unsigned int dir,
1104 unsigned int sleep_dir)
1105{
1106 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1107 unsigned long flags;
1108 unsigned int val;
1109 void __iomem *gpio = sachip->base + SA1111_GPIO;
1110
1111#define MODIFY_BITS(port, mask, dir) \
1112 if (mask) { \
1113 val = sa1111_readl(port); \
1114 val &= ~(mask); \
1115 val |= (dir) & (mask); \
1116 sa1111_writel(val, port); \
1117 }
1118
1119 spin_lock_irqsave(&sachip->lock, flags);
1120 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1121 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1122 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1123
1124 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1125 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1126 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1127 spin_unlock_irqrestore(&sachip->lock, flags);
1128}
1129
1130void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1131{
1132 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1133 unsigned long flags;
1134 unsigned int val;
1135 void __iomem *gpio = sachip->base + SA1111_GPIO;
1136
1137 spin_lock_irqsave(&sachip->lock, flags);
1138 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1139 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1140 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1141 spin_unlock_irqrestore(&sachip->lock, flags);
1142}
1143
1144void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1145{
1146 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1147 unsigned long flags;
1148 unsigned int val;
1149 void __iomem *gpio = sachip->base + SA1111_GPIO;
1150
1151 spin_lock_irqsave(&sachip->lock, flags);
1152 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1153 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1154 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1155 spin_unlock_irqrestore(&sachip->lock, flags);
1156}
1157
1158/*
1159 * Individual device operations.
1160 */
1161
1162/**
1163 * sa1111_enable_device - enable an on-chip SA1111 function block
1164 * @sadev: SA1111 function block device to enable
1165 */
1166void sa1111_enable_device(struct sa1111_dev *sadev)
1167{
1168 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1169 unsigned long flags;
1170 unsigned int val;
1171
1172 spin_lock_irqsave(&sachip->lock, flags);
1173 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1174 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1175 spin_unlock_irqrestore(&sachip->lock, flags);
1176}
1177
1178/**
1179 * sa1111_disable_device - disable an on-chip SA1111 function block
1180 * @sadev: SA1111 function block device to disable
1181 */
1182void sa1111_disable_device(struct sa1111_dev *sadev)
1183{
1184 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1185 unsigned long flags;
1186 unsigned int val;
1187
1188 spin_lock_irqsave(&sachip->lock, flags);
1189 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1190 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1191 spin_unlock_irqrestore(&sachip->lock, flags);
1192}
1193
1194/*
1195 * SA1111 "Register Access Bus."
1196 *
1197 * We model this as a regular bus type, and hang devices directly
1198 * off this.
1199 */
1200static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1201{
1202 struct sa1111_dev *dev = SA1111_DEV(_dev);
1203 struct sa1111_driver *drv = SA1111_DRV(_drv);
1204
1205 return dev->devid == drv->devid;
1206}
1207
1208static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1209{
1210 struct sa1111_dev *sadev = SA1111_DEV(dev);
1211 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1212 int ret = 0;
1213
1214 if (drv && drv->suspend)
1215 ret = drv->suspend(sadev, state);
1216 return ret;
1217}
1218
1219static int sa1111_bus_resume(struct device *dev)
1220{
1221 struct sa1111_dev *sadev = SA1111_DEV(dev);
1222 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1223 int ret = 0;
1224
1225 if (drv && drv->resume)
1226 ret = drv->resume(sadev);
1227 return ret;
1228}
1229
1230static int sa1111_bus_probe(struct device *dev)
1231{
1232 struct sa1111_dev *sadev = SA1111_DEV(dev);
1233 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1234 int ret = -ENODEV;
1235
1236 if (drv->probe)
1237 ret = drv->probe(sadev);
1238 return ret;
1239}
1240
1241static int sa1111_bus_remove(struct device *dev)
1242{
1243 struct sa1111_dev *sadev = SA1111_DEV(dev);
1244 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1245 int ret = 0;
1246
1247 if (drv->remove)
1248 ret = drv->remove(sadev);
1249 return ret;
1250}
1251
1252struct bus_type sa1111_bus_type = {
1253 .name = "sa1111-rab",
1254 .match = sa1111_match,
2876ba43
RK		 1255 .probe = sa1111_bus_probe,
1256 .remove = sa1111_bus_remove,
1da177e4
LT		 1257 .suspend = sa1111_bus_suspend,
1258 .resume = sa1111_bus_resume,
1259};
1260
1261int sa1111_driver_register(struct sa1111_driver *driver)
1262{
1da177e4
LT		 1263 driver->drv.bus = &sa1111_bus_type;
1264 return driver_register(&driver->drv);
1265}
1266
1267void sa1111_driver_unregister(struct sa1111_driver *driver)
1268{
1269 driver_unregister(&driver->drv);
1270}
1271
1272static int __init sa1111_init(void)
1273{
1274 int ret = bus_register(&sa1111_bus_type);
1275 if (ret == 0)
3ae5eaec 1276 platform_driver_register(&sa1111_device_driver);
1da177e4
LT		 1277 return ret;
1278}
1279
1280static void __exit sa1111_exit(void)
1281{
3ae5eaec 1282 platform_driver_unregister(&sa1111_device_driver);
1da177e4
LT		 1283 bus_unregister(&sa1111_bus_type);
1284}
1285
72724382 1286subsys_initcall(sa1111_init);
1da177e4
LT		 1287module_exit(sa1111_exit);
1288
1289MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1290MODULE_LICENSE("GPL");
1291
1292EXPORT_SYMBOL(sa1111_select_audio_mode);
1293EXPORT_SYMBOL(sa1111_set_audio_rate);
1294EXPORT_SYMBOL(sa1111_get_audio_rate);
1295EXPORT_SYMBOL(sa1111_set_io_dir);
1296EXPORT_SYMBOL(sa1111_set_io);
1297EXPORT_SYMBOL(sa1111_set_sleep_io);
1298EXPORT_SYMBOL(sa1111_enable_device);
1299EXPORT_SYMBOL(sa1111_disable_device);
1300EXPORT_SYMBOL(sa1111_pll_clock);
1301EXPORT_SYMBOL(sa1111_bus_type);
1302EXPORT_SYMBOL(sa1111_driver_register);
1303EXPORT_SYMBOL(sa1111_driver_unregister);
kernel source for telekom puls (alcatel/mediatek)