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5d0769f0 AB |
1 | /* |
2 | * Copyright 2012 Linaro Ltd | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | soc-u9500 { | |
16 | #address-cells = <1>; | |
17 | #size-cells = <1>; | |
7e0ce270 | 18 | compatible = "stericsson,db8500"; |
dab6487e | 19 | interrupt-parent = <&intc>; |
5d0769f0 | 20 | ranges; |
7e0ce270 | 21 | |
dab6487e LJ |
22 | intc: interrupt-controller@a0411000 { |
23 | compatible = "arm,cortex-a9-gic"; | |
24 | #interrupt-cells = <3>; | |
25 | #address-cells = <1>; | |
26 | interrupt-controller; | |
dab6487e LJ |
27 | reg = <0xa0411000 0x1000>, |
28 | <0xa0410100 0x100>; | |
29 | }; | |
30 | ||
f1949ea0 LJ |
31 | L2: l2-cache { |
32 | compatible = "arm,pl310-cache"; | |
33 | reg = <0xa0412000 0x1000>; | |
34 | interrupts = <0 13 4>; | |
35 | cache-unified; | |
36 | cache-level = <2>; | |
37 | }; | |
38 | ||
7e0ce270 LJ |
39 | pmu { |
40 | compatible = "arm,cortex-a9-pmu"; | |
41 | interrupts = <0 7 0x4>; | |
42 | }; | |
43 | ||
71de5c46 LJ |
44 | timer@a0410600 { |
45 | compatible = "arm,cortex-a9-twd-timer"; | |
46 | reg = <0xa0410600 0x20>; | |
47 | interrupts = <1 13 0x304>; | |
48 | }; | |
49 | ||
7e0ce270 LJ |
50 | rtc@80154000 { |
51 | compatible = "stericsson,db8500-rtc"; | |
52 | reg = <0x80154000 0x1000>; | |
53 | interrupts = <0 18 0x4>; | |
54 | }; | |
55 | ||
56 | gpio0: gpio@8012e000 { | |
57 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 58 | "st,nomadik-gpio"; |
7e0ce270 LJ |
59 | reg = <0x8012e000 0x80>; |
60 | interrupts = <0 119 0x4>; | |
61 | supports-sleepmode; | |
62 | gpio-controller; | |
c0b133bd LJ |
63 | #gpio-cells = <2>; |
64 | gpio-bank = <0>; | |
7e0ce270 LJ |
65 | }; |
66 | ||
67 | gpio1: gpio@8012e080 { | |
68 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 69 | "st,nomadik-gpio"; |
7e0ce270 LJ |
70 | reg = <0x8012e080 0x80>; |
71 | interrupts = <0 120 0x4>; | |
72 | supports-sleepmode; | |
73 | gpio-controller; | |
c0b133bd LJ |
74 | #gpio-cells = <2>; |
75 | gpio-bank = <1>; | |
7e0ce270 LJ |
76 | }; |
77 | ||
78 | gpio2: gpio@8000e000 { | |
79 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 80 | "st,nomadik-gpio"; |
7e0ce270 LJ |
81 | reg = <0x8000e000 0x80>; |
82 | interrupts = <0 121 0x4>; | |
83 | supports-sleepmode; | |
84 | gpio-controller; | |
c0b133bd LJ |
85 | #gpio-cells = <2>; |
86 | gpio-bank = <2>; | |
7e0ce270 LJ |
87 | }; |
88 | ||
89 | gpio3: gpio@8000e080 { | |
90 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 91 | "st,nomadik-gpio"; |
7e0ce270 LJ |
92 | reg = <0x8000e080 0x80>; |
93 | interrupts = <0 122 0x4>; | |
94 | supports-sleepmode; | |
95 | gpio-controller; | |
c0b133bd LJ |
96 | #gpio-cells = <2>; |
97 | gpio-bank = <3>; | |
7e0ce270 LJ |
98 | }; |
99 | ||
100 | gpio4: gpio@8000e100 { | |
101 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 102 | "st,nomadik-gpio"; |
7e0ce270 LJ |
103 | reg = <0x8000e100 0x80>; |
104 | interrupts = <0 123 0x4>; | |
105 | supports-sleepmode; | |
106 | gpio-controller; | |
c0b133bd LJ |
107 | #gpio-cells = <2>; |
108 | gpio-bank = <4>; | |
7e0ce270 LJ |
109 | }; |
110 | ||
111 | gpio5: gpio@8000e180 { | |
112 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 113 | "st,nomadik-gpio"; |
7e0ce270 LJ |
114 | reg = <0x8000e180 0x80>; |
115 | interrupts = <0 124 0x4>; | |
116 | supports-sleepmode; | |
117 | gpio-controller; | |
c0b133bd LJ |
118 | #gpio-cells = <2>; |
119 | gpio-bank = <5>; | |
7e0ce270 LJ |
120 | }; |
121 | ||
122 | gpio6: gpio@8011e000 { | |
123 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 124 | "st,nomadik-gpio"; |
7e0ce270 LJ |
125 | reg = <0x8011e000 0x80>; |
126 | interrupts = <0 125 0x4>; | |
127 | supports-sleepmode; | |
128 | gpio-controller; | |
c0b133bd LJ |
129 | #gpio-cells = <2>; |
130 | gpio-bank = <6>; | |
7e0ce270 LJ |
131 | }; |
132 | ||
133 | gpio7: gpio@8011e080 { | |
134 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 135 | "st,nomadik-gpio"; |
7e0ce270 LJ |
136 | reg = <0x8011e080 0x80>; |
137 | interrupts = <0 126 0x4>; | |
138 | supports-sleepmode; | |
139 | gpio-controller; | |
c0b133bd LJ |
140 | #gpio-cells = <2>; |
141 | gpio-bank = <7>; | |
7e0ce270 LJ |
142 | }; |
143 | ||
144 | gpio8: gpio@a03fe000 { | |
145 | compatible = "stericsson,db8500-gpio", | |
fd9a80b2 | 146 | "st,nomadik-gpio"; |
7e0ce270 LJ |
147 | reg = <0xa03fe000 0x80>; |
148 | interrupts = <0 127 0x4>; | |
149 | supports-sleepmode; | |
150 | gpio-controller; | |
c0b133bd LJ |
151 | #gpio-cells = <2>; |
152 | gpio-bank = <8>; | |
7e0ce270 LJ |
153 | }; |
154 | ||
155 | usb@a03e0000 { | |
156 | compatible = "stericsson,db8500-musb", | |
157 | "mentor,musb"; | |
158 | reg = <0xa03e0000 0x10000>; | |
159 | interrupts = <0 23 0x4>; | |
160 | }; | |
161 | ||
162 | dma-controller@801C0000 { | |
163 | compatible = "stericsson,db8500-dma40", | |
164 | "stericsson,dma40"; | |
165 | reg = <0x801C0000 0x1000 0x40010000 0x800>; | |
166 | interrupts = <0 25 0x4>; | |
167 | }; | |
168 | ||
169 | prcmu@80157000 { | |
170 | compatible = "stericsson,db8500-prcmu"; | |
171 | reg = <0x80157000 0x1000>; | |
172 | interrupts = <46 47>; | |
173 | #address-cells = <1>; | |
3de3d749 LJ |
174 | #size-cells = <1>; |
175 | ranges; | |
176 | ||
177 | prcmu-timer-4@80157450 { | |
178 | compatible = "stericsson,db8500-prcmu-timer-4"; | |
179 | reg = <0x80157450 0xC>; | |
180 | }; | |
7e0ce270 LJ |
181 | |
182 | ab8500@5 { | |
183 | compatible = "stericsson,ab8500"; | |
184 | reg = <5>; /* mailbox 5 is i2c */ | |
185 | interrupts = <0 40 0x4>; | |
186 | }; | |
187 | }; | |
188 | ||
189 | i2c@80004000 { | |
785834a1 | 190 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
191 | reg = <0x80004000 0x1000>; |
192 | interrupts = <0 21 0x4>; | |
193 | #address-cells = <1>; | |
194 | #size-cells = <0>; | |
195 | }; | |
196 | ||
197 | i2c@80122000 { | |
785834a1 | 198 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
199 | reg = <0x80122000 0x1000>; |
200 | interrupts = <0 22 0x4>; | |
201 | #address-cells = <1>; | |
202 | #size-cells = <0>; | |
203 | }; | |
204 | ||
205 | i2c@80128000 { | |
785834a1 | 206 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
207 | reg = <0x80128000 0x1000>; |
208 | interrupts = <0 55 0x4>; | |
209 | #address-cells = <1>; | |
210 | #size-cells = <0>; | |
211 | }; | |
212 | ||
213 | i2c@80110000 { | |
785834a1 | 214 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
215 | reg = <0x80110000 0x1000>; |
216 | interrupts = <0 12 0x4>; | |
217 | #address-cells = <1>; | |
218 | #size-cells = <0>; | |
219 | }; | |
220 | ||
221 | i2c@8012a000 { | |
785834a1 | 222 | compatible = "stericsson,db8500-i2c", "st,nomadik-i2c"; |
7e0ce270 LJ |
223 | reg = <0x8012a000 0x1000>; |
224 | interrupts = <0 51 0x4>; | |
225 | #address-cells = <1>; | |
226 | #size-cells = <0>; | |
227 | }; | |
228 | ||
229 | ssp@80002000 { | |
230 | compatible = "arm,pl022", "arm,primecell"; | |
231 | reg = <80002000 0x1000>; | |
232 | interrupts = <0 14 0x4>; | |
233 | #address-cells = <1>; | |
234 | #size-cells = <0>; | |
235 | status = "disabled"; | |
15daf691 LJ |
236 | |
237 | // Add one of these for each child device | |
7e0ce270 | 238 | cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; |
15daf691 | 239 | |
7e0ce270 LJ |
240 | }; |
241 | ||
242 | uart@80120000 { | |
243 | compatible = "arm,pl011", "arm,primecell"; | |
244 | reg = <0x80120000 0x1000>; | |
245 | interrupts = <0 11 0x4>; | |
246 | status = "disabled"; | |
247 | }; | |
248 | uart@80121000 { | |
249 | compatible = "arm,pl011", "arm,primecell"; | |
250 | reg = <0x80121000 0x1000>; | |
251 | interrupts = <0 19 0x4>; | |
252 | status = "disabled"; | |
253 | }; | |
254 | uart@80007000 { | |
255 | compatible = "arm,pl011", "arm,primecell"; | |
256 | reg = <0x80007000 0x1000>; | |
257 | interrupts = <0 26 0x4>; | |
258 | status = "disabled"; | |
259 | }; | |
260 | ||
261 | sdi@80126000 { | |
262 | compatible = "arm,pl18x", "arm,primecell"; | |
263 | reg = <0x80126000 0x1000>; | |
264 | interrupts = <0 60 0x4>; | |
265 | status = "disabled"; | |
266 | }; | |
267 | sdi@80118000 { | |
268 | compatible = "arm,pl18x", "arm,primecell"; | |
269 | reg = <0x80118000 0x1000>; | |
270 | interrupts = <0 50 0x4>; | |
271 | status = "disabled"; | |
272 | }; | |
273 | sdi@80005000 { | |
274 | compatible = "arm,pl18x", "arm,primecell"; | |
275 | reg = <0x80005000 0x1000>; | |
276 | interrupts = <0 41 0x4>; | |
277 | status = "disabled"; | |
278 | }; | |
279 | sdi@80119000 { | |
280 | compatible = "arm,pl18x", "arm,primecell"; | |
281 | reg = <0x80119000 0x1000>; | |
282 | interrupts = <0 59 0x4>; | |
283 | status = "disabled"; | |
284 | }; | |
285 | sdi@80114000 { | |
286 | compatible = "arm,pl18x", "arm,primecell"; | |
287 | reg = <0x80114000 0x1000>; | |
288 | interrupts = <0 99 0x4>; | |
289 | status = "disabled"; | |
290 | }; | |
291 | sdi@80008000 { | |
292 | compatible = "arm,pl18x", "arm,primecell"; | |
293 | reg = <0x80114000 0x1000>; | |
294 | interrupts = <0 100 0x4>; | |
295 | status = "disabled"; | |
296 | }; | |
bf76e062 LJ |
297 | |
298 | external-bus@50000000 { | |
299 | compatible = "simple-bus"; | |
300 | reg = <0x50000000 0x4000000>; | |
301 | #address-cells = <1>; | |
302 | #size-cells = <1>; | |
303 | ranges = <0 0x50000000 0x4000000>; | |
304 | status = "disabled"; | |
305 | }; | |
5d0769f0 AB |
306 | }; |
307 | }; |