[GitHub/mt8127/android_kernel_alcatel_ttab.git] / Documentation / i2c / i2c-protocol

This document describes the i2c protocol. Or will, when it is finished :-)

Key to symbols
==============

S     (1 bit) : Start bit
P     (1 bit) : Stop bit
Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
A, NA (1 bit) : Accept and reverse accept bit. 
Addr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to 
                get a 10 bit I2C address.
Comm  (8 bits): Command byte, a data byte which often selects a register on
                the device.
Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
                for 16 bit data.
Count (8 bits): A data byte containing the length of a block operation.

[..]: Data sent by I2C device, as opposed to data sent by the host adapter.


Simple send transaction
======================

This corresponds to i2c_master_send.

  S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P


Simple receive transaction
===========================

This corresponds to i2c_master_recv

  S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P


Combined transactions
====================

This corresponds to i2c_transfer

They are just like the above transactions, but instead of a stop bit P
a start bit S is sent and the transaction continues. An example of
a byte read, followed by a byte write:

  S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P


Modified transactions
=====================

The following modifications to the I2C protocol can also be generated,
with the exception of I2C_M_NOSTART these are usually only needed to
work around device issues:

  Flag I2C_M_NOSTART: 
    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
    point. For example, setting I2C_M_NOSTART on the second partial message
    generates something like:
      S Addr Rd [A] [Data] NA Data [A] P
    If you set the I2C_M_NOSTART variable for the first partial message,
    we do not generate Addr, but we do generate the startbit S. This will
    probably confuse all other clients on your bus, so don't try this.

    This is often used to gather transmits from multiple data buffers in
    system memory into something that appears as a single transfer to the
    I2C device but may also be used between direction changes by some
    rare devices.

  Flags I2C_M_REV_DIR_ADDR
    This toggles the Rd/Wr flag. That is, if you want to do a write, but
    need to emit an Rd instead of a Wr, or vice versa, you set this
    flag. For example:
      S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P

  Flags I2C_M_IGNORE_NAK
    Normally message is interrupted immediately if there is [NA] from the
    client. Setting this flag treats any [NA] as [A], and all of
    message is sent.
    These messages may still fail to SCL lo->hi timeout.

  Flags I2C_M_NO_RD_ACK
    In a read message, master A/NA bit is skipped.
Commit	Line	Data
1da177e4 LT	1	This document describes the i2c protocol. Or will, when it is finished :-)
	2
	3	Key to symbols
	4	==============
	5
	6	S (1 bit) : Start bit
	7	P (1 bit) : Stop bit
	8	Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
	9	A, NA (1 bit) : Accept and reverse accept bit.
	10	Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
	11	get a 10 bit I2C address.
	12	Comm (8 bits): Command byte, a data byte which often selects a register on
	13	the device.
	14	Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
	15	for 16 bit data.
	16	Count (8 bits): A data byte containing the length of a block operation.
	17
	18	[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
	19
	20
	21	Simple send transaction
	22	======================
	23
	24	This corresponds to i2c_master_send.
	25
	26	S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
	27
	28
	29	Simple receive transaction
	30	===========================
	31
	32	This corresponds to i2c_master_recv
	33
	34	S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
	35
	36
	37	Combined transactions
	38	====================
	39
	40	This corresponds to i2c_transfer
	41
	42	They are just like the above transactions, but instead of a stop bit P
	43	a start bit S is sent and the transaction continues. An example of
	44	a byte read, followed by a byte write:
	45
	46	S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
	47
	48
	49	Modified transactions
	50	=====================
	51
14674e70 MB	52	The following modifications to the I2C protocol can also be generated,
	53	with the exception of I2C_M_NOSTART these are usually only needed to
	54	work around device issues:
1da177e4 LT	55
	56	Flag I2C_M_NOSTART:
	57	In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
	58	point. For example, setting I2C_M_NOSTART on the second partial message
	59	generates something like:
	60	S Addr Rd [A] [Data] NA Data [A] P
	61	If you set the I2C_M_NOSTART variable for the first partial message,
	62	we do not generate Addr, but we do generate the startbit S. This will
	63	probably confuse all other clients on your bus, so don't try this.
	64
14674e70 MB	65	This is often used to gather transmits from multiple data buffers in
	66	system memory into something that appears as a single transfer to the
	67	I2C device but may also be used between direction changes by some
	68	rare devices.
	69
1da177e4 LT	70	Flags I2C_M_REV_DIR_ADDR
	71	This toggles the Rd/Wr flag. That is, if you want to do a write, but
	72	need to emit an Rd instead of a Wr, or vice versa, you set this
	73	flag. For example:
	74	S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
	75
	76	Flags I2C_M_IGNORE_NAK
	77	Normally message is interrupted immediately if there is [NA] from the
db955170	78	client. Setting this flag treats any [NA] as [A], and all of
1da177e4 LT	79	message is sent.
	80	These messages may still fail to SCL lo->hi timeout.
	81
	82	Flags I2C_M_NO_RD_ACK
	83	In a read message, master A/NA bit is skipped.