xtensa: clear all DBREAKC registers on start
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / xtensa / kernel / head.S
index 7d740ebbe198ec77a8011601f4172ebc809b9be8..bb12d778f64fa5cb96e2d731ded29d5e120d6b21 100644 (file)
@@ -118,7 +118,7 @@ ENTRY(_startup)
        wsr     a0, icountlevel
 
        .set    _index, 0
-       .rept   XCHAL_NUM_DBREAK - 1
+       .rept   XCHAL_NUM_DBREAK
        wsr     a0, SREG_DBREAKC + _index
        .set    _index, _index + 1
        .endr