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Merge tag 'v3.10.80' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / mc13783.c
CommitLineData
8b908b86
PR		 1/*
2 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
3 * Copyright 2009 Sascha Hauer, s.hauer@pengutronix.de
4 * Copyright 2012 Philippe Retornaz, philippe.retornaz@epfl.ch
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/mfd/mc13xxx.h>
26#include <linux/slab.h>
27#include <sound/core.h>
28#include <sound/control.h>
29#include <sound/pcm.h>
30#include <sound/soc.h>
31#include <sound/initval.h>
32#include <sound/soc-dapm.h>
33
34#include "mc13783.h"
35
36#define MC13783_AUDIO_RX0 36
37#define MC13783_AUDIO_RX1 37
38#define MC13783_AUDIO_TX 38
39#define MC13783_SSI_NETWORK 39
40#define MC13783_AUDIO_CODEC 40
41#define MC13783_AUDIO_DAC 41
42
43#define AUDIO_RX0_ALSPEN (1 << 5)
44#define AUDIO_RX0_ALSPSEL (1 << 7)
45#define AUDIO_RX0_ADDCDC (1 << 21)
46#define AUDIO_RX0_ADDSTDC (1 << 22)
47#define AUDIO_RX0_ADDRXIN (1 << 23)
48
49#define AUDIO_RX1_PGARXEN (1 << 0);
50#define AUDIO_RX1_PGASTEN (1 << 5)
51#define AUDIO_RX1_ARXINEN (1 << 10)
52
53#define AUDIO_TX_AMC1REN (1 << 5)
54#define AUDIO_TX_AMC1LEN (1 << 7)
55#define AUDIO_TX_AMC2EN (1 << 9)
56#define AUDIO_TX_ATXINEN (1 << 11)
57#define AUDIO_TX_RXINREC (1 << 13)
58
59#define SSI_NETWORK_CDCTXRXSLOT(x) (((x) & 0x3) << 2)
60#define SSI_NETWORK_CDCTXSECSLOT(x) (((x) & 0x3) << 4)
61#define SSI_NETWORK_CDCRXSECSLOT(x) (((x) & 0x3) << 6)
62#define SSI_NETWORK_CDCRXSECGAIN(x) (((x) & 0x3) << 8)
63#define SSI_NETWORK_CDCSUMGAIN(x) (1 << 10)
64#define SSI_NETWORK_CDCFSDLY(x) (1 << 11)
65#define SSI_NETWORK_DAC_SLOTS_8 (1 << 12)
66#define SSI_NETWORK_DAC_SLOTS_4 (2 << 12)
67#define SSI_NETWORK_DAC_SLOTS_2 (3 << 12)
68#define SSI_NETWORK_DAC_SLOT_MASK (3 << 12)
69#define SSI_NETWORK_DAC_RXSLOT_0_1 (0 << 14)
70#define SSI_NETWORK_DAC_RXSLOT_2_3 (1 << 14)
71#define SSI_NETWORK_DAC_RXSLOT_4_5 (2 << 14)
72#define SSI_NETWORK_DAC_RXSLOT_6_7 (3 << 14)
73#define SSI_NETWORK_DAC_RXSLOT_MASK (3 << 14)
74#define SSI_NETWORK_STDCRXSECSLOT(x) (((x) & 0x3) << 16)
75#define SSI_NETWORK_STDCRXSECGAIN(x) (((x) & 0x3) << 18)
76#define SSI_NETWORK_STDCSUMGAIN (1 << 20)
77
78/*
79 * MC13783_AUDIO_CODEC and MC13783_AUDIO_DAC mostly share the same
80 * register layout
81 */
82#define AUDIO_SSI_SEL (1 << 0)
83#define AUDIO_CLK_SEL (1 << 1)
84#define AUDIO_CSM (1 << 2)
85#define AUDIO_BCL_INV (1 << 3)
86#define AUDIO_CFS_INV (1 << 4)
87#define AUDIO_CFS(x) (((x) & 0x3) << 5)
88#define AUDIO_CLK(x) (((x) & 0x7) << 7)
89#define AUDIO_C_EN (1 << 11)
90#define AUDIO_C_CLK_EN (1 << 12)
91#define AUDIO_C_RESET (1 << 15)
92
93#define AUDIO_CODEC_CDCFS8K16K (1 << 10)
94#define AUDIO_DAC_CFS_DLY_B (1 << 10)
95
96struct mc13783_priv {
97 struct snd_soc_codec codec;
98 struct mc13xxx *mc13xxx;
99
100 enum mc13783_ssi_port adc_ssi_port;
101 enum mc13783_ssi_port dac_ssi_port;
102};
103
104static unsigned int mc13783_read(struct snd_soc_codec *codec,
105 unsigned int reg)
106{
107 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
108 unsigned int value = 0;
109
110 mc13xxx_lock(priv->mc13xxx);
111
112 mc13xxx_reg_read(priv->mc13xxx, reg, &value);
113
114 mc13xxx_unlock(priv->mc13xxx);
115
116 return value;
117}
118
119static int mc13783_write(struct snd_soc_codec *codec,
120 unsigned int reg, unsigned int value)
121{
122 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
123 int ret;
124
125 mc13xxx_lock(priv->mc13xxx);
126
127 ret = mc13xxx_reg_write(priv->mc13xxx, reg, value);
128
87d5b89a
ST		 129 /* include errata fix for spi audio problems */
130 if (reg == MC13783_AUDIO_CODEC || reg == MC13783_AUDIO_DAC)
131 ret = mc13xxx_reg_write(priv->mc13xxx, reg, value);
132
8b908b86
PR		 133 mc13xxx_unlock(priv->mc13xxx);
134
135 return ret;
136}
137
138/* Mapping between sample rates and register value */
139static unsigned int mc13783_rates[] = {
140 8000, 11025, 12000, 16000,
141 22050, 24000, 32000, 44100,
142 48000, 64000, 96000
143};
144
145static int mc13783_pcm_hw_params_dac(struct snd_pcm_substream *substream,
146 struct snd_pcm_hw_params *params,
147 struct snd_soc_dai *dai)
148{
149 struct snd_soc_pcm_runtime *rtd = substream->private_data;
150 struct snd_soc_codec *codec = rtd->codec;
151 unsigned int rate = params_rate(params);
152 int i;
153
154 for (i = 0; i < ARRAY_SIZE(mc13783_rates); i++) {
155 if (rate == mc13783_rates[i]) {
156 snd_soc_update_bits(codec, MC13783_AUDIO_DAC,
157 0xf << 17, i << 17);
158 return 0;
159 }
160 }
161
162 return -EINVAL;
163}
164
165static int mc13783_pcm_hw_params_codec(struct snd_pcm_substream *substream,
166 struct snd_pcm_hw_params *params,
167 struct snd_soc_dai *dai)
168{
169 struct snd_soc_pcm_runtime *rtd = substream->private_data;
170 struct snd_soc_codec *codec = rtd->codec;
171 unsigned int rate = params_rate(params);
172 unsigned int val;
173
174 switch (rate) {
175 case 8000:
176 val = 0;
177 break;
178 case 16000:
179 val = AUDIO_CODEC_CDCFS8K16K;
180 break;
181 default:
182 return -EINVAL;
183 }
184
185 snd_soc_update_bits(codec, MC13783_AUDIO_CODEC, AUDIO_CODEC_CDCFS8K16K,
186 val);
187
188 return 0;
189}
190
191static int mc13783_pcm_hw_params_sync(struct snd_pcm_substream *substream,
192 struct snd_pcm_hw_params *params,
193 struct snd_soc_dai *dai)
194{
195 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
196 return mc13783_pcm_hw_params_dac(substream, params, dai);
197 else
198 return mc13783_pcm_hw_params_codec(substream, params, dai);
199}
200
201static int mc13783_set_fmt(struct snd_soc_dai *dai, unsigned int fmt,
202 unsigned int reg)
203{
204 struct snd_soc_codec *codec = dai->codec;
205 unsigned int val = 0;
206 unsigned int mask = AUDIO_CFS(3) | AUDIO_BCL_INV | AUDIO_CFS_INV |
207 AUDIO_CSM | AUDIO_C_CLK_EN | AUDIO_C_RESET;
208
209
210 /* DAI mode */
211 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
212 case SND_SOC_DAIFMT_I2S:
213 val |= AUDIO_CFS(2);
214 break;
215 case SND_SOC_DAIFMT_DSP_A:
216 val |= AUDIO_CFS(1);
217 break;
218 default:
219 return -EINVAL;
220 }
221
222 /* DAI clock inversion */
223 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
224 case SND_SOC_DAIFMT_NB_NF:
225 val |= AUDIO_BCL_INV;
226 break;
227 case SND_SOC_DAIFMT_NB_IF:
228 val |= AUDIO_BCL_INV | AUDIO_CFS_INV;
229 break;
230 case SND_SOC_DAIFMT_IB_NF:
231 break;
232 case SND_SOC_DAIFMT_IB_IF:
233 val |= AUDIO_CFS_INV;
234 break;
235 }
236
237 /* DAI clock master masks */
238 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
239 case SND_SOC_DAIFMT_CBM_CFM:
240 val |= AUDIO_C_CLK_EN;
241 break;
242 case SND_SOC_DAIFMT_CBS_CFS:
243 val |= AUDIO_CSM;
244 break;
245 case SND_SOC_DAIFMT_CBM_CFS:
246 case SND_SOC_DAIFMT_CBS_CFM:
247 return -EINVAL;
248 }
249
250 val |= AUDIO_C_RESET;
251
252 snd_soc_update_bits(codec, reg, mask, val);
253
254 return 0;
255}
256
257static int mc13783_set_fmt_async(struct snd_soc_dai *dai, unsigned int fmt)
258{
259 if (dai->id == MC13783_ID_STEREO_DAC)
260 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
261 else
262 return mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
263}
264
265static int mc13783_set_fmt_sync(struct snd_soc_dai *dai, unsigned int fmt)
266{
267 int ret;
268
269 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_DAC);
270 if (ret)
271 return ret;
272
273 /*
274 * In synchronous mode force the voice codec into slave mode
275 * so that the clock / framesync from the stereo DAC is used
276 */
277 fmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
278 fmt |= SND_SOC_DAIFMT_CBS_CFS;
279 ret = mc13783_set_fmt(dai, fmt, MC13783_AUDIO_CODEC);
280
281 return ret;
282}
283
284static int mc13783_sysclk[] = {
285 13000000,
286 15360000,
287 16800000,
288 -1,
289 26000000,
290 -1, /* 12000000, invalid for voice codec */
291 -1, /* 3686400, invalid for voice codec */
292 33600000,
293};
294
295static int mc13783_set_sysclk(struct snd_soc_dai *dai,
296 int clk_id, unsigned int freq, int dir,
297 unsigned int reg)
298{
299 struct snd_soc_codec *codec = dai->codec;
300 int clk;
301 unsigned int val = 0;
302 unsigned int mask = AUDIO_CLK(0x7) | AUDIO_CLK_SEL;
303
304 for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {
305 if (mc13783_sysclk[clk] < 0)
306 continue;
307 if (mc13783_sysclk[clk] == freq)
308 break;
309 }
310
311 if (clk == ARRAY_SIZE(mc13783_sysclk))
312 return -EINVAL;
313
314 if (clk_id == MC13783_CLK_CLIB)
315 val |= AUDIO_CLK_SEL;
316
317 val |= AUDIO_CLK(clk);
318
319 snd_soc_update_bits(codec, reg, mask, val);
320
321 return 0;
322}
323
324static int mc13783_set_sysclk_dac(struct snd_soc_dai *dai,
325 int clk_id, unsigned int freq, int dir)
326{
327 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
328}
329
330static int mc13783_set_sysclk_codec(struct snd_soc_dai *dai,
331 int clk_id, unsigned int freq, int dir)
332{
333 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
334}
335
336static int mc13783_set_sysclk_sync(struct snd_soc_dai *dai,
337 int clk_id, unsigned int freq, int dir)
338{
339 int ret;
340
341 ret = mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_DAC);
342 if (ret)
343 return ret;
344
345 return mc13783_set_sysclk(dai, clk_id, freq, dir, MC13783_AUDIO_CODEC);
346}
347
348static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai,
349 unsigned int tx_mask, unsigned int rx_mask, int slots,
350 int slot_width)
351{
352 struct snd_soc_codec *codec = dai->codec;
353 unsigned int val = 0;
354 unsigned int mask = SSI_NETWORK_DAC_SLOT_MASK |
355 SSI_NETWORK_DAC_RXSLOT_MASK;
356
357 switch (slots) {
358 case 2:
359 val |= SSI_NETWORK_DAC_SLOTS_2;
360 break;
361 case 4:
362 val |= SSI_NETWORK_DAC_SLOTS_4;
363 break;
364 case 8:
365 val |= SSI_NETWORK_DAC_SLOTS_8;
366 break;
367 default:
368 return -EINVAL;
369 }
370
371 switch (rx_mask) {
372 case 0xfffffffc:
373 val |= SSI_NETWORK_DAC_RXSLOT_0_1;
374 break;
375 case 0xfffffff3:
376 val |= SSI_NETWORK_DAC_RXSLOT_2_3;
377 break;
378 case 0xffffffcf:
379 val |= SSI_NETWORK_DAC_RXSLOT_4_5;
380 break;
381 case 0xffffff3f:
382 val |= SSI_NETWORK_DAC_RXSLOT_6_7;
383 break;
384 default:
385 return -EINVAL;
386 };
387
388 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
389
390 return 0;
391}
392
393static int mc13783_set_tdm_slot_codec(struct snd_soc_dai *dai,
394 unsigned int tx_mask, unsigned int rx_mask, int slots,
395 int slot_width)
396{
397 struct snd_soc_codec *codec = dai->codec;
398 unsigned int val = 0;
399 unsigned int mask = 0x3f;
400
401 if (slots != 4)
402 return -EINVAL;
403
404 if (tx_mask != 0xfffffffc)
405 return -EINVAL;
406
407 val |= (0x00 << 2); /* primary timeslot RX/TX(?) is 0 */
408 val |= (0x01 << 4); /* secondary timeslot TX is 1 */
409
410 snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val);
411
412 return 0;
413}
414
415static int mc13783_set_tdm_slot_sync(struct snd_soc_dai *dai,
416 unsigned int tx_mask, unsigned int rx_mask, int slots,
417 int slot_width)
418{
419 int ret;
420
421 ret = mc13783_set_tdm_slot_dac(dai, tx_mask, rx_mask, slots,
422 slot_width);
423 if (ret)
424 return ret;
425
426 ret = mc13783_set_tdm_slot_codec(dai, tx_mask, rx_mask, slots,
427 slot_width);
428
429 return ret;
430}
431
432static const struct snd_kcontrol_new mc1l_amp_ctl =
6d97c09c 433 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 7, 1, 0);
8b908b86
PR		 434
435static const struct snd_kcontrol_new mc1r_amp_ctl =
6d97c09c 436 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 5, 1, 0);
8b908b86
PR		 437
438static const struct snd_kcontrol_new mc2_amp_ctl =
6d97c09c 439 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 9, 1, 0);
8b908b86
PR		 440
441static const struct snd_kcontrol_new atx_amp_ctl =
6d97c09c 442 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0);
8b908b86
PR		 443
444
445/* Virtual mux. The chip does the input selection automatically
446 * as soon as we enable one input. */
447static const char * const adcl_enum_text[] = {
448 "MC1L", "RXINL",
449};
450
451static const struct soc_enum adcl_enum =
452 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcl_enum_text), adcl_enum_text);
453
454static const struct snd_kcontrol_new left_input_mux =
455 SOC_DAPM_ENUM_VIRT("Route", adcl_enum);
456
457static const char * const adcr_enum_text[] = {
458 "MC1R", "MC2", "RXINR", "TXIN",
459};
460
461static const struct soc_enum adcr_enum =
462 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(adcr_enum_text), adcr_enum_text);
463
464static const struct snd_kcontrol_new right_input_mux =
465 SOC_DAPM_ENUM_VIRT("Route", adcr_enum);
466
467static const struct snd_kcontrol_new samp_ctl =
6d97c09c 468 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0);
8b908b86
PR		 469
470static const struct snd_kcontrol_new lamp_ctl =
6d97c09c 471 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0);
8b908b86
PR		 472
473static const struct snd_kcontrol_new hlamp_ctl =
6d97c09c 474 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 10, 1, 0);
8b908b86
PR		 475
476static const struct snd_kcontrol_new hramp_ctl =
6d97c09c 477 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 9, 1, 0);
8b908b86
PR		 478
479static const struct snd_kcontrol_new llamp_ctl =
6d97c09c 480 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 16, 1, 0);
8b908b86
PR		 481
482static const struct snd_kcontrol_new lramp_ctl =
6d97c09c 483 SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 15, 1, 0);
8b908b86
PR		 484
485static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = {
486/* Input */
487 SND_SOC_DAPM_INPUT("MC1LIN"),
488 SND_SOC_DAPM_INPUT("MC1RIN"),
489 SND_SOC_DAPM_INPUT("MC2IN"),
490 SND_SOC_DAPM_INPUT("RXINR"),
491 SND_SOC_DAPM_INPUT("RXINL"),
492 SND_SOC_DAPM_INPUT("TXIN"),
493
6d97c09c
GC		 494 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
495 SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0),
8b908b86 496
6d97c09c
GC		 497 SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl),
498 SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl),
499 SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl),
500 SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl),
8b908b86
PR		 501
502 SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0,
503 &left_input_mux),
504 SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0,
505 &right_input_mux),
506
507 SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0),
508 SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0),
509
6d97c09c
GC		 510 SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0),
511 SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0),
8b908b86
PR		 512
513/* Output */
6d97c09c
GC		 514 SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0),
515 SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0),
8b908b86
PR		 516 SND_SOC_DAPM_OUTPUT("RXOUTL"),
517 SND_SOC_DAPM_OUTPUT("RXOUTR"),
518 SND_SOC_DAPM_OUTPUT("HSL"),
519 SND_SOC_DAPM_OUTPUT("HSR"),
520 SND_SOC_DAPM_OUTPUT("LSP"),
521 SND_SOC_DAPM_OUTPUT("SP"),
522
6d97c09c 523 SND_SOC_DAPM_SWITCH("Speaker Amp", MC13783_AUDIO_RX0, 3, 0, &samp_ctl),
8b908b86 524 SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl),
6d97c09c
GC		 525 SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0,
526 &hlamp_ctl),
527 SND_SOC_DAPM_SWITCH("Headset Amp Right", MC13783_AUDIO_RX0, 9, 0,
528 &hramp_ctl),
529 SND_SOC_DAPM_SWITCH("Line out Amp Left", MC13783_AUDIO_RX0, 16, 0,
530 &llamp_ctl),
531 SND_SOC_DAPM_SWITCH("Line out Amp Right", MC13783_AUDIO_RX0, 15, 0,
532 &lramp_ctl),
533 SND_SOC_DAPM_DAC("DAC", "Playback", MC13783_AUDIO_RX0, 22, 0),
534 SND_SOC_DAPM_PGA("DAC PGA", MC13783_AUDIO_RX1, 5, 0, NULL, 0),
8b908b86
PR		 535};
536
537static struct snd_soc_dapm_route mc13783_routes[] = {
538/* Input */
539 { "MC1L Amp", NULL, "MC1LIN"},
540 { "MC1R Amp", NULL, "MC1RIN" },
541 { "MC2 Amp", NULL, "MC2IN" },
542 { "TXIN Amp", NULL, "TXIN"},
543
544 { "PGA Left Input Mux", "MC1L", "MC1L Amp" },
545 { "PGA Left Input Mux", "RXINL", "RXINL"},
546 { "PGA Right Input Mux", "MC1R", "MC1R Amp" },
547 { "PGA Right Input Mux", "MC2", "MC2 Amp"},
548 { "PGA Right Input Mux", "TXIN", "TXIN Amp"},
549 { "PGA Right Input Mux", "RXINR", "RXINR"},
550
551 { "PGA Left Input", NULL, "PGA Left Input Mux"},
552 { "PGA Right Input", NULL, "PGA Right Input Mux"},
553
554 { "ADC", NULL, "PGA Left Input"},
555 { "ADC", NULL, "PGA Right Input"},
556 { "ADC", NULL, "ADC_Reset"},
557
558/* Output */
559 { "HSL", NULL, "Headset Amp Left" },
560 { "HSR", NULL, "Headset Amp Right"},
561 { "RXOUTL", NULL, "Line out Amp Left"},
562 { "RXOUTR", NULL, "Line out Amp Right"},
563 { "SP", NULL, "Speaker Amp"},
564 { "Speaker Amp", NULL, "DAC PGA"},
565 { "LSP", NULL, "DAC PGA"},
566 { "Headset Amp Left", NULL, "DAC PGA"},
567 { "Headset Amp Right", NULL, "DAC PGA"},
568 { "Line out Amp Left", NULL, "DAC PGA"},
569 { "Line out Amp Right", NULL, "DAC PGA"},
570 { "DAC PGA", NULL, "DAC"},
571 { "DAC", NULL, "DAC_E"},
572};
573
574static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix",
575 "Mono", "Mono Mix"};
576
577static const struct soc_enum mc13783_enum_3d_mixer =
578 SOC_ENUM_SINGLE(MC13783_AUDIO_RX1, 16, ARRAY_SIZE(mc13783_3d_mixer),
579 mc13783_3d_mixer);
580
581static struct snd_kcontrol_new mc13783_control_list[] = {
582 SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0),
583 SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0),
584 SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0),
585 SOC_ENUM("3D Control", mc13783_enum_3d_mixer),
586};
587
588static int mc13783_probe(struct snd_soc_codec *codec)
589{
590 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
8b908b86
PR		 591
592 mc13xxx_lock(priv->mc13xxx);
593
594 /* these are the reset values */
595 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893);
596 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX1, 0x00d35A);
597 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_TX, 0x420000);
598 mc13xxx_reg_write(priv->mc13xxx, MC13783_SSI_NETWORK, 0x013060);
599 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_CODEC, 0x180027);
600 mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_DAC, 0x0e0004);
601
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PR		 602 if (priv->adc_ssi_port == MC13783_SSI1_PORT)
603 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
604 AUDIO_SSI_SEL, 0);
605 else
606 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_CODEC,
048a067a 607 AUDIO_SSI_SEL, AUDIO_SSI_SEL);
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PR		 608
609 if (priv->dac_ssi_port == MC13783_SSI1_PORT)
610 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
611 AUDIO_SSI_SEL, 0);
612 else
613 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC,
048a067a 614 AUDIO_SSI_SEL, AUDIO_SSI_SEL);
8b908b86
PR		 615
616 mc13xxx_unlock(priv->mc13xxx);
617
618 return 0;
619}
620
621static int mc13783_remove(struct snd_soc_codec *codec)
622{
623 struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
624
625 mc13xxx_lock(priv->mc13xxx);
626
627 /* Make sure VAUDIOON is off */
628 mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0);
629
630 mc13xxx_unlock(priv->mc13xxx);
631
632 return 0;
633}
634
635#define MC13783_RATES_RECORD (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000)
636
637#define MC13783_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
638 SNDRV_PCM_FMTBIT_S24_LE)
639
640static struct snd_soc_dai_ops mc13783_ops_dac = {
641 .hw_params = mc13783_pcm_hw_params_dac,
642 .set_fmt = mc13783_set_fmt_async,
643 .set_sysclk = mc13783_set_sysclk_dac,
644 .set_tdm_slot = mc13783_set_tdm_slot_dac,
645};
646
647static struct snd_soc_dai_ops mc13783_ops_codec = {
648 .hw_params = mc13783_pcm_hw_params_codec,
649 .set_fmt = mc13783_set_fmt_async,
650 .set_sysclk = mc13783_set_sysclk_codec,
651 .set_tdm_slot = mc13783_set_tdm_slot_codec,
652};
653
654/*
655 * The mc13783 has two SSI ports, both of them can be routed either
656 * to the voice codec or the stereo DAC. When two different SSI ports
657 * are used for the voice codec and the stereo DAC we can do different
658 * formats and sysclock settings for playback and capture
659 * (mc13783-hifi-playback and mc13783-hifi-capture). Using the same port
660 * forces us to use symmetric rates (mc13783-hifi).
661 */
662static struct snd_soc_dai_driver mc13783_dai_async[] = {
663 {
664 .name = "mc13783-hifi-playback",
665 .id = MC13783_ID_STEREO_DAC,
666 .playback = {
667 .stream_name = "Playback",
37f45cc5 668 .channels_min = 2,
8b908b86
PR		 669 .channels_max = 2,
670 .rates = SNDRV_PCM_RATE_8000_96000,
671 .formats = MC13783_FORMATS,
672 },
673 .ops = &mc13783_ops_dac,
674 }, {
675 .name = "mc13783-hifi-capture",
676 .id = MC13783_ID_STEREO_CODEC,
677 .capture = {
678 .stream_name = "Capture",
37f45cc5 679 .channels_min = 2,
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PR		 680 .channels_max = 2,
681 .rates = MC13783_RATES_RECORD,
682 .formats = MC13783_FORMATS,
683 },
684 .ops = &mc13783_ops_codec,
685 },
686};
687
688static struct snd_soc_dai_ops mc13783_ops_sync = {
689 .hw_params = mc13783_pcm_hw_params_sync,
690 .set_fmt = mc13783_set_fmt_sync,
691 .set_sysclk = mc13783_set_sysclk_sync,
692 .set_tdm_slot = mc13783_set_tdm_slot_sync,
693};
694
695static struct snd_soc_dai_driver mc13783_dai_sync[] = {
696 {
697 .name = "mc13783-hifi",
698 .id = MC13783_ID_SYNC,
699 .playback = {
700 .stream_name = "Playback",
37f45cc5 701 .channels_min = 2,
8b908b86
PR		 702 .channels_max = 2,
703 .rates = SNDRV_PCM_RATE_8000_96000,
704 .formats = MC13783_FORMATS,
705 },
706 .capture = {
707 .stream_name = "Capture",
37f45cc5 708 .channels_min = 2,
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PR		 709 .channels_max = 2,
710 .rates = MC13783_RATES_RECORD,
711 .formats = MC13783_FORMATS,
712 },
713 .ops = &mc13783_ops_sync,
714 .symmetric_rates = 1,
715 }
716};
717
718static struct snd_soc_codec_driver soc_codec_dev_mc13783 = {
719 .probe = mc13783_probe,
720 .remove = mc13783_remove,
721 .read = mc13783_read,
722 .write = mc13783_write,
b77458da
PR		 723 .controls = mc13783_control_list,
724 .num_controls = ARRAY_SIZE(mc13783_control_list),
725 .dapm_widgets = mc13783_dapm_widgets,
726 .num_dapm_widgets = ARRAY_SIZE(mc13783_dapm_widgets),
727 .dapm_routes = mc13783_routes,
728 .num_dapm_routes = ARRAY_SIZE(mc13783_routes),
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PR		 729};
730
731static int mc13783_codec_probe(struct platform_device *pdev)
732{
733 struct mc13xxx *mc13xxx;
734 struct mc13783_priv *priv;
735 struct mc13xxx_codec_platform_data *pdata = pdev->dev.platform_data;
736 int ret;
737
738 mc13xxx = dev_get_drvdata(pdev->dev.parent);
739
740
741 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
742 if (priv == NULL)
743 return -ENOMEM;
744
745 dev_set_drvdata(&pdev->dev, priv);
746 priv->mc13xxx = mc13xxx;
747 if (pdata) {
748 priv->adc_ssi_port = pdata->adc_ssi_port;
749 priv->dac_ssi_port = pdata->dac_ssi_port;
750 } else {
751 priv->adc_ssi_port = MC13783_SSI1_PORT;
752 priv->dac_ssi_port = MC13783_SSI2_PORT;
753 }
754
755 if (priv->adc_ssi_port == priv->dac_ssi_port)
756 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
757 mc13783_dai_sync, ARRAY_SIZE(mc13783_dai_sync));
758 else
759 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_mc13783,
760 mc13783_dai_async, ARRAY_SIZE(mc13783_dai_async));
761
762 if (ret)
763 goto err_register_codec;
764
765 return 0;
766
767err_register_codec:
768 dev_err(&pdev->dev, "register codec failed with %d\n", ret);
769
770 return ret;
771}
772
773static int mc13783_codec_remove(struct platform_device *pdev)
774{
775 snd_soc_unregister_codec(&pdev->dev);
776
777 return 0;
778}
779
780static struct platform_driver mc13783_codec_driver = {
781 .driver = {
782 .name = "mc13783-codec",
783 .owner = THIS_MODULE,
784 },
785 .probe = mc13783_codec_probe,
7a79e94e 786 .remove = mc13783_codec_remove,
8b908b86
PR		 787};
788
b77458da 789module_platform_driver(mc13783_codec_driver);
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PR		 790
791MODULE_DESCRIPTION("ASoC MC13783 driver");
792MODULE_AUTHOR("Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>");
793MODULE_AUTHOR("Philippe Retornaz <philippe.retornaz@epfl.ch>");
794MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)