[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / vfio / pci / vfio_pci.c

/*
 * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
 *     Author: Alex Williamson <alex.williamson@redhat.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Derived from original vfio:
 * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
 * Author: Tom Lyon, pugs@cisco.com
 */

#include <linux/device.h>
#include <linux/eventfd.h>
#include <linux/interrupt.h>
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/notifier.h>
#include <linux/pci.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/uaccess.h>
#include <linux/vfio.h>

#include "vfio_pci_private.h"

#define DRIVER_VERSION  "0.2"
#define DRIVER_AUTHOR   "Alex Williamson <alex.williamson@redhat.com>"
#define DRIVER_DESC     "VFIO PCI - User Level meta-driver"

static bool nointxmask;
module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(nointxmask,
		  "Disable support for PCI 2.3 style INTx masking.  If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");

static int vfio_pci_enable(struct vfio_pci_device *vdev)
{
	struct pci_dev *pdev = vdev->pdev;
	int ret;
	u16 cmd;
	u8 msix_pos;

	ret = pci_enable_device(pdev);
	if (ret)
		return ret;

	vdev->reset_works = (pci_reset_function(pdev) == 0);
	pci_save_state(pdev);
	vdev->pci_saved_state = pci_store_saved_state(pdev);
	if (!vdev->pci_saved_state)
		pr_debug("%s: Couldn't store %s saved state\n",
			 __func__, dev_name(&pdev->dev));

	ret = vfio_config_init(vdev);
	if (ret) {
		pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state);
		pci_disable_device(pdev);
		return ret;
	}

	if (likely(!nointxmask))
		vdev->pci_2_3 = pci_intx_mask_supported(pdev);

	pci_read_config_word(pdev, PCI_COMMAND, &cmd);
	if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
		cmd &= ~PCI_COMMAND_INTX_DISABLE;
		pci_write_config_word(pdev, PCI_COMMAND, cmd);
	}

	msix_pos = pdev->msix_cap;
	if (msix_pos) {
		u16 flags;
		u32 table;

		pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
		pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);

		vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
		vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
		vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
	} else
		vdev->msix_bar = 0xFF;

#ifdef CONFIG_VFIO_PCI_VGA
	if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
		vdev->has_vga = true;
#endif

	return 0;
}

static void vfio_pci_disable(struct vfio_pci_device *vdev)
{
	struct pci_dev *pdev = vdev->pdev;
	int bar;

	pci_disable_device(pdev);

	vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
				VFIO_IRQ_SET_ACTION_TRIGGER,
				vdev->irq_type, 0, 0, NULL);

	vdev->virq_disabled = false;

	vfio_config_free(vdev);

	for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
		if (!vdev->barmap[bar])
			continue;
		pci_iounmap(pdev, vdev->barmap[bar]);
		pci_release_selected_regions(pdev, 1 << bar);
		vdev->barmap[bar] = NULL;
	}

	/*
	 * If we have saved state, restore it.  If we can reset the device,
	 * even better.  Resetting with current state seems better than
	 * nothing, but saving and restoring current state without reset
	 * is just busy work.
	 */
	if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
		pr_info("%s: Couldn't reload %s saved state\n",
			__func__, dev_name(&pdev->dev));

		if (!vdev->reset_works)
			return;

		pci_save_state(pdev);
	}

	/*
	 * Disable INTx and MSI, presumably to avoid spurious interrupts
	 * during reset.  Stolen from pci_reset_function()
	 */
	pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);

	if (vdev->reset_works)
		__pci_reset_function(pdev);

	pci_restore_state(pdev);
}

static void vfio_pci_release(void *device_data)
{
	struct vfio_pci_device *vdev = device_data;

	if (atomic_dec_and_test(&vdev->refcnt))
		vfio_pci_disable(vdev);

	module_put(THIS_MODULE);
}

static int vfio_pci_open(void *device_data)
{
	struct vfio_pci_device *vdev = device_data;

	if (!try_module_get(THIS_MODULE))
		return -ENODEV;

	if (atomic_inc_return(&vdev->refcnt) == 1) {
		int ret = vfio_pci_enable(vdev);
		if (ret) {
			module_put(THIS_MODULE);
			return ret;
		}
	}

	return 0;
}

static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
{
	if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
		u8 pin;
		pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
		if (pin)
			return 1;

	} else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
		u8 pos;
		u16 flags;

		pos = vdev->pdev->msi_cap;
		if (pos) {
			pci_read_config_word(vdev->pdev,
					     pos + PCI_MSI_FLAGS, &flags);

			return 1 << (flags & PCI_MSI_FLAGS_QMASK);
		}
	} else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
		u8 pos;
		u16 flags;

		pos = vdev->pdev->msix_cap;
		if (pos) {
			pci_read_config_word(vdev->pdev,
					     pos + PCI_MSIX_FLAGS, &flags);

			return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
		}
	} else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX)
		if (pci_is_pcie(vdev->pdev))
			return 1;

	return 0;
}

static long vfio_pci_ioctl(void *device_data,
			   unsigned int cmd, unsigned long arg)
{
	struct vfio_pci_device *vdev = device_data;
	unsigned long minsz;

	if (cmd == VFIO_DEVICE_GET_INFO) {
		struct vfio_device_info info;

		minsz = offsetofend(struct vfio_device_info, num_irqs);

		if (copy_from_user(&info, (void __user *)arg, minsz))
			return -EFAULT;

		if (info.argsz < minsz)
			return -EINVAL;

		info.flags = VFIO_DEVICE_FLAGS_PCI;

		if (vdev->reset_works)
			info.flags |= VFIO_DEVICE_FLAGS_RESET;

		info.num_regions = VFIO_PCI_NUM_REGIONS;
		info.num_irqs = VFIO_PCI_NUM_IRQS;

		return copy_to_user((void __user *)arg, &info, minsz);

	} else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
		struct pci_dev *pdev = vdev->pdev;
		struct vfio_region_info info;

		minsz = offsetofend(struct vfio_region_info, offset);

		if (copy_from_user(&info, (void __user *)arg, minsz))
			return -EFAULT;

		if (info.argsz < minsz)
			return -EINVAL;

		switch (info.index) {
		case VFIO_PCI_CONFIG_REGION_INDEX:
			info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
			info.size = pdev->cfg_size;
			info.flags = VFIO_REGION_INFO_FLAG_READ |
				     VFIO_REGION_INFO_FLAG_WRITE;
			break;
		case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
			info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
			info.size = pci_resource_len(pdev, info.index);
			if (!info.size) {
				info.flags = 0;
				break;
			}

			info.flags = VFIO_REGION_INFO_FLAG_READ |
				     VFIO_REGION_INFO_FLAG_WRITE;
			if (pci_resource_flags(pdev, info.index) &
			    IORESOURCE_MEM && info.size >= PAGE_SIZE)
				info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
			break;
		case VFIO_PCI_ROM_REGION_INDEX:
		{
			void __iomem *io;
			size_t size;

			info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
			info.flags = 0;

			/* Report the BAR size, not the ROM size */
			info.size = pci_resource_len(pdev, info.index);
			if (!info.size)
				break;

			/* Is it really there? */
			io = pci_map_rom(pdev, &size);
			if (!io || !size) {
				info.size = 0;
				break;
			}
			pci_unmap_rom(pdev, io);

			info.flags = VFIO_REGION_INFO_FLAG_READ;
			break;
		}
		case VFIO_PCI_VGA_REGION_INDEX:
			if (!vdev->has_vga)
				return -EINVAL;

			info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
			info.size = 0xc0000;
			info.flags = VFIO_REGION_INFO_FLAG_READ |
				     VFIO_REGION_INFO_FLAG_WRITE;

			break;
		default:
			return -EINVAL;
		}

		return copy_to_user((void __user *)arg, &info, minsz);

	} else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
		struct vfio_irq_info info;

		minsz = offsetofend(struct vfio_irq_info, count);

		if (copy_from_user(&info, (void __user *)arg, minsz))
			return -EFAULT;

		if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
			return -EINVAL;

		switch (info.index) {
		case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
			break;
		case VFIO_PCI_ERR_IRQ_INDEX:
			if (pci_is_pcie(vdev->pdev))
				break;
		/* pass thru to return error */
		default:
			return -EINVAL;
		}

		info.flags = VFIO_IRQ_INFO_EVENTFD;

		info.count = vfio_pci_get_irq_count(vdev, info.index);

		if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
			info.flags |= (VFIO_IRQ_INFO_MASKABLE |
				       VFIO_IRQ_INFO_AUTOMASKED);
		else
			info.flags |= VFIO_IRQ_INFO_NORESIZE;

		return copy_to_user((void __user *)arg, &info, minsz);

	} else if (cmd == VFIO_DEVICE_SET_IRQS) {
		struct vfio_irq_set hdr;
		size_t size;
		u8 *data = NULL;
		int max, ret = 0;

		minsz = offsetofend(struct vfio_irq_set, count);

		if (copy_from_user(&hdr, (void __user *)arg, minsz))
			return -EFAULT;

		if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
		    hdr.count >= (U32_MAX - hdr.start) ||
		    hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
				  VFIO_IRQ_SET_ACTION_TYPE_MASK))
			return -EINVAL;

		max = vfio_pci_get_irq_count(vdev, hdr.index);
		if (hdr.start >= max || hdr.start + hdr.count > max)
			return -EINVAL;

		switch (hdr.flags & VFIO_IRQ_SET_DATA_TYPE_MASK) {
		case VFIO_IRQ_SET_DATA_NONE:
			size = 0;
			break;
		case VFIO_IRQ_SET_DATA_BOOL:
			size = sizeof(uint8_t);
			break;
		case VFIO_IRQ_SET_DATA_EVENTFD:
			size = sizeof(int32_t);
			break;
		default:
			return -EINVAL;
		}

		if (size) {
			if (hdr.argsz - minsz < hdr.count * size)
				return -EINVAL;

			data = memdup_user((void __user *)(arg + minsz),
					   hdr.count * size);
			if (IS_ERR(data))
				return PTR_ERR(data);
		}

		mutex_lock(&vdev->igate);

		ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
					      hdr.start, hdr.count, data);

		mutex_unlock(&vdev->igate);
		kfree(data);

		return ret;

	} else if (cmd == VFIO_DEVICE_RESET)
		return vdev->reset_works ?
			pci_reset_function(vdev->pdev) : -EINVAL;

	return -ENOTTY;
}

static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
			   size_t count, loff_t *ppos, bool iswrite)
{
	unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
	struct vfio_pci_device *vdev = device_data;

	if (index >= VFIO_PCI_NUM_REGIONS)
		return -EINVAL;

	switch (index) {
	case VFIO_PCI_CONFIG_REGION_INDEX:
		return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);

	case VFIO_PCI_ROM_REGION_INDEX:
		if (iswrite)
			return -EINVAL;
		return vfio_pci_bar_rw(vdev, buf, count, ppos, false);

	case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
		return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);

	case VFIO_PCI_VGA_REGION_INDEX:
		return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
	}

	return -EINVAL;
}

static ssize_t vfio_pci_read(void *device_data, char __user *buf,
			     size_t count, loff_t *ppos)
{
	if (!count)
		return 0;

	return vfio_pci_rw(device_data, buf, count, ppos, false);
}

static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
			      size_t count, loff_t *ppos)
{
	if (!count)
		return 0;

	return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
}

static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
{
	struct vfio_pci_device *vdev = device_data;
	struct pci_dev *pdev = vdev->pdev;
	unsigned int index;
	u64 phys_len, req_len, pgoff, req_start;
	int ret;

	index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);

	if (vma->vm_end < vma->vm_start)
		return -EINVAL;
	if ((vma->vm_flags & VM_SHARED) == 0)
		return -EINVAL;
	if (index >= VFIO_PCI_ROM_REGION_INDEX)
		return -EINVAL;
	if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
		return -EINVAL;

	phys_len = pci_resource_len(pdev, index);
	req_len = vma->vm_end - vma->vm_start;
	pgoff = vma->vm_pgoff &
		((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
	req_start = pgoff << PAGE_SHIFT;

	if (phys_len < PAGE_SIZE || req_start + req_len > phys_len)
		return -EINVAL;

	if (index == vdev->msix_bar) {
		/*
		 * Disallow mmaps overlapping the MSI-X table; users don't
		 * get to touch this directly.  We could find somewhere
		 * else to map the overlap, but page granularity is only
		 * a recommendation, not a requirement, so the user needs
		 * to know which bits are real.  Requiring them to mmap
		 * around the table makes that clear.
		 */

		/* If neither entirely above nor below, then it overlaps */
		if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
		      req_start + req_len <= vdev->msix_offset))
			return -EINVAL;
	}

	/*
	 * Even though we don't make use of the barmap for the mmap,
	 * we need to request the region and the barmap tracks that.
	 */
	if (!vdev->barmap[index]) {
		ret = pci_request_selected_regions(pdev,
						   1 << index, "vfio-pci");
		if (ret)
			return ret;

		vdev->barmap[index] = pci_iomap(pdev, index, 0);
	}

	vma->vm_private_data = vdev;
	vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
	vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;

	return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
			       req_len, vma->vm_page_prot);
}

static const struct vfio_device_ops vfio_pci_ops = {
	.name		= "vfio-pci",
	.open		= vfio_pci_open,
	.release	= vfio_pci_release,
	.ioctl		= vfio_pci_ioctl,
	.read		= vfio_pci_read,
	.write		= vfio_pci_write,
	.mmap		= vfio_pci_mmap,
};

static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
	struct vfio_pci_device *vdev;
	struct iommu_group *group;
	int ret;

	if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
		return -EINVAL;

	group = iommu_group_get(&pdev->dev);
	if (!group)
		return -EINVAL;

	vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
	if (!vdev) {
		iommu_group_put(group);
		return -ENOMEM;
	}

	vdev->pdev = pdev;
	vdev->irq_type = VFIO_PCI_NUM_IRQS;
	mutex_init(&vdev->igate);
	spin_lock_init(&vdev->irqlock);
	atomic_set(&vdev->refcnt, 0);

	ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
	if (ret) {
		iommu_group_put(group);
		kfree(vdev);
	}

	return ret;
}

static void vfio_pci_remove(struct pci_dev *pdev)
{
	struct vfio_pci_device *vdev;

	vdev = vfio_del_group_dev(&pdev->dev);
	if (!vdev)
		return;

	iommu_group_put(pdev->dev.iommu_group);
	kfree(vdev);
}

static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
						  pci_channel_state_t state)
{
	struct vfio_pci_device *vdev;
	struct vfio_device *device;

	device = vfio_device_get_from_dev(&pdev->dev);
	if (device == NULL)
		return PCI_ERS_RESULT_DISCONNECT;

	vdev = vfio_device_data(device);
	if (vdev == NULL) {
		vfio_device_put(device);
		return PCI_ERS_RESULT_DISCONNECT;
	}

	if (vdev->err_trigger)
		eventfd_signal(vdev->err_trigger, 1);

	vfio_device_put(device);

	return PCI_ERS_RESULT_CAN_RECOVER;
}

static struct pci_error_handlers vfio_err_handlers = {
	.error_detected = vfio_pci_aer_err_detected,
};

static struct pci_driver vfio_pci_driver = {
	.name		= "vfio-pci",
	.id_table	= NULL, /* only dynamic ids */
	.probe		= vfio_pci_probe,
	.remove		= vfio_pci_remove,
	.err_handler	= &vfio_err_handlers,
};

static void __exit vfio_pci_cleanup(void)
{
	pci_unregister_driver(&vfio_pci_driver);
	vfio_pci_virqfd_exit();
	vfio_pci_uninit_perm_bits();
}

static int __init vfio_pci_init(void)
{
	int ret;

	/* Allocate shared config space permision data used by all devices */
	ret = vfio_pci_init_perm_bits();
	if (ret)
		return ret;

	/* Start the virqfd cleanup handler */
	ret = vfio_pci_virqfd_init();
	if (ret)
		goto out_virqfd;

	/* Register and scan for devices */
	ret = pci_register_driver(&vfio_pci_driver);
	if (ret)
		goto out_driver;

	return 0;

out_driver:
	vfio_pci_virqfd_exit();
out_virqfd:
	vfio_pci_uninit_perm_bits();
	return ret;
}

module_init(vfio_pci_init);
module_exit(vfio_pci_cleanup);

MODULE_VERSION(DRIVER_VERSION);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
Commit	Line	Data
89e1f7d4 AW	1	/*
	2	* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
	3	* Author: Alex Williamson <alex.williamson@redhat.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* Derived from original vfio:
	10	* Copyright 2010 Cisco Systems, Inc. All rights reserved.
	11	* Author: Tom Lyon, pugs@cisco.com
	12	*/
	13
	14	#include <linux/device.h>
	15	#include <linux/eventfd.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/iommu.h>
	18	#include <linux/module.h>
	19	#include <linux/mutex.h>
	20	#include <linux/notifier.h>
	21	#include <linux/pci.h>
	22	#include <linux/pm_runtime.h>
	23	#include <linux/slab.h>
	24	#include <linux/types.h>
	25	#include <linux/uaccess.h>
	26	#include <linux/vfio.h>
	27
	28	#include "vfio_pci_private.h"
	29
	30	#define DRIVER_VERSION "0.2"
	31	#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
	32	#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
	33
	34	static bool nointxmask;
	35	module_param_named(nointxmask, nointxmask, bool, S_IRUGO \| S_IWUSR);
	36	MODULE_PARM_DESC(nointxmask,
	37	"Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
	38
	39	static int vfio_pci_enable(struct vfio_pci_device *vdev)
	40	{
	41	struct pci_dev *pdev = vdev->pdev;
	42	int ret;
	43	u16 cmd;
	44	u8 msix_pos;
	45
9a92c509 AW	46	ret = pci_enable_device(pdev);
	47	if (ret)
	48	return ret;
	49
89e1f7d4 AW	50	vdev->reset_works = (pci_reset_function(pdev) == 0);
	51	pci_save_state(pdev);
	52	vdev->pci_saved_state = pci_store_saved_state(pdev);
	53	if (!vdev->pci_saved_state)
	54	pr_debug("%s: Couldn't store %s saved state\n",
	55	__func__, dev_name(&pdev->dev));
	56
	57	ret = vfio_config_init(vdev);
9a92c509 AW	58	if (ret) {
	59	pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state);
	60	pci_disable_device(pdev);
	61	return ret;
	62	}
89e1f7d4 AW	63
	64	if (likely(!nointxmask))
	65	vdev->pci_2_3 = pci_intx_mask_supported(pdev);
	66
	67	pci_read_config_word(pdev, PCI_COMMAND, &cmd);
	68	if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
	69	cmd &= ~PCI_COMMAND_INTX_DISABLE;
	70	pci_write_config_word(pdev, PCI_COMMAND, cmd);
	71	}
	72
a9047f24	73	msix_pos = pdev->msix_cap;
89e1f7d4 AW	74	if (msix_pos) {
	75	u16 flags;
	76	u32 table;
	77
	78	pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
	79	pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
	80
508d1aa6 BH	81	vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
508d1aa6 BH	82	vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
89e1f7d4 AW	83	vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
	84	} else
	85	vdev->msix_bar = 0xFF;
	86
84237a82 AW	87	#ifdef CONFIG_VFIO_PCI_VGA
	88	if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
	89	vdev->has_vga = true;
	90	#endif
	91
9a92c509	92	return 0;
89e1f7d4 AW	93	}
	94
	95	static void vfio_pci_disable(struct vfio_pci_device *vdev)
	96	{
2007722a	97	struct pci_dev *pdev = vdev->pdev;
89e1f7d4 AW	98	int bar;
89e1f7d4 AW	99
2007722a	100	pci_disable_device(pdev);
89e1f7d4 AW	101
	102	vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE \|
	103	VFIO_IRQ_SET_ACTION_TRIGGER,
	104	vdev->irq_type, 0, 0, NULL);
	105
	106	vdev->virq_disabled = false;
	107
	108	vfio_config_free(vdev);
	109
89e1f7d4 AW	110	for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
	111	if (!vdev->barmap[bar])
	112	continue;
2007722a AW	113	pci_iounmap(pdev, vdev->barmap[bar]);
2007722a AW	114	pci_release_selected_regions(pdev, 1 << bar);
89e1f7d4 AW	115	vdev->barmap[bar] = NULL;
89e1f7d4 AW	116	}
2007722a AW	117
	118	/*
	119	* If we have saved state, restore it. If we can reset the device,
	120	* even better. Resetting with current state seems better than
	121	* nothing, but saving and restoring current state without reset
	122	* is just busy work.
	123	*/
	124	if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
	125	pr_info("%s: Couldn't reload %s saved state\n",
	126	__func__, dev_name(&pdev->dev));
	127
	128	if (!vdev->reset_works)
	129	return;
	130
	131	pci_save_state(pdev);
	132	}
	133
	134	/*
	135	* Disable INTx and MSI, presumably to avoid spurious interrupts
	136	* during reset. Stolen from pci_reset_function()
	137	*/
	138	pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
	139
	140	if (vdev->reset_works)
	141	__pci_reset_function(pdev);
	142
	143	pci_restore_state(pdev);
89e1f7d4 AW	144	}
	145
	146	static void vfio_pci_release(void *device_data)
	147	{
	148	struct vfio_pci_device *vdev = device_data;
	149
	150	if (atomic_dec_and_test(&vdev->refcnt))
	151	vfio_pci_disable(vdev);
	152
	153	module_put(THIS_MODULE);
	154	}
	155
	156	static int vfio_pci_open(void *device_data)
	157	{
	158	struct vfio_pci_device *vdev = device_data;
	159
	160	if (!try_module_get(THIS_MODULE))
	161	return -ENODEV;
	162
	163	if (atomic_inc_return(&vdev->refcnt) == 1) {
	164	int ret = vfio_pci_enable(vdev);
	165	if (ret) {
	166	module_put(THIS_MODULE);
	167	return ret;
	168	}
	169	}
	170
	171	return 0;
	172	}
	173
	174	static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
	175	{
	176	if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
	177	u8 pin;
	178	pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
	179	if (pin)
	180	return 1;
	181
	182	} else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
	183	u8 pos;
	184	u16 flags;
	185
a9047f24	186	pos = vdev->pdev->msi_cap;
89e1f7d4 AW	187	if (pos) {
	188	pci_read_config_word(vdev->pdev,
	189	pos + PCI_MSI_FLAGS, &flags);
	190
	191	return 1 << (flags & PCI_MSI_FLAGS_QMASK);
	192	}
	193	} else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
	194	u8 pos;
	195	u16 flags;
	196
a9047f24	197	pos = vdev->pdev->msix_cap;
89e1f7d4 AW	198	if (pos) {
	199	pci_read_config_word(vdev->pdev,
	200	pos + PCI_MSIX_FLAGS, &flags);
	201
	202	return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
	203	}
dad9f897 VMP	204	} else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX)
	205	if (pci_is_pcie(vdev->pdev))
	206	return 1;
89e1f7d4 AW	207
	208	return 0;
	209	}
	210
	211	static long vfio_pci_ioctl(void *device_data,
	212	unsigned int cmd, unsigned long arg)
	213	{
	214	struct vfio_pci_device *vdev = device_data;
	215	unsigned long minsz;
	216
	217	if (cmd == VFIO_DEVICE_GET_INFO) {
	218	struct vfio_device_info info;
	219
	220	minsz = offsetofend(struct vfio_device_info, num_irqs);
	221
	222	if (copy_from_user(&info, (void __user *)arg, minsz))
	223	return -EFAULT;
	224
	225	if (info.argsz < minsz)
	226	return -EINVAL;
	227
	228	info.flags = VFIO_DEVICE_FLAGS_PCI;
	229
	230	if (vdev->reset_works)
	231	info.flags \|= VFIO_DEVICE_FLAGS_RESET;
	232
	233	info.num_regions = VFIO_PCI_NUM_REGIONS;
	234	info.num_irqs = VFIO_PCI_NUM_IRQS;
	235
	236	return copy_to_user((void __user *)arg, &info, minsz);
	237
	238	} else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
	239	struct pci_dev *pdev = vdev->pdev;
	240	struct vfio_region_info info;
	241
	242	minsz = offsetofend(struct vfio_region_info, offset);
	243
	244	if (copy_from_user(&info, (void __user *)arg, minsz))
	245	return -EFAULT;
	246
	247	if (info.argsz < minsz)
	248	return -EINVAL;
	249
	250	switch (info.index) {
	251	case VFIO_PCI_CONFIG_REGION_INDEX:
	252	info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
	253	info.size = pdev->cfg_size;
	254	info.flags = VFIO_REGION_INFO_FLAG_READ \|
	255	VFIO_REGION_INFO_FLAG_WRITE;
	256	break;
	257	case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
	258	info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
	259	info.size = pci_resource_len(pdev, info.index);
	260	if (!info.size) {
	261	info.flags = 0;
	262	break;
	263	}
	264
	265	info.flags = VFIO_REGION_INFO_FLAG_READ \|
	266	VFIO_REGION_INFO_FLAG_WRITE;
	267	if (pci_resource_flags(pdev, info.index) &
	268	IORESOURCE_MEM && info.size >= PAGE_SIZE)
	269	info.flags \|= VFIO_REGION_INFO_FLAG_MMAP;
	270	break;
271	case VFIO_PCI_ROM_REGION_INDEX:
272	{
273	void __iomem *io;
274	size_t size;
275
276	info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
277	info.flags = 0;
278
279	/* Report the BAR size, not the ROM size */
280	info.size = pci_resource_len(pdev, info.index);
281	if (!info.size)
282	break;
283
284	/* Is it really there? */
285	io = pci_map_rom(pdev, &size);
286	if (!io \|\| !size) {
287	info.size = 0;
288	break;
289	}
290	pci_unmap_rom(pdev, io);
291
292	info.flags = VFIO_REGION_INFO_FLAG_READ;
293	break;
294	}
84237a82 AW	295	case VFIO_PCI_VGA_REGION_INDEX:
	296	if (!vdev->has_vga)
	297	return -EINVAL;
	298
	299	info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
	300	info.size = 0xc0000;
	301	info.flags = VFIO_REGION_INFO_FLAG_READ \|
	302	VFIO_REGION_INFO_FLAG_WRITE;
	303
	304	break;
89e1f7d4 AW	305	default:
	306	return -EINVAL;
	307	}
	308
	309	return copy_to_user((void __user *)arg, &info, minsz);
	310
	311	} else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
	312	struct vfio_irq_info info;
	313
	314	minsz = offsetofend(struct vfio_irq_info, count);
	315
	316	if (copy_from_user(&info, (void __user *)arg, minsz))
	317	return -EFAULT;
	318
	319	if (info.argsz < minsz \|\| info.index >= VFIO_PCI_NUM_IRQS)
	320	return -EINVAL;
	321
dad9f897 VMP	322	switch (info.index) {
	323	case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
	324	break;
	325	case VFIO_PCI_ERR_IRQ_INDEX:
	326	if (pci_is_pcie(vdev->pdev))
	327	break;
	328	/* pass thru to return error */
	329	default:
	330	return -EINVAL;
	331	}
	332
89e1f7d4 AW	333	info.flags = VFIO_IRQ_INFO_EVENTFD;
	334
	335	info.count = vfio_pci_get_irq_count(vdev, info.index);
	336
	337	if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
	338	info.flags \|= (VFIO_IRQ_INFO_MASKABLE \|
	339	VFIO_IRQ_INFO_AUTOMASKED);
	340	else
	341	info.flags \|= VFIO_IRQ_INFO_NORESIZE;
	342
	343	return copy_to_user((void __user *)arg, &info, minsz);
	344
	345	} else if (cmd == VFIO_DEVICE_SET_IRQS) {
	346	struct vfio_irq_set hdr;
37ccd2be	347	size_t size;
89e1f7d4	348	u8 *data = NULL;
37ccd2be	349	int max, ret = 0;
89e1f7d4 AW	350
	351	minsz = offsetofend(struct vfio_irq_set, count);
	352
	353	if (copy_from_user(&hdr, (void __user *)arg, minsz))
	354	return -EFAULT;
	355
	356	if (hdr.argsz < minsz \|\| hdr.index >= VFIO_PCI_NUM_IRQS \|\|
37ccd2be	357	hdr.count >= (U32_MAX - hdr.start) \|\|
89e1f7d4 AW	358	hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK \|
	359	VFIO_IRQ_SET_ACTION_TYPE_MASK))
	360	return -EINVAL;
	361
37ccd2be VT	362	max = vfio_pci_get_irq_count(vdev, hdr.index);
	363	if (hdr.start >= max \|\| hdr.start + hdr.count > max)
	364	return -EINVAL;
89e1f7d4	365
37ccd2be VT	366	switch (hdr.flags & VFIO_IRQ_SET_DATA_TYPE_MASK) {
	367	case VFIO_IRQ_SET_DATA_NONE:
	368	size = 0;
	369	break;
	370	case VFIO_IRQ_SET_DATA_BOOL:
	371	size = sizeof(uint8_t);
	372	break;
	373	case VFIO_IRQ_SET_DATA_EVENTFD:
	374	size = sizeof(int32_t);
	375	break;
	376	default:
	377	return -EINVAL;
	378	}
89e1f7d4	379
37ccd2be VT	380	if (size) {
37ccd2be VT	381	if (hdr.argsz - minsz < hdr.count * size)
89e1f7d4 AW	382	return -EINVAL;
89e1f7d4 AW	383
3a1f7041 FW	384	data = memdup_user((void __user *)(arg + minsz),
	385	hdr.count * size);
	386	if (IS_ERR(data))
	387	return PTR_ERR(data);
89e1f7d4 AW	388	}
	389
	390	mutex_lock(&vdev->igate);
	391
	392	ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
	393	hdr.start, hdr.count, data);
	394
	395	mutex_unlock(&vdev->igate);
	396	kfree(data);
	397
	398	return ret;
	399
	400	} else if (cmd == VFIO_DEVICE_RESET)
	401	return vdev->reset_works ?
	402	pci_reset_function(vdev->pdev) : -EINVAL;
	403
	404	return -ENOTTY;
	405	}
	406
5b279a11 AW	407	static ssize_t vfio_pci_rw(void device_data, char __user buf,
5b279a11 AW	408	size_t count, loff_t *ppos, bool iswrite)
89e1f7d4 AW	409	{
	410	unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
	411	struct vfio_pci_device *vdev = device_data;
89e1f7d4 AW	412
	413	if (index >= VFIO_PCI_NUM_REGIONS)
	414	return -EINVAL;
	415
5b279a11 AW	416	switch (index) {
5b279a11 AW	417	case VFIO_PCI_CONFIG_REGION_INDEX:
906ee99d AW	418	return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
906ee99d AW	419
5b279a11 AW	420	case VFIO_PCI_ROM_REGION_INDEX:
	421	if (iswrite)
	422	return -EINVAL;
906ee99d	423	return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
89e1f7d4	424
5b279a11	425	case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
906ee99d	426	return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
84237a82 AW	427
	428	case VFIO_PCI_VGA_REGION_INDEX:
	429	return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
5b279a11 AW	430	}
5b279a11 AW	431
89e1f7d4 AW	432	return -EINVAL;
	433	}
	434
5b279a11 AW	435	static ssize_t vfio_pci_read(void device_data, char __user buf,
	436	size_t count, loff_t *ppos)
	437	{
906ee99d AW	438	if (!count)
	439	return 0;
	440
5b279a11 AW	441	return vfio_pci_rw(device_data, buf, count, ppos, false);
	442	}
	443
89e1f7d4 AW	444	static ssize_t vfio_pci_write(void device_data, const char __user buf,
	445	size_t count, loff_t *ppos)
	446	{
906ee99d AW	447	if (!count)
	448	return 0;
	449
	450	return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
89e1f7d4 AW	451	}
	452
	453	static int vfio_pci_mmap(void device_data, struct vm_area_struct vma)
	454	{
	455	struct vfio_pci_device *vdev = device_data;
	456	struct pci_dev *pdev = vdev->pdev;
	457	unsigned int index;
34002f54	458	u64 phys_len, req_len, pgoff, req_start;
89e1f7d4 AW	459	int ret;
	460
	461	index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
	462
	463	if (vma->vm_end < vma->vm_start)
	464	return -EINVAL;
	465	if ((vma->vm_flags & VM_SHARED) == 0)
	466	return -EINVAL;
	467	if (index >= VFIO_PCI_ROM_REGION_INDEX)
	468	return -EINVAL;
	469	if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
	470	return -EINVAL;
	471
	472	phys_len = pci_resource_len(pdev, index);
	473	req_len = vma->vm_end - vma->vm_start;
	474	pgoff = vma->vm_pgoff &
	475	((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
	476	req_start = pgoff << PAGE_SHIFT;
	477
	478	if (phys_len < PAGE_SIZE \|\| req_start + req_len > phys_len)
	479	return -EINVAL;
	480
	481	if (index == vdev->msix_bar) {
	482	/*
	483	* Disallow mmaps overlapping the MSI-X table; users don't
	484	* get to touch this directly. We could find somewhere
	485	* else to map the overlap, but page granularity is only
	486	* a recommendation, not a requirement, so the user needs
	487	* to know which bits are real. Requiring them to mmap
	488	* around the table makes that clear.
	489	*/
	490
	491	/* If neither entirely above nor below, then it overlaps */
	492	if (!(req_start >= vdev->msix_offset + vdev->msix_size \|\|
	493	req_start + req_len <= vdev->msix_offset))
	494	return -EINVAL;
	495	}
	496
	497	/*
	498	* Even though we don't make use of the barmap for the mmap,
	499	* we need to request the region and the barmap tracks that.
	500	*/
	501	if (!vdev->barmap[index]) {
	502	ret = pci_request_selected_regions(pdev,
	503	1 << index, "vfio-pci");
	504	if (ret)
	505	return ret;
	506
	507	vdev->barmap[index] = pci_iomap(pdev, index, 0);
	508	}
	509
	510	vma->vm_private_data = vdev;
547b1e81	511	vma->vm_flags \|= VM_IO \| VM_DONTEXPAND \| VM_DONTDUMP;
89e1f7d4	512	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
34002f54	513	vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
89e1f7d4	514
34002f54	515	return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
89e1f7d4 AW	516	req_len, vma->vm_page_prot);
	517	}
	518
	519	static const struct vfio_device_ops vfio_pci_ops = {
	520	.name = "vfio-pci",
	521	.open = vfio_pci_open,
	522	.release = vfio_pci_release,
	523	.ioctl = vfio_pci_ioctl,
	524	.read = vfio_pci_read,
	525	.write = vfio_pci_write,
	526	.mmap = vfio_pci_mmap,
	527	};
	528
	529	static int vfio_pci_probe(struct pci_dev pdev, const struct pci_device_id id)
	530	{
89e1f7d4 AW	531	struct vfio_pci_device *vdev;
	532	struct iommu_group *group;
	533	int ret;
	534
381a4fec	535	if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
89e1f7d4 AW	536	return -EINVAL;
	537
	538	group = iommu_group_get(&pdev->dev);
	539	if (!group)
	540	return -EINVAL;
	541
	542	vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
	543	if (!vdev) {
	544	iommu_group_put(group);
	545	return -ENOMEM;
	546	}
	547
	548	vdev->pdev = pdev;
	549	vdev->irq_type = VFIO_PCI_NUM_IRQS;
	550	mutex_init(&vdev->igate);
	551	spin_lock_init(&vdev->irqlock);
	552	atomic_set(&vdev->refcnt, 0);
	553
	554	ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
	555	if (ret) {
	556	iommu_group_put(group);
	557	kfree(vdev);
	558	}
	559
	560	return ret;
	561	}
	562
	563	static void vfio_pci_remove(struct pci_dev *pdev)
	564	{
	565	struct vfio_pci_device *vdev;
	566
	567	vdev = vfio_del_group_dev(&pdev->dev);
	568	if (!vdev)
	569	return;
	570
	571	iommu_group_put(pdev->dev.iommu_group);
	572	kfree(vdev);
	573	}
	574
dad9f897 VMP	575	static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
	576	pci_channel_state_t state)
	577	{
	578	struct vfio_pci_device *vdev;
	579	struct vfio_device *device;
	580
	581	device = vfio_device_get_from_dev(&pdev->dev);
	582	if (device == NULL)
	583	return PCI_ERS_RESULT_DISCONNECT;
	584
	585	vdev = vfio_device_data(device);
	586	if (vdev == NULL) {
	587	vfio_device_put(device);
	588	return PCI_ERS_RESULT_DISCONNECT;
	589	}
	590
	591	if (vdev->err_trigger)
	592	eventfd_signal(vdev->err_trigger, 1);
	593
	594	vfio_device_put(device);
	595
	596	return PCI_ERS_RESULT_CAN_RECOVER;
	597	}
	598
	599	static struct pci_error_handlers vfio_err_handlers = {
	600	.error_detected = vfio_pci_aer_err_detected,
	601	};
	602
89e1f7d4 AW	603	static struct pci_driver vfio_pci_driver = {
	604	.name = "vfio-pci",
	605	.id_table = NULL, /* only dynamic ids */
	606	.probe = vfio_pci_probe,
	607	.remove = vfio_pci_remove,
dad9f897	608	.err_handler = &vfio_err_handlers,
89e1f7d4 AW	609	};
	610
	611	static void __exit vfio_pci_cleanup(void)
	612	{
	613	pci_unregister_driver(&vfio_pci_driver);
	614	vfio_pci_virqfd_exit();
	615	vfio_pci_uninit_perm_bits();
	616	}
	617
	618	static int __init vfio_pci_init(void)
	619	{
	620	int ret;
	621
	622	/* Allocate shared config space permision data used by all devices */
	623	ret = vfio_pci_init_perm_bits();
	624	if (ret)
	625	return ret;
	626
	627	/* Start the virqfd cleanup handler */
	628	ret = vfio_pci_virqfd_init();
	629	if (ret)
	630	goto out_virqfd;
	631
	632	/* Register and scan for devices */
	633	ret = pci_register_driver(&vfio_pci_driver);
	634	if (ret)
	635	goto out_driver;
	636
	637	return 0;
	638
89e1f7d4	639	out_driver:
05bf3aac JL	640	vfio_pci_virqfd_exit();
05bf3aac JL	641	out_virqfd:
89e1f7d4 AW	642	vfio_pci_uninit_perm_bits();
	643	return ret;
	644	}
	645
	646	module_init(vfio_pci_init);
	647	module_exit(vfio_pci_cleanup);
	648
	649	MODULE_VERSION(DRIVER_VERSION);
	650	MODULE_LICENSE("GPL v2");
	651	MODULE_AUTHOR(DRIVER_AUTHOR);
	652	MODULE_DESCRIPTION(DRIVER_DESC);