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Merge tag 'v3.10.107' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / mvsas / mv_sas.c
CommitLineData
b5762948 1/*
20b09c29
AY		 2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
0b15fb1f 6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
20b09c29
AY		 7 *
8 * This file is licensed under GPLv2.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; version 2 of the
13 * License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
23 * USA
24*/
b5762948 25
dd4969a8 26#include "mv_sas.h"
b5762948 27
dd4969a8
JG		 28static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29{
30 if (task->lldd_task) {
31 struct mvs_slot_info *slot;
f9da3be5 32 slot = task->lldd_task;
20b09c29 33 *tag = slot->slot_tag;
dd4969a8
JG		 34 return 1;
35 }
36 return 0;
37}
8f261aaf 38
20b09c29 39void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
dd4969a8 40{
b89e8f53 41 void *bitmap = mvi->tags;
dd4969a8
JG		 42 clear_bit(tag, bitmap);
43}
8f261aaf 44
20b09c29 45void mvs_tag_free(struct mvs_info *mvi, u32 tag)
dd4969a8
JG		 46{
47 mvs_tag_clear(mvi, tag);
48}
8f261aaf 49
20b09c29 50void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
dd4969a8 51{
b89e8f53 52 void *bitmap = mvi->tags;
dd4969a8
JG		 53 set_bit(tag, bitmap);
54}
8f261aaf 55
20b09c29 56inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
dd4969a8
JG		 57{
58 unsigned int index, tag;
b89e8f53 59 void *bitmap = mvi->tags;
b5762948 60
20b09c29 61 index = find_first_zero_bit(bitmap, mvi->tags_num);
dd4969a8 62 tag = index;
20b09c29 63 if (tag >= mvi->tags_num)
dd4969a8
JG		 64 return -SAS_QUEUE_FULL;
65 mvs_tag_set(mvi, tag);
66 *tag_out = tag;
67 return 0;
68}
b5762948 69
dd4969a8
JG		 70void mvs_tag_init(struct mvs_info *mvi)
71{
72 int i;
20b09c29 73 for (i = 0; i < mvi->tags_num; ++i)
dd4969a8
JG		 74 mvs_tag_clear(mvi, i);
75}
b5762948 76
20b09c29
AY		 77struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
78{
79 unsigned long i = 0, j = 0, hi = 0;
80 struct sas_ha_struct *sha = dev->port->ha;
81 struct mvs_info *mvi = NULL;
82 struct asd_sas_phy *phy;
83
84 while (sha->sas_port[i]) {
85 if (sha->sas_port[i] == dev->port) {
86 phy = container_of(sha->sas_port[i]->phy_list.next,
87 struct asd_sas_phy, port_phy_el);
88 j = 0;
89 while (sha->sas_phy[j]) {
90 if (sha->sas_phy[j] == phy)
91 break;
92 j++;
93 }
94 break;
95 }
96 i++;
97 }
98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
8f261aaf 100
20b09c29 101 return mvi;
8f261aaf 102
20b09c29 103}
8f261aaf 104
20b09c29
AY		 105int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
106{
107 unsigned long i = 0, j = 0, n = 0, num = 0;
9870d9a2
AY		 108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
109 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 110 struct sas_ha_struct *sha = dev->port->ha;
111
112 while (sha->sas_port[i]) {
113 if (sha->sas_port[i] == dev->port) {
114 struct asd_sas_phy *phy;
115 list_for_each_entry(phy,
116 &sha->sas_port[i]->phy_list, port_phy_el) {
117 j = 0;
118 while (sha->sas_phy[j]) {
119 if (sha->sas_phy[j] == phy)
120 break;
121 j++;
122 }
123 phyno[n] = (j >= mvi->chip->n_phy) ?
124 (j - mvi->chip->n_phy) : j;
125 num++;
126 n++;
dd4969a8 127 }
dd4969a8
JG		 128 break;
129 }
20b09c29
AY		 130 i++;
131 }
132 return num;
133}
134
534ff101
XY		 135struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
136 u8 reg_set)
137{
138 u32 dev_no;
139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
141 continue;
142
143 if (mvi->devices[dev_no].taskfileset == reg_set)
144 return &mvi->devices[dev_no];
145 }
146 return NULL;
147}
148
20b09c29
AY		 149static inline void mvs_free_reg_set(struct mvs_info *mvi,
150 struct mvs_device *dev)
151{
152 if (!dev) {
153 mv_printk("device has been free.\n");
154 return;
155 }
20b09c29
AY		 156 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
157 return;
158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
159}
160
161static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
162 struct mvs_device *dev)
163{
164 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
165 return 0;
166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
167}
168
169void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
170{
171 u32 no;
172 for_each_phy(phy_mask, phy_mask, no) {
173 if (!(phy_mask & 1))
174 continue;
175 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
176 }
177}
178
20b09c29
AY		 179int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
180 void *funcdata)
181{
182 int rc = 0, phy_id = sas_phy->id;
183 u32 tmp, i = 0, hi;
184 struct sas_ha_struct *sha = sas_phy->ha;
185 struct mvs_info *mvi = NULL;
186
187 while (sha->sas_phy[i]) {
188 if (sha->sas_phy[i] == sas_phy)
189 break;
190 i++;
191 }
192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
194
195 switch (func) {
196 case PHY_FUNC_SET_LINK_RATE:
197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
198 break;
8f261aaf 199
dd4969a8 200 case PHY_FUNC_HARD_RESET:
20b09c29 201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
dd4969a8
JG		 202 if (tmp & PHY_RST_HARD)
203 break;
a4632aae 204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
dd4969a8 205 break;
b5762948 206
dd4969a8 207 case PHY_FUNC_LINK_RESET:
20b09c29 208 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
a4632aae 209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
dd4969a8 210 break;
b5762948 211
dd4969a8 212 case PHY_FUNC_DISABLE:
20b09c29
AY		 213 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
214 break;
dd4969a8
JG		 215 case PHY_FUNC_RELEASE_SPINUP_HOLD:
216 default:
ac013ed1 217 rc = -ENOSYS;
b5762948 218 }
20b09c29 219 msleep(200);
b5762948
JG		 220 return rc;
221}
222
6f039790
GKH		 223void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
224 u32 off_hi, u64 sas_addr)
20b09c29
AY		 225{
226 u32 lo = (u32)sas_addr;
227 u32 hi = (u32)(sas_addr>>32);
228
229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
233}
234
dd4969a8 235static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
ee1f1c2e 236{
dd4969a8 237 struct mvs_phy *phy = &mvi->phy[i];
20b09c29
AY		 238 struct asd_sas_phy *sas_phy = &phy->sas_phy;
239 struct sas_ha_struct *sas_ha;
dd4969a8
JG		 240 if (!phy->phy_attached)
241 return;
242
20b09c29
AY		 243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
244 && phy->phy_type & PORT_TYPE_SAS) {
245 return;
246 }
247
248 sas_ha = mvi->sas;
249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
250
dd4969a8
JG		 251 if (sas_phy->phy) {
252 struct sas_phy *sphy = sas_phy->phy;
253
254 sphy->negotiated_linkrate = sas_phy->linkrate;
255 sphy->minimum_linkrate = phy->minimum_linkrate;
256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
257 sphy->maximum_linkrate = phy->maximum_linkrate;
20b09c29 258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
ee1f1c2e 259 }
ee1f1c2e 260
dd4969a8
JG		 261 if (phy->phy_type & PORT_TYPE_SAS) {
262 struct sas_identify_frame *id;
b5762948 263
dd4969a8
JG		 264 id = (struct sas_identify_frame *)phy->frame_rcvd;
265 id->dev_type = phy->identify.device_type;
266 id->initiator_bits = SAS_PROTOCOL_ALL;
267 id->target_bits = phy->identify.target_port_protocols;
477f6d19
XY		 268
269 /* direct attached SAS device */
270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
273 }
dd4969a8 274 } else if (phy->phy_type & PORT_TYPE_SATA) {
20b09c29 275 /*Nothing*/
dd4969a8 276 }
20b09c29
AY		 277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
278
279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
280
281 mvi->sas->notify_port_event(sas_phy,
dd4969a8 282 PORTE_BYTES_DMAED);
ee1f1c2e
KW		 283}
284
dd4969a8 285void mvs_scan_start(struct Scsi_Host *shost)
b5762948 286{
20b09c29
AY		 287 int i, j;
288 unsigned short core_nr;
289 struct mvs_info *mvi;
290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
84fbd0ce 291 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
20b09c29
AY		 292
293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
dd4969a8 294
20b09c29
AY		 295 for (j = 0; j < core_nr; j++) {
296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
297 for (i = 0; i < mvi->chip->n_phy; ++i)
298 mvs_bytes_dmaed(mvi, i);
dd4969a8 299 }
84fbd0ce 300 mvs_prv->scan_finished = 1;
b5762948
JG		 301}
302
dd4969a8 303int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
b5762948 304{
84fbd0ce
XY		 305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
306 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
307
308 if (mvs_prv->scan_finished == 0)
dd4969a8 309 return 0;
84fbd0ce 310
b1124cd3 311 sas_drain_work(sha);
dd4969a8 312 return 1;
b5762948
JG		 313}
314
dd4969a8
JG		 315static int mvs_task_prep_smp(struct mvs_info *mvi,
316 struct mvs_task_exec_info *tei)
b5762948 317{
dd4969a8 318 int elem, rc, i;
7c237c5f 319 struct sas_ha_struct *sha = mvi->sas;
dd4969a8
JG		 320 struct sas_task *task = tei->task;
321 struct mvs_cmd_hdr *hdr = tei->hdr;
20b09c29
AY		 322 struct domain_device *dev = task->dev;
323 struct asd_sas_port *sas_port = dev->port;
7c237c5f
XY		 324 struct sas_phy *sphy = dev->phy;
325 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
dd4969a8
JG		 326 struct scatterlist *sg_req, *sg_resp;
327 u32 req_len, resp_len, tag = tei->tag;
328 void *buf_tmp;
329 u8 *buf_oaf;
330 dma_addr_t buf_tmp_dma;
20b09c29 331 void *buf_prd;
dd4969a8 332 struct mvs_slot_info *slot = &mvi->slot_info[tag];
dd4969a8 333 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
b89e8f53 334
dd4969a8
JG		 335 /*
336 * DMA-map SMP request, response buffers
337 */
338 sg_req = &task->smp_task.smp_req;
20b09c29 339 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
dd4969a8
JG		 340 if (!elem)
341 return -ENOMEM;
342 req_len = sg_dma_len(sg_req);
b5762948 343
dd4969a8 344 sg_resp = &task->smp_task.smp_resp;
20b09c29 345 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
dd4969a8
JG		 346 if (!elem) {
347 rc = -ENOMEM;
348 goto err_out;
349 }
20b09c29 350 resp_len = SB_RFB_MAX;
b5762948 351
dd4969a8
JG		 352 /* must be in dwords */
353 if ((req_len & 0x3) || (resp_len & 0x3)) {
354 rc = -EINVAL;
355 goto err_out_2;
b5762948
JG		 356 }
357
dd4969a8
JG		 358 /*
359 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
360 */
b5762948 361
20b09c29 362 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
dd4969a8
JG		 363 buf_tmp = slot->buf;
364 buf_tmp_dma = slot->buf_dma;
b5762948 365
dd4969a8 366 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
b5762948 367
dd4969a8
JG		 368 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
369 buf_oaf = buf_tmp;
370 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
b5762948 371
dd4969a8
JG		 372 buf_tmp += MVS_OAF_SZ;
373 buf_tmp_dma += MVS_OAF_SZ;
b5762948 374
20b09c29 375 /* region 3: PRD table *********************************** */
dd4969a8
JG		 376 buf_prd = buf_tmp;
377 if (tei->n_elem)
378 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
379 else
380 hdr->prd_tbl = 0;
b5762948 381
20b09c29 382 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
dd4969a8
JG		 383 buf_tmp += i;
384 buf_tmp_dma += i;
b5762948 385
dd4969a8
JG		 386 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
387 slot->response = buf_tmp;
388 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 389 if (mvi->flags & MVF_FLAG_SOC)
390 hdr->reserved[0] = 0;
b5762948 391
dd4969a8
JG		 392 /*
393 * Fill in TX ring and command slot header
394 */
395 slot->tx = mvi->tx_prod;
396 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
397 TXQ_MODE_I | tag |
7c237c5f 398 (MVS_PHY_ID << TXQ_PHY_SHIFT));
b5762948 399
dd4969a8
JG		 400 hdr->flags |= flags;
401 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
402 hdr->tags = cpu_to_le32(tag);
403 hdr->data_len = 0;
b5762948 404
dd4969a8 405 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 406 /* initiator, SMP, ftype 1h */
407 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
6ceae7c6 408 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
dd4969a8 409 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
20b09c29 410 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
dd4969a8
JG		 411
412 /* fill in PRD (scatter/gather) table, if any */
20b09c29 413 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 414
415 return 0;
416
dd4969a8 417err_out_2:
20b09c29 418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
dd4969a8 419 PCI_DMA_FROMDEVICE);
b5762948 420err_out:
20b09c29 421 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
dd4969a8 422 PCI_DMA_TODEVICE);
8f261aaf 423 return rc;
8f261aaf
KW		 424}
425
dd4969a8 426static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
8f261aaf 427{
dd4969a8 428 struct ata_queued_cmd *qc = task->uldd_task;
8f261aaf 429
dd4969a8
JG		 430 if (qc) {
431 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
432 qc->tf.command == ATA_CMD_FPDMA_READ) {
433 *tag = qc->tag;
434 return 1;
435 }
8f261aaf 436 }
8f261aaf 437
dd4969a8 438 return 0;
8f261aaf
KW		 439}
440
dd4969a8
JG		 441static int mvs_task_prep_ata(struct mvs_info *mvi,
442 struct mvs_task_exec_info *tei)
b5762948
JG		 443{
444 struct sas_task *task = tei->task;
445 struct domain_device *dev = task->dev;
f9da3be5 446 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948
JG		 447 struct mvs_cmd_hdr *hdr = tei->hdr;
448 struct asd_sas_port *sas_port = dev->port;
8f261aaf 449 struct mvs_slot_info *slot;
20b09c29
AY		 450 void *buf_prd;
451 u32 tag = tei->tag, hdr_tag;
452 u32 flags, del_q;
b5762948
JG		 453 void *buf_tmp;
454 u8 *buf_cmd, *buf_oaf;
455 dma_addr_t buf_tmp_dma;
8f261aaf
KW		 456 u32 i, req_len, resp_len;
457 const u32 max_resp_len = SB_RFB_MAX;
458
20b09c29
AY		 459 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
460 mv_dprintk("Have not enough regiset for dev %d.\n",
461 mvi_dev->device_id);
8f261aaf 462 return -EBUSY;
20b09c29 463 }
8f261aaf
KW		 464 slot = &mvi->slot_info[tag];
465 slot->tx = mvi->tx_prod;
20b09c29
AY		 466 del_q = TXQ_MODE_I | tag |
467 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
62d37cc4 468 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
20b09c29
AY		 469 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
470 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
471
20b09c29
AY		 472 if (task->data_dir == DMA_FROM_DEVICE)
473 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
474 else
475 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
8882f081 476
b5762948
JG		 477 if (task->ata_task.use_ncq)
478 flags |= MCH_FPDMA;
8f261aaf
KW		 479 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
480 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
481 flags |= MCH_ATAPI;
482 }
483
b5762948 484 hdr->flags = cpu_to_le32(flags);
8f261aaf 485
20b09c29
AY		 486 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
487 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
4e52fc0a 488 else
20b09c29
AY		 489 hdr_tag = tag;
490
491 hdr->tags = cpu_to_le32(hdr_tag);
492
b5762948
JG		 493 hdr->data_len = cpu_to_le32(task->total_xfer_len);
494
495 /*
496 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
497 */
b5762948 498
8f261aaf
KW		 499 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
500 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 501 buf_tmp_dma = slot->buf_dma;
502
503 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
504
505 buf_tmp += MVS_ATA_CMD_SZ;
506 buf_tmp_dma += MVS_ATA_CMD_SZ;
507
8f261aaf 508 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 509 /* used for STP. unused for SATA? */
510 buf_oaf = buf_tmp;
511 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
512
513 buf_tmp += MVS_OAF_SZ;
514 buf_tmp_dma += MVS_OAF_SZ;
515
8f261aaf 516 /* region 3: PRD table ********************************************* */
b5762948 517 buf_prd = buf_tmp;
20b09c29 518
8f261aaf
KW		 519 if (tei->n_elem)
520 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
521 else
522 hdr->prd_tbl = 0;
20b09c29 523 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
b5762948 524
b5762948
JG		 525 buf_tmp += i;
526 buf_tmp_dma += i;
527
8f261aaf 528 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 529 slot->response = buf_tmp;
530 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 531 if (mvi->flags & MVF_FLAG_SOC)
532 hdr->reserved[0] = 0;
b5762948 533
8f261aaf 534 req_len = sizeof(struct host_to_dev_fis);
b5762948 535 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
8f261aaf 536 sizeof(struct mvs_err_info) - i;
b5762948
JG		 537
538 /* request, response lengths */
8f261aaf 539 resp_len = min(resp_len, max_resp_len);
b5762948
JG		 540 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
541
20b09c29
AY		 542 if (likely(!task->ata_task.device_control_reg_update))
543 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
b5762948 544 /* fill in command FIS and ATAPI CDB */
8f261aaf
KW		 545 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
546 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
547 memcpy(buf_cmd + STP_ATAPI_CMD,
548 task->ata_task.atapi_packet, 16);
549
550 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 551 /* initiator, STP, ftype 1h */
552 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
6ceae7c6 553 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 554 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
555 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948
JG		 556
557 /* fill in PRD (scatter/gather) table, if any */
20b09c29 558 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
8882f081 559
20b09c29 560 if (task->data_dir == DMA_FROM_DEVICE)
8882f081 561 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
20b09c29 562 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
8882f081 563
b5762948
JG		 564 return 0;
565}
566
567static int mvs_task_prep_ssp(struct mvs_info *mvi,
20b09c29
AY		 568 struct mvs_task_exec_info *tei, int is_tmf,
569 struct mvs_tmf_task *tmf)
b5762948
JG		 570{
571 struct sas_task *task = tei->task;
b5762948 572 struct mvs_cmd_hdr *hdr = tei->hdr;
8f261aaf 573 struct mvs_port *port = tei->port;
20b09c29 574 struct domain_device *dev = task->dev;
f9da3be5 575 struct mvs_device *mvi_dev = dev->lldd_dev;
20b09c29 576 struct asd_sas_port *sas_port = dev->port;
b5762948 577 struct mvs_slot_info *slot;
20b09c29 578 void *buf_prd;
b5762948
JG		 579 struct ssp_frame_hdr *ssp_hdr;
580 void *buf_tmp;
581 u8 *buf_cmd, *buf_oaf, fburst = 0;
582 dma_addr_t buf_tmp_dma;
583 u32 flags;
8f261aaf
KW		 584 u32 resp_len, req_len, i, tag = tei->tag;
585 const u32 max_resp_len = SB_RFB_MAX;
20b09c29 586 u32 phy_mask;
b5762948
JG		 587
588 slot = &mvi->slot_info[tag];
589
20b09c29
AY		 590 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
591 sas_port->phy_mask) & TXQ_PHY_MASK;
592
8f261aaf
KW		 593 slot->tx = mvi->tx_prod;
594 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
595 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
4e52fc0a 596 (phy_mask << TXQ_PHY_SHIFT));
b5762948
JG		 597
598 flags = MCH_RETRY;
599 if (task->ssp_task.enable_first_burst) {
600 flags |= MCH_FBURST;
601 fburst = (1 << 7);
602 }
2b288133
AY		 603 if (is_tmf)
604 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
84fbd0ce
XY		 605 else
606 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
607
2b288133 608 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
b5762948
JG		 609 hdr->tags = cpu_to_le32(tag);
610 hdr->data_len = cpu_to_le32(task->total_xfer_len);
611
612 /*
613 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
614 */
b5762948 615
8f261aaf
KW		 616 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
617 buf_cmd = buf_tmp = slot->buf;
b5762948
JG		 618 buf_tmp_dma = slot->buf_dma;
619
620 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
621
622 buf_tmp += MVS_SSP_CMD_SZ;
623 buf_tmp_dma += MVS_SSP_CMD_SZ;
624
8f261aaf 625 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
b5762948
JG		 626 buf_oaf = buf_tmp;
627 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
628
629 buf_tmp += MVS_OAF_SZ;
630 buf_tmp_dma += MVS_OAF_SZ;
631
8f261aaf 632 /* region 3: PRD table ********************************************* */
b5762948 633 buf_prd = buf_tmp;
8f261aaf
KW		 634 if (tei->n_elem)
635 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
636 else
637 hdr->prd_tbl = 0;
b5762948 638
20b09c29 639 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
b5762948
JG		 640 buf_tmp += i;
641 buf_tmp_dma += i;
642
8f261aaf 643 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
b5762948
JG		 644 slot->response = buf_tmp;
645 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
20b09c29
AY		 646 if (mvi->flags & MVF_FLAG_SOC)
647 hdr->reserved[0] = 0;
b5762948 648
b5762948 649 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
8f261aaf
KW		 650 sizeof(struct mvs_err_info) - i;
651 resp_len = min(resp_len, max_resp_len);
652
653 req_len = sizeof(struct ssp_frame_hdr) + 28;
b5762948
JG		 654
655 /* request, response lengths */
656 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
657
658 /* generate open address frame hdr (first 12 bytes) */
20b09c29
AY		 659 /* initiator, SSP, ftype 1h */
660 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
6ceae7c6 661 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
20b09c29
AY		 662 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
663 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
b5762948 664
8f261aaf
KW		 665 /* fill in SSP frame header (Command Table.SSP frame header) */
666 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
20b09c29
AY		 667
668 if (is_tmf)
669 ssp_hdr->frame_type = SSP_TASK;
670 else
671 ssp_hdr->frame_type = SSP_COMMAND;
672
673 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
b5762948
JG		 674 HASHED_SAS_ADDR_SIZE);
675 memcpy(ssp_hdr->hashed_src_addr,
20b09c29 676 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
b5762948
JG		 677 ssp_hdr->tag = cpu_to_be16(tag);
678
20b09c29 679 /* fill in IU for TASK and Command Frame */
b5762948
JG		 680 buf_cmd += sizeof(*ssp_hdr);
681 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
b5762948 682
20b09c29
AY		 683 if (ssp_hdr->frame_type != SSP_TASK) {
684 buf_cmd[9] = fburst | task->ssp_task.task_attr |
685 (task->ssp_task.task_prio << 3);
686 memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16);
687 } else{
688 buf_cmd[10] = tmf->tmf;
689 switch (tmf->tmf) {
690 case TMF_ABORT_TASK:
691 case TMF_QUERY_TASK:
692 buf_cmd[12] =
693 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
694 buf_cmd[13] =
695 tmf->tag_of_task_to_be_managed & 0xff;
696 break;
697 default:
698 break;
699 }
b5762948 700 }
20b09c29
AY		 701 /* fill in PRD (scatter/gather) table, if any */
702 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
b5762948
JG		 703 return 0;
704}
705
aa9f8328 706#define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
0b15fb1f
XY		 707static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
708 struct mvs_tmf_task *tmf, int *pass)
b5762948 709{
8f261aaf 710 struct domain_device *dev = task->dev;
0b15fb1f 711 struct mvs_device *mvi_dev = dev->lldd_dev;
b5762948 712 struct mvs_task_exec_info tei;
4e52fc0a 713 struct mvs_slot_info *slot;
0b15fb1f
XY		 714 u32 tag = 0xdeadbeef, n_elem = 0;
715 int rc = 0;
b5762948 716
20b09c29 717 if (!dev->port) {
0b15fb1f 718 struct task_status_struct *tsm = &task->task_status;
20b09c29
AY		 719
720 tsm->resp = SAS_TASK_UNDELIVERED;
721 tsm->stat = SAS_PHY_DOWN;
0b15fb1f
XY		 722 /*
723 * libsas will use dev->port, should
724 * not call task_done for sata
725 */
aa9f8328 726 if (dev->dev_type != SAS_SATA_DEV)
0b15fb1f
XY		 727 task->task_done(task);
728 return rc;
20b09c29
AY		 729 }
730
0b15fb1f
XY		 731 if (DEV_IS_GONE(mvi_dev)) {
732 if (mvi_dev)
733 mv_dprintk("device %d not ready.\n",
734 mvi_dev->device_id);
735 else
736 mv_dprintk("device %016llx not ready.\n",
737 SAS_ADDR(dev->sas_addr));
20b09c29 738
57f20821
LB		 739 rc = SAS_PHY_DOWN;
740 return rc;
0b15fb1f
XY		 741 }
742 tei.port = dev->port->lldd_port;
743 if (tei.port && !tei.port->port_attached && !tmf) {
744 if (sas_protocol_ata(task->task_proto)) {
745 struct task_status_struct *ts = &task->task_status;
746 mv_dprintk("SATA/STP port %d does not attach"
747 "device.\n", dev->port->id);
748 ts->resp = SAS_TASK_COMPLETE;
749 ts->stat = SAS_PHY_DOWN;
20b09c29 750
0b15fb1f 751 task->task_done(task);
dd4969a8 752
dd4969a8 753 } else {
0b15fb1f
XY		 754 struct task_status_struct *ts = &task->task_status;
755 mv_dprintk("SAS port %d does not attach"
756 "device.\n", dev->port->id);
757 ts->resp = SAS_TASK_UNDELIVERED;
758 ts->stat = SAS_PHY_DOWN;
759 task->task_done(task);
dd4969a8 760 }
0b15fb1f
XY		 761 return rc;
762 }
dd4969a8 763
0b15fb1f
XY		 764 if (!sas_protocol_ata(task->task_proto)) {
765 if (task->num_scatter) {
766 n_elem = dma_map_sg(mvi->dev,
767 task->scatter,
768 task->num_scatter,
769 task->data_dir);
770 if (!n_elem) {
771 rc = -ENOMEM;
772 goto prep_out;
773 }
774 }
775 } else {
776 n_elem = task->num_scatter;
777 }
20b09c29 778
0b15fb1f
XY		 779 rc = mvs_tag_alloc(mvi, &tag);
780 if (rc)
781 goto err_out;
20b09c29 782
0b15fb1f 783 slot = &mvi->slot_info[tag];
20b09c29 784
0b15fb1f
XY		 785 task->lldd_task = NULL;
786 slot->n_elem = n_elem;
787 slot->slot_tag = tag;
788
789 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
790 if (!slot->buf)
791 goto err_out_tag;
792 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
793
794 tei.task = task;
795 tei.hdr = &mvi->slot[tag];
796 tei.tag = tag;
797 tei.n_elem = n_elem;
798 switch (task->task_proto) {
799 case SAS_PROTOCOL_SMP:
800 rc = mvs_task_prep_smp(mvi, &tei);
801 break;
802 case SAS_PROTOCOL_SSP:
803 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
804 break;
805 case SAS_PROTOCOL_SATA:
806 case SAS_PROTOCOL_STP:
807 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
808 rc = mvs_task_prep_ata(mvi, &tei);
809 break;
810 default:
811 dev_printk(KERN_ERR, mvi->dev,
812 "unknown sas_task proto: 0x%x\n",
813 task->task_proto);
814 rc = -EINVAL;
815 break;
816 }
dd4969a8 817
0b15fb1f
XY		 818 if (rc) {
819 mv_dprintk("rc is %x\n", rc);
820 goto err_out_slot_buf;
821 }
822 slot->task = task;
823 slot->port = tei.port;
824 task->lldd_task = slot;
825 list_add_tail(&slot->entry, &tei.port->list);
826 spin_lock(&task->task_state_lock);
827 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
828 spin_unlock(&task->task_state_lock);
829
0b15fb1f
XY		 830 mvi_dev->running_req++;
831 ++(*pass);
832 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
9dc9fd94 833
0b15fb1f 834 return rc;
dd4969a8 835
0b15fb1f
XY		 836err_out_slot_buf:
837 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
dd4969a8
JG		 838err_out_tag:
839 mvs_tag_free(mvi, tag);
840err_out:
20b09c29 841
0b15fb1f
XY		 842 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
843 if (!sas_protocol_ata(task->task_proto))
dd4969a8 844 if (n_elem)
0b15fb1f
XY		 845 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
846 task->data_dir);
847prep_out:
848 return rc;
849}
850
851static struct mvs_task_list *mvs_task_alloc_list(int *num, gfp_t gfp_flags)
852{
853 struct mvs_task_list *first = NULL;
854
855 for (; *num > 0; --*num) {
856 struct mvs_task_list *mvs_list = kmem_cache_zalloc(mvs_task_list_cache, gfp_flags);
857
858 if (!mvs_list)
859 break;
860
861 INIT_LIST_HEAD(&mvs_list->list);
862 if (!first)
863 first = mvs_list;
864 else
865 list_add_tail(&mvs_list->list, &first->list);
866
867 }
868
869 return first;
870}
871
872static inline void mvs_task_free_list(struct mvs_task_list *mvs_list)
873{
874 LIST_HEAD(list);
875 struct list_head *pos, *a;
876 struct mvs_task_list *mlist = NULL;
877
878 __list_add(&list, mvs_list->list.prev, &mvs_list->list);
879
880 list_for_each_safe(pos, a, &list) {
881 list_del_init(pos);
882 mlist = list_entry(pos, struct mvs_task_list, list);
883 kmem_cache_free(mvs_task_list_cache, mlist);
884 }
885}
886
887static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
888 struct completion *completion, int is_tmf,
889 struct mvs_tmf_task *tmf)
890{
0b15fb1f
XY		 891 struct mvs_info *mvi = NULL;
892 u32 rc = 0;
893 u32 pass = 0;
894 unsigned long flags = 0;
895
896 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
897
0b15fb1f
XY		 898 spin_lock_irqsave(&mvi->lock, flags);
899 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
900 if (rc)
901 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
902
903 if (likely(pass))
904 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
905 (MVS_CHIP_SLOT_SZ - 1));
0b84b709 906 spin_unlock_irqrestore(&mvi->lock, flags);
0b15fb1f 907
0b15fb1f
XY		 908 return rc;
909}
910
911static int mvs_collector_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
912 struct completion *completion, int is_tmf,
913 struct mvs_tmf_task *tmf)
914{
915 struct domain_device *dev = task->dev;
916 struct mvs_prv_info *mpi = dev->port->ha->lldd_ha;
917 struct mvs_info *mvi = NULL;
918 struct sas_task *t = task;
919 struct mvs_task_list *mvs_list = NULL, *a;
920 LIST_HEAD(q);
921 int pass[2] = {0};
922 u32 rc = 0;
923 u32 n = num;
924 unsigned long flags = 0;
925
926 mvs_list = mvs_task_alloc_list(&n, gfp_flags);
927 if (n) {
928 printk(KERN_ERR "%s: mvs alloc list failed.\n", __func__);
929 rc = -ENOMEM;
930 goto free_list;
931 }
932
933 __list_add(&q, mvs_list->list.prev, &mvs_list->list);
934
935 list_for_each_entry(a, &q, list) {
936 a->task = t;
937 t = list_entry(t->list.next, struct sas_task, list);
938 }
939
940 list_for_each_entry(a, &q , list) {
941
942 t = a->task;
943 mvi = ((struct mvs_device *)t->dev->lldd_dev)->mvi_info;
944
945 spin_lock_irqsave(&mvi->lock, flags);
946 rc = mvs_task_prep(t, mvi, is_tmf, tmf, &pass[mvi->id]);
947 if (rc)
948 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
949 spin_unlock_irqrestore(&mvi->lock, flags);
950 }
951
952 if (likely(pass[0]))
953 MVS_CHIP_DISP->start_delivery(mpi->mvi[0],
954 (mpi->mvi[0]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
955
956 if (likely(pass[1]))
957 MVS_CHIP_DISP->start_delivery(mpi->mvi[1],
958 (mpi->mvi[1]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
959
960 list_del_init(&q);
961
962free_list:
963 if (mvs_list)
964 mvs_task_free_list(mvs_list);
965
dd4969a8
JG		 966 return rc;
967}
968
20b09c29
AY		 969int mvs_queue_command(struct sas_task *task, const int num,
970 gfp_t gfp_flags)
971{
0b15fb1f
XY		 972 struct mvs_device *mvi_dev = task->dev->lldd_dev;
973 struct sas_ha_struct *sas = mvi_dev->mvi_info->sas;
974
975 if (sas->lldd_max_execute_num < 2)
976 return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL);
977 else
978 return mvs_collector_task_exec(task, num, gfp_flags, NULL, 0, NULL);
20b09c29
AY		 979}
980
dd4969a8
JG		 981static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
982{
983 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
984 mvs_tag_clear(mvi, slot_idx);
985}
986
987static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
988 struct mvs_slot_info *slot, u32 slot_idx)
989{
1dd69706
DM		 990 if (!slot)
991 return;
20b09c29
AY		 992 if (!slot->task)
993 return;
dd4969a8
JG		 994 if (!sas_protocol_ata(task->task_proto))
995 if (slot->n_elem)
20b09c29 996 dma_unmap_sg(mvi->dev, task->scatter,
dd4969a8
JG		 997 slot->n_elem, task->data_dir);
998
999 switch (task->task_proto) {
1000 case SAS_PROTOCOL_SMP:
20b09c29 1001 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
dd4969a8 1002 PCI_DMA_FROMDEVICE);
20b09c29 1003 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
dd4969a8
JG		 1004 PCI_DMA_TODEVICE);
1005 break;
1006
1007 case SAS_PROTOCOL_SATA:
1008 case SAS_PROTOCOL_STP:
1009 case SAS_PROTOCOL_SSP:
1010 default:
1011 /* do nothing */
1012 break;
1013 }
0b15fb1f
XY		 1014
1015 if (slot->buf) {
1016 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
1017 slot->buf = NULL;
1018 }
20b09c29 1019 list_del_init(&slot->entry);
dd4969a8
JG		 1020 task->lldd_task = NULL;
1021 slot->task = NULL;
1022 slot->port = NULL;
20b09c29
AY		 1023 slot->slot_tag = 0xFFFFFFFF;
1024 mvs_slot_free(mvi, slot_idx);
dd4969a8
JG		 1025}
1026
84fbd0ce 1027static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
dd4969a8 1028{
84fbd0ce 1029 struct mvs_phy *phy = &mvi->phy[phy_no];
dd4969a8
JG		 1030 struct mvs_port *port = phy->port;
1031 int j, no;
1032
20b09c29
AY		 1033 for_each_phy(port->wide_port_phymap, j, no) {
1034 if (j & 1) {
1035 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1036 PHYR_WIDE_PORT);
1037 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
dd4969a8
JG		 1038 port->wide_port_phymap);
1039 } else {
20b09c29
AY		 1040 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1041 PHYR_WIDE_PORT);
1042 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1043 0);
dd4969a8 1044 }
20b09c29 1045 }
dd4969a8
JG		 1046}
1047
1048static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1049{
1050 u32 tmp;
1051 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 1052 struct mvs_port *port = phy->port;
dd4969a8 1053
20b09c29 1054 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
dd4969a8
JG		 1055 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1056 if (!port)
1057 phy->phy_attached = 1;
1058 return tmp;
1059 }
1060
1061 if (port) {
1062 if (phy->phy_type & PORT_TYPE_SAS) {
1063 port->wide_port_phymap &= ~(1U << i);
1064 if (!port->wide_port_phymap)
1065 port->port_attached = 0;
1066 mvs_update_wideport(mvi, i);
1067 } else if (phy->phy_type & PORT_TYPE_SATA)
1068 port->port_attached = 0;
dd4969a8
JG		 1069 phy->port = NULL;
1070 phy->phy_attached = 0;
1071 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1072 }
1073 return 0;
1074}
1075
1076static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1077{
1078 u32 *s = (u32 *) buf;
1079
1080 if (!s)
1081 return NULL;
1082
20b09c29 1083 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
84fbd0ce 1084 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1085
20b09c29 1086 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
84fbd0ce 1087 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1088
20b09c29 1089 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
84fbd0ce 1090 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
dd4969a8 1091
20b09c29 1092 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
84fbd0ce 1093 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
20b09c29 1094
20b09c29
AY		 1095 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1096 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
dd4969a8 1097
f9da3be5 1098 return s;
dd4969a8
JG		 1099}
1100
1101static u32 mvs_is_sig_fis_received(u32 irq_status)
1102{
1103 return irq_status & PHYEV_SIG_FIS;
1104}
1105
8882f081
XY		 1106static void mvs_sig_remove_timer(struct mvs_phy *phy)
1107{
1108 if (phy->timer.function)
1109 del_timer(&phy->timer);
1110 phy->timer.function = NULL;
1111}
1112
20b09c29 1113void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
dd4969a8
JG		 1114{
1115 struct mvs_phy *phy = &mvi->phy[i];
20b09c29 1116 struct sas_identify_frame *id;
b5762948 1117
20b09c29 1118 id = (struct sas_identify_frame *)phy->frame_rcvd;
b5762948 1119
dd4969a8 1120 if (get_st) {
20b09c29 1121 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
dd4969a8
JG		 1122 phy->phy_status = mvs_is_phy_ready(mvi, i);
1123 }
8f261aaf 1124
dd4969a8 1125 if (phy->phy_status) {
20b09c29
AY		 1126 int oob_done = 0;
1127 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
b5762948 1128
20b09c29
AY		 1129 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1130
1131 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1132 if (phy->phy_type & PORT_TYPE_SATA) {
1133 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1134 if (mvs_is_sig_fis_received(phy->irq_status)) {
8882f081 1135 mvs_sig_remove_timer(phy);
20b09c29
AY		 1136 phy->phy_attached = 1;
1137 phy->att_dev_sas_addr =
1138 i + mvi->id * mvi->chip->n_phy;
1139 if (oob_done)
1140 sas_phy->oob_mode = SATA_OOB_MODE;
1141 phy->frame_rcvd_size =
1142 sizeof(struct dev_to_host_fis);
f9da3be5 1143 mvs_get_d2h_reg(mvi, i, id);
20b09c29
AY		 1144 } else {
1145 u32 tmp;
1146 dev_printk(KERN_DEBUG, mvi->dev,
1147 "Phy%d : No sig fis\n", i);
1148 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1149 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1150 tmp | PHYEV_SIG_FIS);
1151 phy->phy_attached = 0;
1152 phy->phy_type &= ~PORT_TYPE_SATA;
20b09c29
AY		 1153 goto out_done;
1154 }
9dc9fd94 1155 } else if (phy->phy_type & PORT_TYPE_SAS
20b09c29
AY		 1156 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1157 phy->phy_attached = 1;
dd4969a8 1158 phy->identify.device_type =
20b09c29 1159 phy->att_dev_info & PORT_DEV_TYPE_MASK;
b5762948 1160
aa9f8328 1161 if (phy->identify.device_type == SAS_END_DEVICE)
dd4969a8
JG		 1162 phy->identify.target_port_protocols =
1163 SAS_PROTOCOL_SSP;
aa9f8328 1164 else if (phy->identify.device_type != SAS_PHY_UNUSED)
dd4969a8
JG		 1165 phy->identify.target_port_protocols =
1166 SAS_PROTOCOL_SMP;
20b09c29 1167 if (oob_done)
dd4969a8
JG		 1168 sas_phy->oob_mode = SAS_OOB_MODE;
1169 phy->frame_rcvd_size =
1170 sizeof(struct sas_identify_frame);
dd4969a8 1171 }
20b09c29
AY		 1172 memcpy(sas_phy->attached_sas_addr,
1173 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
b5762948 1174
20b09c29
AY		 1175 if (MVS_CHIP_DISP->phy_work_around)
1176 MVS_CHIP_DISP->phy_work_around(mvi, i);
dd4969a8 1177 }
84fbd0ce 1178 mv_dprintk("phy %d attach dev info is %x\n",
20b09c29 1179 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
84fbd0ce 1180 mv_dprintk("phy %d attach sas addr is %llx\n",
20b09c29 1181 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
4e52fc0a 1182out_done:
dd4969a8 1183 if (get_st)
20b09c29 1184 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
b5762948
JG		 1185}
1186
20b09c29 1187static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
8f261aaf 1188{
dd4969a8 1189 struct sas_ha_struct *sas_ha = sas_phy->ha;
20b09c29 1190 struct mvs_info *mvi = NULL; int i = 0, hi;
dd4969a8 1191 struct mvs_phy *phy = sas_phy->lldd_phy;
20b09c29
AY		 1192 struct asd_sas_port *sas_port = sas_phy->port;
1193 struct mvs_port *port;
1194 unsigned long flags = 0;
1195 if (!sas_port)
1196 return;
8f261aaf 1197
20b09c29
AY		 1198 while (sas_ha->sas_phy[i]) {
1199 if (sas_ha->sas_phy[i] == sas_phy)
1200 break;
1201 i++;
1202 }
1203 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1204 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
84fbd0ce
XY		 1205 if (i >= mvi->chip->n_phy)
1206 port = &mvi->port[i - mvi->chip->n_phy];
20b09c29 1207 else
84fbd0ce 1208 port = &mvi->port[i];
20b09c29
AY		 1209 if (lock)
1210 spin_lock_irqsave(&mvi->lock, flags);
dd4969a8
JG		 1211 port->port_attached = 1;
1212 phy->port = port;
0b15fb1f 1213 sas_port->lldd_port = port;
dd4969a8
JG		 1214 if (phy->phy_type & PORT_TYPE_SAS) {
1215 port->wide_port_phymap = sas_port->phy_mask;
20b09c29 1216 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
dd4969a8 1217 mvs_update_wideport(mvi, sas_phy->id);
477f6d19
XY		 1218
1219 /* direct attached SAS device */
1220 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1221 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1222 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1223 }
8f261aaf 1224 }
20b09c29
AY		 1225 if (lock)
1226 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8
JG		 1227}
1228
20b09c29 1229static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
dd4969a8 1230{
9dc9fd94
S		 1231 struct domain_device *dev;
1232 struct mvs_phy *phy = sas_phy->lldd_phy;
1233 struct mvs_info *mvi = phy->mvi;
1234 struct asd_sas_port *port = sas_phy->port;
1235 int phy_no = 0;
1236
1237 while (phy != &mvi->phy[phy_no]) {
1238 phy_no++;
1239 if (phy_no >= MVS_MAX_PHYS)
1240 return;
1241 }
1242 list_for_each_entry(dev, &port->dev_list, dev_list_node)
84fbd0ce 1243 mvs_do_release_task(phy->mvi, phy_no, dev);
9dc9fd94 1244
dd4969a8
JG		 1245}
1246
dd4969a8 1247
20b09c29
AY		 1248void mvs_port_formed(struct asd_sas_phy *sas_phy)
1249{
1250 mvs_port_notify_formed(sas_phy, 1);
dd4969a8
JG		 1251}
1252
20b09c29 1253void mvs_port_deformed(struct asd_sas_phy *sas_phy)
dd4969a8 1254{
20b09c29
AY		 1255 mvs_port_notify_deformed(sas_phy, 1);
1256}
8f261aaf 1257
20b09c29
AY		 1258struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1259{
1260 u32 dev;
1261 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
aa9f8328 1262 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
20b09c29
AY		 1263 mvi->devices[dev].device_id = dev;
1264 return &mvi->devices[dev];
1265 }
8f261aaf 1266 }
8121ed42 1267
20b09c29
AY		 1268 if (dev == MVS_MAX_DEVICES)
1269 mv_printk("max support %d devices, ignore ..\n",
1270 MVS_MAX_DEVICES);
1271
1272 return NULL;
8f261aaf
KW		 1273}
1274
20b09c29 1275void mvs_free_dev(struct mvs_device *mvi_dev)
b5762948 1276{
20b09c29
AY		 1277 u32 id = mvi_dev->device_id;
1278 memset(mvi_dev, 0, sizeof(*mvi_dev));
1279 mvi_dev->device_id = id;
aa9f8328 1280 mvi_dev->dev_type = SAS_PHY_UNUSED;
20b09c29
AY		 1281 mvi_dev->dev_status = MVS_DEV_NORMAL;
1282 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1283}
b5762948 1284
20b09c29
AY		 1285int mvs_dev_found_notify(struct domain_device *dev, int lock)
1286{
1287 unsigned long flags = 0;
1288 int res = 0;
1289 struct mvs_info *mvi = NULL;
1290 struct domain_device *parent_dev = dev->parent;
1291 struct mvs_device *mvi_device;
b5762948 1292
20b09c29 1293 mvi = mvs_find_dev_mvi(dev);
b5762948 1294
20b09c29
AY		 1295 if (lock)
1296 spin_lock_irqsave(&mvi->lock, flags);
1297
1298 mvi_device = mvs_alloc_dev(mvi);
1299 if (!mvi_device) {
1300 res = -1;
1301 goto found_out;
b5762948 1302 }
f9da3be5 1303 dev->lldd_dev = mvi_device;
9dc9fd94 1304 mvi_device->dev_status = MVS_DEV_NORMAL;
20b09c29 1305 mvi_device->dev_type = dev->dev_type;
9870d9a2 1306 mvi_device->mvi_info = mvi;
84fbd0ce 1307 mvi_device->sas_device = dev;
20b09c29
AY		 1308 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1309 int phy_id;
1310 u8 phy_num = parent_dev->ex_dev.num_phys;
1311 struct ex_phy *phy;
1312 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1313 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1314 if (SAS_ADDR(phy->attached_sas_addr) ==
1315 SAS_ADDR(dev->sas_addr)) {
1316 mvi_device->attached_phy = phy_id;
1317 break;
1318 }
1319 }
b5762948 1320
20b09c29
AY		 1321 if (phy_id == phy_num) {
1322 mv_printk("Error: no attached dev:%016llx"
1323 "at ex:%016llx.\n",
1324 SAS_ADDR(dev->sas_addr),
1325 SAS_ADDR(parent_dev->sas_addr));
1326 res = -1;
1327 }
dd4969a8 1328 }
b5762948 1329
20b09c29
AY		 1330found_out:
1331 if (lock)
1332 spin_unlock_irqrestore(&mvi->lock, flags);
1333 return res;
1334}
b5762948 1335
20b09c29
AY		 1336int mvs_dev_found(struct domain_device *dev)
1337{
1338 return mvs_dev_found_notify(dev, 1);
1339}
b5762948 1340
9dc9fd94 1341void mvs_dev_gone_notify(struct domain_device *dev)
20b09c29
AY		 1342{
1343 unsigned long flags = 0;
f9da3be5 1344 struct mvs_device *mvi_dev = dev->lldd_dev;
9870d9a2 1345 struct mvs_info *mvi = mvi_dev->mvi_info;
b5762948 1346
9dc9fd94 1347 spin_lock_irqsave(&mvi->lock, flags);
b5762948 1348
20b09c29
AY		 1349 if (mvi_dev) {
1350 mv_dprintk("found dev[%d:%x] is gone.\n",
1351 mvi_dev->device_id, mvi_dev->dev_type);
9dc9fd94 1352 mvs_release_task(mvi, dev);
20b09c29
AY		 1353 mvs_free_reg_set(mvi, mvi_dev);
1354 mvs_free_dev(mvi_dev);
1355 } else {
1356 mv_dprintk("found dev has gone.\n");
b5762948 1357 }
20b09c29 1358 dev->lldd_dev = NULL;
84fbd0ce 1359 mvi_dev->sas_device = NULL;
b5762948 1360
9dc9fd94 1361 spin_unlock_irqrestore(&mvi->lock, flags);
b5762948
JG		 1362}
1363
b5762948 1364
20b09c29
AY		 1365void mvs_dev_gone(struct domain_device *dev)
1366{
9dc9fd94 1367 mvs_dev_gone_notify(dev);
20b09c29 1368}
b5762948 1369
20b09c29
AY		 1370static void mvs_task_done(struct sas_task *task)
1371{
f0bf750c 1372 if (!del_timer(&task->slow_task->timer))
20b09c29 1373 return;
f0bf750c 1374 complete(&task->slow_task->completion);
b5762948 1375}
b5762948 1376
20b09c29 1377static void mvs_tmf_timedout(unsigned long data)
b5762948 1378{
20b09c29 1379 struct sas_task *task = (struct sas_task *)data;
8f261aaf 1380
20b09c29 1381 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
f0bf750c 1382 complete(&task->slow_task->completion);
20b09c29 1383}
8f261aaf 1384
20b09c29
AY		 1385#define MVS_TASK_TIMEOUT 20
1386static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1387 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1388{
1389 int res, retry;
1390 struct sas_task *task = NULL;
8f261aaf 1391
20b09c29 1392 for (retry = 0; retry < 3; retry++) {
f0bf750c 1393 task = sas_alloc_slow_task(GFP_KERNEL);
20b09c29
AY		 1394 if (!task)
1395 return -ENOMEM;
8f261aaf 1396
20b09c29
AY		 1397 task->dev = dev;
1398 task->task_proto = dev->tproto;
8f261aaf 1399
20b09c29
AY		 1400 memcpy(&task->ssp_task, parameter, para_len);
1401 task->task_done = mvs_task_done;
8f261aaf 1402
f0bf750c
DW		 1403 task->slow_task->timer.data = (unsigned long) task;
1404 task->slow_task->timer.function = mvs_tmf_timedout;
1405 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1406 add_timer(&task->slow_task->timer);
8f261aaf 1407
0b84b709 1408 res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf);
8f261aaf 1409
20b09c29 1410 if (res) {
f0bf750c 1411 del_timer(&task->slow_task->timer);
20b09c29
AY		 1412 mv_printk("executing internel task failed:%d\n", res);
1413 goto ex_err;
1414 }
8f261aaf 1415
f0bf750c 1416 wait_for_completion(&task->slow_task->completion);
84fbd0ce 1417 res = TMF_RESP_FUNC_FAILED;
20b09c29
AY		 1418 /* Even TMF timed out, return direct. */
1419 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1420 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1421 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1422 goto ex_err;
1423 }
1424 }
8f261aaf 1425
20b09c29 1426 if (task->task_status.resp == SAS_TASK_COMPLETE &&
df64d3ca 1427 task->task_status.stat == SAM_STAT_GOOD) {
20b09c29
AY		 1428 res = TMF_RESP_FUNC_COMPLETE;
1429 break;
1430 }
b5762948 1431
20b09c29
AY		 1432 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1433 task->task_status.stat == SAS_DATA_UNDERRUN) {
1434 /* no error, but return the number of bytes of
1435 * underrun */
1436 res = task->task_status.residual;
1437 break;
1438 }
b5762948 1439
20b09c29
AY		 1440 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1441 task->task_status.stat == SAS_DATA_OVERRUN) {
1442 mv_dprintk("blocked task error.\n");
1443 res = -EMSGSIZE;
1444 break;
1445 } else {
1446 mv_dprintk(" task to dev %016llx response: 0x%x "
1447 "status 0x%x\n",
1448 SAS_ADDR(dev->sas_addr),
1449 task->task_status.resp,
1450 task->task_status.stat);
4fcf812c 1451 sas_free_task(task);
20b09c29 1452 task = NULL;
b5762948 1453
dd4969a8 1454 }
dd4969a8 1455 }
20b09c29
AY		 1456ex_err:
1457 BUG_ON(retry == 3 && task != NULL);
4fcf812c 1458 sas_free_task(task);
20b09c29 1459 return res;
dd4969a8 1460}
b5762948 1461
20b09c29
AY		 1462static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1463 u8 *lun, struct mvs_tmf_task *tmf)
dd4969a8 1464{
20b09c29 1465 struct sas_ssp_task ssp_task;
20b09c29
AY		 1466 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1467 return TMF_RESP_FUNC_ESUPP;
b5762948 1468
84fbd0ce 1469 memcpy(ssp_task.LUN, lun, 8);
b5762948 1470
20b09c29
AY		 1471 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1472 sizeof(ssp_task), tmf);
1473}
8f261aaf 1474
8f261aaf 1475
20b09c29
AY		 1476/* Standard mandates link reset for ATA (type 0)
1477 and hard reset for SSP (type 1) , only for RECOVERY */
1478static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1479{
1480 int rc;
f41a0c44 1481 struct sas_phy *phy = sas_get_local_phy(dev);
aa9f8328 1482 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
20b09c29
AY		 1483 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1484 rc = sas_phy_reset(phy, reset_type);
f41a0c44 1485 sas_put_local_phy(phy);
20b09c29
AY		 1486 msleep(2000);
1487 return rc;
1488}
8f261aaf 1489
20b09c29
AY		 1490/* mandatory SAM-3 */
1491int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1492{
1493 unsigned long flags;
84fbd0ce 1494 int rc = TMF_RESP_FUNC_FAILED;
20b09c29 1495 struct mvs_tmf_task tmf_task;
f9da3be5 1496 struct mvs_device * mvi_dev = dev->lldd_dev;
9870d9a2 1497 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1498
1499 tmf_task.tmf = TMF_LU_RESET;
1500 mvi_dev->dev_status = MVS_DEV_EH;
1501 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1502 if (rc == TMF_RESP_FUNC_COMPLETE) {
20b09c29 1503 spin_lock_irqsave(&mvi->lock, flags);
84fbd0ce 1504 mvs_release_task(mvi, dev);
20b09c29 1505 spin_unlock_irqrestore(&mvi->lock, flags);
dd4969a8 1506 }
20b09c29
AY		 1507 /* If failed, fall-through I_T_Nexus reset */
1508 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1509 mvi_dev->device_id, rc);
1510 return rc;
1511}
8f261aaf 1512
20b09c29
AY		 1513int mvs_I_T_nexus_reset(struct domain_device *dev)
1514{
1515 unsigned long flags;
9dc9fd94
S		 1516 int rc = TMF_RESP_FUNC_FAILED;
1517 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
9870d9a2 1518 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1519
1520 if (mvi_dev->dev_status != MVS_DEV_EH)
1521 return TMF_RESP_FUNC_COMPLETE;
84fbd0ce
XY		 1522 else
1523 mvi_dev->dev_status = MVS_DEV_NORMAL;
20b09c29
AY		 1524 rc = mvs_debug_I_T_nexus_reset(dev);
1525 mv_printk("%s for device[%x]:rc= %d\n",
1526 __func__, mvi_dev->device_id, rc);
1527
20b09c29 1528 spin_lock_irqsave(&mvi->lock, flags);
9dc9fd94 1529 mvs_release_task(mvi, dev);
20b09c29
AY		 1530 spin_unlock_irqrestore(&mvi->lock, flags);
1531
1532 return rc;
1533}
1534/* optional SAM-3 */
1535int mvs_query_task(struct sas_task *task)
1536{
1537 u32 tag;
1538 struct scsi_lun lun;
1539 struct mvs_tmf_task tmf_task;
1540 int rc = TMF_RESP_FUNC_FAILED;
1541
1542 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1543 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1544 struct domain_device *dev = task->dev;
9870d9a2
AY		 1545 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1546 struct mvs_info *mvi = mvi_dev->mvi_info;
20b09c29
AY		 1547
1548 int_to_scsilun(cmnd->device->lun, &lun);
1549 rc = mvs_find_tag(mvi, task, &tag);
1550 if (rc == 0) {
1551 rc = TMF_RESP_FUNC_FAILED;
dd4969a8 1552 return rc;
20b09c29 1553 }
8f261aaf 1554
20b09c29
AY		 1555 tmf_task.tmf = TMF_QUERY_TASK;
1556 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1557
20b09c29
AY		 1558 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1559 switch (rc) {
1560 /* The task is still in Lun, release it then */
1561 case TMF_RESP_FUNC_SUCC:
1562 /* The task is not in Lun or failed, reset the phy */
1563 case TMF_RESP_FUNC_FAILED:
1564 case TMF_RESP_FUNC_COMPLETE:
1565 break;
1566 }
dd4969a8 1567 }
20b09c29
AY		 1568 mv_printk("%s:rc= %d\n", __func__, rc);
1569 return rc;
8f261aaf
KW		 1570}
1571
20b09c29
AY		 1572/* mandatory SAM-3, still need free task/slot info */
1573int mvs_abort_task(struct sas_task *task)
8f261aaf 1574{
20b09c29
AY		 1575 struct scsi_lun lun;
1576 struct mvs_tmf_task tmf_task;
1577 struct domain_device *dev = task->dev;
9870d9a2 1578 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
24ae163e 1579 struct mvs_info *mvi;
20b09c29
AY		 1580 int rc = TMF_RESP_FUNC_FAILED;
1581 unsigned long flags;
1582 u32 tag;
9870d9a2 1583
9dc9fd94 1584 if (!mvi_dev) {
84fbd0ce
XY		 1585 mv_printk("Device has removed\n");
1586 return TMF_RESP_FUNC_FAILED;
9dc9fd94
S		 1587 }
1588
24ae163e
JS		 1589 mvi = mvi_dev->mvi_info;
1590
20b09c29
AY		 1591 spin_lock_irqsave(&task->task_state_lock, flags);
1592 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1593 spin_unlock_irqrestore(&task->task_state_lock, flags);
1594 rc = TMF_RESP_FUNC_COMPLETE;
1595 goto out;
dd4969a8 1596 }
20b09c29 1597 spin_unlock_irqrestore(&task->task_state_lock, flags);
9dc9fd94 1598 mvi_dev->dev_status = MVS_DEV_EH;
20b09c29
AY		 1599 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1600 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1601
1602 int_to_scsilun(cmnd->device->lun, &lun);
1603 rc = mvs_find_tag(mvi, task, &tag);
1604 if (rc == 0) {
1605 mv_printk("No such tag in %s\n", __func__);
1606 rc = TMF_RESP_FUNC_FAILED;
1607 return rc;
1608 }
8f261aaf 1609
20b09c29
AY		 1610 tmf_task.tmf = TMF_ABORT_TASK;
1611 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
8f261aaf 1612
20b09c29 1613 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
8f261aaf 1614
20b09c29
AY		 1615 /* if successful, clear the task and callback forwards.*/
1616 if (rc == TMF_RESP_FUNC_COMPLETE) {
1617 u32 slot_no;
1618 struct mvs_slot_info *slot;
8f261aaf 1619
20b09c29 1620 if (task->lldd_task) {
f9da3be5 1621 slot = task->lldd_task;
20b09c29 1622 slot_no = (u32) (slot - mvi->slot_info);
9dc9fd94 1623 spin_lock_irqsave(&mvi->lock, flags);
20b09c29 1624 mvs_slot_complete(mvi, slot_no, 1);
9dc9fd94 1625 spin_unlock_irqrestore(&mvi->lock, flags);
20b09c29
AY		 1626 }
1627 }
9dc9fd94 1628
20b09c29
AY		 1629 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1630 task->task_proto & SAS_PROTOCOL_STP) {
aa9f8328 1631 if (SAS_SATA_DEV == dev->dev_type) {
9dc9fd94 1632 struct mvs_slot_info *slot = task->lldd_task;
9dc9fd94 1633 u32 slot_idx = (u32)(slot - mvi->slot_info);
84fbd0ce 1634 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
9dc9fd94
S		 1635 "slot=%p slot_idx=x%x\n",
1636 mvi, task, slot, slot_idx);
95ab0003 1637 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
9dc9fd94 1638 mvs_slot_task_free(mvi, task, slot, slot_idx);
84fbd0ce
XY		 1639 rc = TMF_RESP_FUNC_COMPLETE;
1640 goto out;
9dc9fd94 1641 }
8f261aaf 1642
20b09c29
AY		 1643 }
1644out:
1645 if (rc != TMF_RESP_FUNC_COMPLETE)
1646 mv_printk("%s:rc= %d\n", __func__, rc);
dd4969a8 1647 return rc;
8f261aaf
KW		 1648}
1649
20b09c29 1650int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
8f261aaf 1651{
20b09c29
AY		 1652 int rc = TMF_RESP_FUNC_FAILED;
1653 struct mvs_tmf_task tmf_task;
8f261aaf 1654
20b09c29
AY		 1655 tmf_task.tmf = TMF_ABORT_TASK_SET;
1656 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
dd4969a8 1657
20b09c29 1658 return rc;
8f261aaf
KW		 1659}
1660
20b09c29 1661int mvs_clear_aca(struct domain_device *dev, u8 *lun)
8f261aaf 1662{
20b09c29
AY		 1663 int rc = TMF_RESP_FUNC_FAILED;
1664 struct mvs_tmf_task tmf_task;
8f261aaf 1665
20b09c29
AY		 1666 tmf_task.tmf = TMF_CLEAR_ACA;
1667 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1668
20b09c29
AY		 1669 return rc;
1670}
8f261aaf 1671
20b09c29
AY		 1672int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1673{
1674 int rc = TMF_RESP_FUNC_FAILED;
1675 struct mvs_tmf_task tmf_task;
8f261aaf 1676
20b09c29
AY		 1677 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1678 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
8f261aaf 1679
20b09c29 1680 return rc;
dd4969a8 1681}
8f261aaf 1682
20b09c29
AY		 1683static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1684 u32 slot_idx, int err)
dd4969a8 1685{
f9da3be5 1686 struct mvs_device *mvi_dev = task->dev->lldd_dev;
20b09c29
AY		 1687 struct task_status_struct *tstat = &task->task_status;
1688 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
df64d3ca 1689 int stat = SAM_STAT_GOOD;
e9ff91b6 1690
8f261aaf 1691
20b09c29
AY		 1692 resp->frame_len = sizeof(struct dev_to_host_fis);
1693 memcpy(&resp->ending_fis[0],
1694 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1695 sizeof(struct dev_to_host_fis));
1696 tstat->buf_valid_size = sizeof(*resp);
9dc9fd94
S		 1697 if (unlikely(err)) {
1698 if (unlikely(err & CMD_ISS_STPD))
1699 stat = SAS_OPEN_REJECT;
1700 else
1701 stat = SAS_PROTO_RESPONSE;
1702 }
1703
20b09c29 1704 return stat;
8f261aaf
KW		 1705}
1706
a4632aae
XY		 1707void mvs_set_sense(u8 *buffer, int len, int d_sense,
1708 int key, int asc, int ascq)
1709{
1710 memset(buffer, 0, len);
1711
1712 if (d_sense) {
1713 /* Descriptor format */
1714 if (len < 4) {
1715 mv_printk("Length %d of sense buffer too small to "
1716 "fit sense %x:%x:%x", len, key, asc, ascq);
1717 }
1718
1719 buffer[0] = 0x72; /* Response Code */
1720 if (len > 1)
1721 buffer[1] = key; /* Sense Key */
1722 if (len > 2)
1723 buffer[2] = asc; /* ASC */
1724 if (len > 3)
1725 buffer[3] = ascq; /* ASCQ */
1726 } else {
1727 if (len < 14) {
1728 mv_printk("Length %d of sense buffer too small to "
1729 "fit sense %x:%x:%x", len, key, asc, ascq);
1730 }
1731
1732 buffer[0] = 0x70; /* Response Code */
1733 if (len > 2)
1734 buffer[2] = key; /* Sense Key */
1735 if (len > 7)
1736 buffer[7] = 0x0a; /* Additional Sense Length */
1737 if (len > 12)
1738 buffer[12] = asc; /* ASC */
1739 if (len > 13)
1740 buffer[13] = ascq; /* ASCQ */
1741 }
1742
1743 return;
1744}
1745
1746void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1747 u8 key, u8 asc, u8 asc_q)
1748{
1749 iu->datapres = 2;
1750 iu->response_data_len = 0;
1751 iu->sense_data_len = 17;
1752 iu->status = 02;
1753 mvs_set_sense(iu->sense_data, 17, 0,
1754 key, asc, asc_q);
1755}
1756
20b09c29
AY		 1757static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1758 u32 slot_idx)
8f261aaf 1759{
20b09c29
AY		 1760 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1761 int stat;
84fbd0ce 1762 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
a4632aae 1763 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
20b09c29
AY		 1764 u32 tfs = 0;
1765 enum mvs_port_type type = PORT_TYPE_SAS;
8f261aaf 1766
20b09c29
AY		 1767 if (err_dw0 & CMD_ISS_STPD)
1768 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1769
1770 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1771
df64d3ca 1772 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1773 switch (task->task_proto) {
dd4969a8 1774 case SAS_PROTOCOL_SSP:
a4632aae 1775 {
20b09c29 1776 stat = SAS_ABORTED_TASK;
a4632aae
XY		 1777 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1778 struct ssp_response_iu *iu = slot->response +
1779 sizeof(struct mvs_err_info);
1780 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1781 sas_ssp_task_response(mvi->dev, task, iu);
1782 stat = SAM_STAT_CHECK_CONDITION;
1783 }
1784 if (err_dw1 & bit(31))
1785 mv_printk("reuse same slot, retry command.\n");
20b09c29 1786 break;
a4632aae 1787 }
20b09c29 1788 case SAS_PROTOCOL_SMP:
df64d3ca 1789 stat = SAM_STAT_CHECK_CONDITION;
dd4969a8 1790 break;
20b09c29 1791
dd4969a8
JG		 1792 case SAS_PROTOCOL_SATA:
1793 case SAS_PROTOCOL_STP:
20b09c29
AY		 1794 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1795 {
20b09c29 1796 task->ata_task.use_ncq = 0;
84fbd0ce 1797 stat = SAS_PROTO_RESPONSE;
9dc9fd94 1798 mvs_sata_done(mvi, task, slot_idx, err_dw0);
dd4969a8 1799 }
20b09c29 1800 break;
dd4969a8
JG		 1801 default:
1802 break;
1803 }
1804
20b09c29 1805 return stat;
e9ff91b6
KW		 1806}
1807
20b09c29 1808int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
b5762948 1809{
20b09c29
AY		 1810 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1811 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1812 struct sas_task *task = slot->task;
1813 struct mvs_device *mvi_dev = NULL;
1814 struct task_status_struct *tstat;
9dc9fd94
S		 1815 struct domain_device *dev;
1816 u32 aborted;
20b09c29 1817
20b09c29
AY		 1818 void *to;
1819 enum exec_status sts;
1820
9dc9fd94 1821 if (unlikely(!task || !task->lldd_task || !task->dev))
20b09c29
AY		 1822 return -1;
1823
1824 tstat = &task->task_status;
9dc9fd94
S		 1825 dev = task->dev;
1826 mvi_dev = dev->lldd_dev;
b5762948 1827
20b09c29
AY		 1828 spin_lock(&task->task_state_lock);
1829 task->task_state_flags &=
1830 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1831 task->task_state_flags |= SAS_TASK_STATE_DONE;
1832 /* race condition*/
1833 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1834 spin_unlock(&task->task_state_lock);
1835
1836 memset(tstat, 0, sizeof(*tstat));
1837 tstat->resp = SAS_TASK_COMPLETE;
1838
1839 if (unlikely(aborted)) {
1840 tstat->stat = SAS_ABORTED_TASK;
9dc9fd94
S		 1841 if (mvi_dev && mvi_dev->running_req)
1842 mvi_dev->running_req--;
20b09c29
AY		 1843 if (sas_protocol_ata(task->task_proto))
1844 mvs_free_reg_set(mvi, mvi_dev);
1845
1846 mvs_slot_task_free(mvi, task, slot, slot_idx);
1847 return -1;
b5762948
JG		 1848 }
1849
e144f7ef 1850 /* when no device attaching, go ahead and complete by error handling*/
9dc9fd94
S		 1851 if (unlikely(!mvi_dev || flags)) {
1852 if (!mvi_dev)
1853 mv_dprintk("port has not device.\n");
20b09c29
AY		 1854 tstat->stat = SAS_PHY_DOWN;
1855 goto out;
1856 }
b5762948 1857
20b09c29
AY		 1858 /* error info record present */
1859 if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) {
84fbd0ce
XY		 1860 mv_dprintk("port %d slot %d rx_desc %X has error info"
1861 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1862 rx_desc, (u64)(*(u64 *)slot->response));
20b09c29 1863 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
9dc9fd94 1864 tstat->resp = SAS_TASK_COMPLETE;
20b09c29 1865 goto out;
b5762948
JG		 1866 }
1867
20b09c29
AY		 1868 switch (task->task_proto) {
1869 case SAS_PROTOCOL_SSP:
1870 /* hw says status == 0, datapres == 0 */
1871 if (rx_desc & RXQ_GOOD) {
df64d3ca 1872 tstat->stat = SAM_STAT_GOOD;
20b09c29
AY		 1873 tstat->resp = SAS_TASK_COMPLETE;
1874 }
1875 /* response frame present */
1876 else if (rx_desc & RXQ_RSP) {
1877 struct ssp_response_iu *iu = slot->response +
1878 sizeof(struct mvs_err_info);
1879 sas_ssp_task_response(mvi->dev, task, iu);
1880 } else
df64d3ca 1881 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29 1882 break;
b5762948 1883
20b09c29
AY		 1884 case SAS_PROTOCOL_SMP: {
1885 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
df64d3ca 1886 tstat->stat = SAM_STAT_GOOD;
77dfce07 1887 to = kmap_atomic(sg_page(sg_resp));
20b09c29
AY		 1888 memcpy(to + sg_resp->offset,
1889 slot->response + sizeof(struct mvs_err_info),
1890 sg_dma_len(sg_resp));
77dfce07 1891 kunmap_atomic(to);
20b09c29
AY		 1892 break;
1893 }
8f261aaf 1894
20b09c29
AY		 1895 case SAS_PROTOCOL_SATA:
1896 case SAS_PROTOCOL_STP:
1897 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1898 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1899 break;
1900 }
b5762948 1901
20b09c29 1902 default:
df64d3ca 1903 tstat->stat = SAM_STAT_CHECK_CONDITION;
20b09c29
AY		 1904 break;
1905 }
9dc9fd94
S		 1906 if (!slot->port->port_attached) {
1907 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1908 tstat->stat = SAS_PHY_DOWN;
1909 }
1910
b5762948 1911
20b09c29 1912out:
9dc9fd94
S		 1913 if (mvi_dev && mvi_dev->running_req) {
1914 mvi_dev->running_req--;
1915 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
0f980a87
AY		 1916 mvs_free_reg_set(mvi, mvi_dev);
1917 }
20b09c29
AY		 1918 mvs_slot_task_free(mvi, task, slot, slot_idx);
1919 sts = tstat->stat;
8f261aaf 1920
20b09c29
AY		 1921 spin_unlock(&mvi->lock);
1922 if (task->task_done)
1923 task->task_done(task);
84fbd0ce 1924
20b09c29 1925 spin_lock(&mvi->lock);
b5762948 1926
20b09c29
AY		 1927 return sts;
1928}
b5762948 1929
9dc9fd94 1930void mvs_do_release_task(struct mvs_info *mvi,
20b09c29
AY		 1931 int phy_no, struct domain_device *dev)
1932{
9dc9fd94 1933 u32 slot_idx;
20b09c29
AY		 1934 struct mvs_phy *phy;
1935 struct mvs_port *port;
1936 struct mvs_slot_info *slot, *slot2;
b5762948 1937
20b09c29
AY		 1938 phy = &mvi->phy[phy_no];
1939 port = phy->port;
1940 if (!port)
1941 return;
9dc9fd94
S		 1942 /* clean cmpl queue in case request is already finished */
1943 mvs_int_rx(mvi, false);
1944
1945
b5762948 1946
20b09c29
AY		 1947 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1948 struct sas_task *task;
1949 slot_idx = (u32) (slot - mvi->slot_info);
1950 task = slot->task;
b5762948 1951
20b09c29
AY		 1952 if (dev && task->dev != dev)
1953 continue;
8f261aaf 1954
20b09c29
AY		 1955 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1956 slot_idx, slot->slot_tag, task);
9dc9fd94 1957 MVS_CHIP_DISP->command_active(mvi, slot_idx);
b5762948 1958
20b09c29 1959 mvs_slot_complete(mvi, slot_idx, 1);
b5762948 1960 }
20b09c29 1961}
b5762948 1962
9dc9fd94
S		 1963void mvs_release_task(struct mvs_info *mvi,
1964 struct domain_device *dev)
1965{
1966 int i, phyno[WIDE_PORT_MAX_PHY], num;
9dc9fd94
S		 1967 num = mvs_find_dev_phyno(dev, phyno);
1968 for (i = 0; i < num; i++)
1969 mvs_do_release_task(mvi, phyno[i], dev);
1970}
1971
20b09c29
AY		 1972static void mvs_phy_disconnected(struct mvs_phy *phy)
1973{
1974 phy->phy_attached = 0;
1975 phy->att_dev_info = 0;
1976 phy->att_dev_sas_addr = 0;
1977}
1978
1979static void mvs_work_queue(struct work_struct *work)
1980{
1981 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1982 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1983 struct mvs_info *mvi = mwq->mvi;
1984 unsigned long flags;
a4632aae
XY		 1985 u32 phy_no = (unsigned long) mwq->data;
1986 struct sas_ha_struct *sas_ha = mvi->sas;
1987 struct mvs_phy *phy = &mvi->phy[phy_no];
1988 struct asd_sas_phy *sas_phy = &phy->sas_phy;
b5762948 1989
20b09c29
AY		 1990 spin_lock_irqsave(&mvi->lock, flags);
1991 if (mwq->handler & PHY_PLUG_EVENT) {
20b09c29
AY		 1992
1993 if (phy->phy_event & PHY_PLUG_OUT) {
1994 u32 tmp;
1995 struct sas_identify_frame *id;
1996 id = (struct sas_identify_frame *)phy->frame_rcvd;
1997 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1998 phy->phy_event &= ~PHY_PLUG_OUT;
1999 if (!(tmp & PHY_READY_MASK)) {
2000 sas_phy_disconnected(sas_phy);
2001 mvs_phy_disconnected(phy);
2002 sas_ha->notify_phy_event(sas_phy,
2003 PHYE_LOSS_OF_SIGNAL);
2004 mv_dprintk("phy%d Removed Device\n", phy_no);
2005 } else {
2006 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2007 mvs_update_phyinfo(mvi, phy_no, 1);
2008 mvs_bytes_dmaed(mvi, phy_no);
2009 mvs_port_notify_formed(sas_phy, 0);
2010 mv_dprintk("phy%d Attached Device\n", phy_no);
2011 }
2012 }
a4632aae
XY		 2013 } else if (mwq->handler & EXP_BRCT_CHG) {
2014 phy->phy_event &= ~EXP_BRCT_CHG;
2015 sas_ha->notify_port_event(sas_phy,
2016 PORTE_BROADCAST_RCVD);
2017 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
20b09c29
AY		 2018 }
2019 list_del(&mwq->entry);
2020 spin_unlock_irqrestore(&mvi->lock, flags);
2021 kfree(mwq);
2022}
8f261aaf 2023
20b09c29
AY		 2024static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
2025{
2026 struct mvs_wq *mwq;
2027 int ret = 0;
2028
2029 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
2030 if (mwq) {
2031 mwq->mvi = mvi;
2032 mwq->data = data;
2033 mwq->handler = handler;
2034 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
2035 list_add_tail(&mwq->entry, &mvi->wq_list);
2036 schedule_delayed_work(&mwq->work_q, HZ * 2);
2037 } else
2038 ret = -ENOMEM;
2039
2040 return ret;
2041}
b5762948 2042
20b09c29
AY		 2043static void mvs_sig_time_out(unsigned long tphy)
2044{
2045 struct mvs_phy *phy = (struct mvs_phy *)tphy;
2046 struct mvs_info *mvi = phy->mvi;
2047 u8 phy_no;
2048
2049 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2050 if (&mvi->phy[phy_no] == phy) {
2051 mv_dprintk("Get signature time out, reset phy %d\n",
2052 phy_no+mvi->id*mvi->chip->n_phy);
a4632aae 2053 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
20b09c29 2054 }
b5762948 2055 }
20b09c29 2056}
b5762948 2057
20b09c29
AY		 2058void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2059{
2060 u32 tmp;
20b09c29 2061 struct mvs_phy *phy = &mvi->phy[phy_no];
8f261aaf 2062
20b09c29 2063 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
84fbd0ce
XY		 2064 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2065 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 2066 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
84fbd0ce 2067 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
20b09c29 2068 phy->irq_status);
8f261aaf 2069
20b09c29
AY		 2070 /*
2071 * events is port event now ,
2072 * we need check the interrupt status which belongs to per port.
2073 */
b5762948 2074
9dc9fd94 2075 if (phy->irq_status & PHYEV_DCDR_ERR) {
84fbd0ce 2076 mv_dprintk("phy %d STP decoding error.\n",
9dc9fd94
S		 2077 phy_no + mvi->id*mvi->chip->n_phy);
2078 }
20b09c29
AY		 2079
2080 if (phy->irq_status & PHYEV_POOF) {
84fbd0ce 2081 mdelay(500);
20b09c29
AY		 2082 if (!(phy->phy_event & PHY_PLUG_OUT)) {
2083 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2084 int ready;
9dc9fd94 2085 mvs_do_release_task(mvi, phy_no, NULL);
20b09c29 2086 phy->phy_event |= PHY_PLUG_OUT;
9dc9fd94 2087 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
20b09c29
AY		 2088 mvs_handle_event(mvi,
2089 (void *)(unsigned long)phy_no,
2090 PHY_PLUG_EVENT);
2091 ready = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 2092 if (ready || dev_sata) {
2093 if (MVS_CHIP_DISP->stp_reset)
2094 MVS_CHIP_DISP->stp_reset(mvi,
2095 phy_no);
2096 else
2097 MVS_CHIP_DISP->phy_reset(mvi,
a4632aae 2098 phy_no, MVS_SOFT_RESET);
20b09c29
AY		 2099 return;
2100 }
2101 }
2102 }
b5762948 2103
20b09c29
AY		 2104 if (phy->irq_status & PHYEV_COMWAKE) {
2105 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2106 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2107 tmp | PHYEV_SIG_FIS);
2108 if (phy->timer.function == NULL) {
2109 phy->timer.data = (unsigned long)phy;
2110 phy->timer.function = mvs_sig_time_out;
84fbd0ce 2111 phy->timer.expires = jiffies + 5*HZ;
20b09c29
AY		 2112 add_timer(&phy->timer);
2113 }
2114 }
2115 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2116 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
20b09c29
AY		 2117 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2118 if (phy->phy_status) {
2119 mdelay(10);
2120 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2121 if (phy->phy_type & PORT_TYPE_SATA) {
2122 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2123 mvi, phy_no);
2124 tmp &= ~PHYEV_SIG_FIS;
2125 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2126 phy_no, tmp);
2127 }
2128 mvs_update_phyinfo(mvi, phy_no, 0);
9dc9fd94 2129 if (phy->phy_type & PORT_TYPE_SAS) {
a4632aae 2130 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
9dc9fd94
S		 2131 mdelay(10);
2132 }
2133
20b09c29
AY		 2134 mvs_bytes_dmaed(mvi, phy_no);
2135 /* whether driver is going to handle hot plug */
2136 if (phy->phy_event & PHY_PLUG_OUT) {
a4632aae 2137 mvs_port_notify_formed(&phy->sas_phy, 0);
20b09c29
AY		 2138 phy->phy_event &= ~PHY_PLUG_OUT;
2139 }
2140 } else {
2141 mv_dprintk("plugin interrupt but phy%d is gone\n",
2142 phy_no + mvi->id*mvi->chip->n_phy);
2143 }
2144 } else if (phy->irq_status & PHYEV_BROAD_CH) {
84fbd0ce 2145 mv_dprintk("phy %d broadcast change.\n",
20b09c29 2146 phy_no + mvi->id*mvi->chip->n_phy);
a4632aae
XY		 2147 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2148 EXP_BRCT_CHG);
20b09c29 2149 }
b5762948
JG		 2150}
2151
20b09c29 2152int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
b5762948 2153{
20b09c29
AY		 2154 u32 rx_prod_idx, rx_desc;
2155 bool attn = false;
b5762948 2156
20b09c29
AY		 2157 /* the first dword in the RX ring is special: it contains
2158 * a mirror of the hardware's RX producer index, so that
2159 * we don't have to stall the CPU reading that register.
2160 * The actual RX ring is offset by one dword, due to this.
2161 */
2162 rx_prod_idx = mvi->rx_cons;
2163 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2164 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2165 return 0;
b5762948 2166
20b09c29
AY		 2167 /* The CMPL_Q may come late, read from register and try again
2168 * note: if coalescing is enabled,
2169 * it will need to read from register every time for sure
2170 */
2171 if (unlikely(mvi->rx_cons == rx_prod_idx))
2172 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2173
2174 if (mvi->rx_cons == rx_prod_idx)
2175 return 0;
2176
2177 while (mvi->rx_cons != rx_prod_idx) {
2178 /* increment our internal RX consumer pointer */
2179 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2180 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2181
2182 if (likely(rx_desc & RXQ_DONE))
2183 mvs_slot_complete(mvi, rx_desc, 0);
2184 if (rx_desc & RXQ_ATTN) {
2185 attn = true;
2186 } else if (rx_desc & RXQ_ERR) {
2187 if (!(rx_desc & RXQ_DONE))
2188 mvs_slot_complete(mvi, rx_desc, 0);
2189 } else if (rx_desc & RXQ_SLOT_RESET) {
2190 mvs_slot_free(mvi, rx_desc);
2191 }
2192 }
2193
2194 if (attn && self_clear)
2195 MVS_CHIP_DISP->int_full(mvi);
2196 return 0;
b5762948
JG		 2197}
2198
kernel source for telekom puls (alcatel/mediatek)