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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / connectivity / combo / common / linux / include / stp_sdio.h
CommitLineData
6fa3eb70
S		 1/*
2** $Id: $
3*/
4
5/*! \file "stp_sdio.h"
6 \brief
7
8
9*/
10
11/*
12** $Log: $
13*/
14
15#ifndef _STP_SDIO_H
16#define _STP_SDIO_H
17/*******************************************************************************
18* C O M P I L E R F L A G S
19********************************************************************************
20*/
21
22
23#define KMALLOC_UPDATE 1
24
25#if 0 /* NO support for multiple STP-SDIO instances (multiple MT6620) on a single host */
26#define STP_SDIO_HOST_COUNT (1)
27#define STP_SDIO_ONLY_ONE_HOST (0)
28#endif
29#define STP_SDIO_POLL_OWNBACK_INTR (1)
30
31#define STP_SDIO_NEW_TXRING (0)
32/* George: Keep old (0) codes for debugging only!
33 * Use new code (1) for SQC and MP!
34 */
35
36#define STP_SDIO_OWN_THREAD (1)
37
38/*******************************************************************************
39* E X T E R N A L R E F E R E N C E S
40********************************************************************************
41*/
42
43#include "osal.h"
44#include "hif_sdio.h"
45
46/*******************************************************************************
47* C O N S T A N T S
48********************************************************************************
49*/
50/* Common HIF register address */
51#define CCIR (0x0000)
52#define CHLPCR (0x0004)
53#define CSDIOCSR (0x0008)
54#define CHCR (0x000c)
55#define CHISR (0x0010)
56#define CHIER (0x0014)
57#define CTDR (0x0018)
58#define CRDR (0x001c)
59#define CTFSR (0x0020)
60#define CRPLR (0x0024)
61#define CSR (0x00D8) //MT6630 only for the moment
62
63/* Common HIF register bit field address */
64/* CHLPCR */
65#define C_FW_OWN_REQ_CLR (0x00000200)
66#define C_FW_OWN_REQ_SET (0x00000100)
67#define C_FW_INT_EN_CLR (0x00000002)
68#define C_FW_INT_EN_SET (0x00000001)
69#define C_FW_COM_DRV_OWN (0x00000100)
70
71/* CHIER */
72#define CHISR_EN_15_7 (0x0000ff80)
73#define CHISR_EN_3_0 (0x0000000f)
74/* CHISR */
75#define RX_PKT_LEN (0xffff0000)
76#define FIRMWARE_INT (0x0000fe00)
77#define TX_FIFO_OVERFLOW (0x00000100)
78#define FW_INT_IND_INDICATOR (0x00000080)
79#define TX_COMPLETE_COUNT (0x00000070)
80#define TX_UNDER_THOLD (0x00000008)
81#define TX_EMPTY (0x00000004)
82#define RX_DONE (0x00000002)
83#define FW_OWN_BACK_INT (0x00000001)
84
85/* hardware settings */
86#define STP_SDIO_TX_FIFO_SIZE (2080UL)
87#define STP_SDIO_RX_FIFO_SIZE (2304UL) /* 256*9 */
88#define STP_SDIO_TX_PKT_MAX_CNT (7) /* Max outstanding tx pkt count, as defined in TX_COMPLETE_COUNT */
89#define STP_SDIO_HDR_SIZE (4) /* hw,fw,sw follow the same format: 2 bytes length + 2 bytes reserved */
90
91/* sdio bus settings */
92#define STP_SDIO_BLK_SIZE (512UL)
93
94/* software driver settings */
95#define STP_SDIO_TX_BUF_CNT (16UL) /*(7) */
96#define STP_SDIO_TX_BUF_CNT_MASK (STP_SDIO_TX_BUF_CNT - 1)
97#define STP_SDIO_TX_PKT_LIST_SIZE (STP_SDIO_TX_BUF_CNT) /* must be 2^x now... */
98#define STP_SDIO_TX_PKT_LIST_SIZE_MASK (STP_SDIO_TX_PKT_LIST_SIZE - 1)
99
100/* tx buffer size for a single entry */
101/* George: SHALL BE a multiple of the used BLK_SIZE!! */
102#if 1
103/* round up: 512*5 = 2560 > 2080 */
104#define STP_SDIO_TX_ENTRY_SIZE ((STP_SDIO_TX_FIFO_SIZE + (STP_SDIO_BLK_SIZE - 1)) & ~(STP_SDIO_BLK_SIZE - 1))
105#else
106/* round down: 512*4 = 2048 < 2080 */
107#define STP_SDIO_TX_MAX_BLK_CNT (STP_SDIO_TX_FIFO_SIZE / STP_SDIO_BLK_SIZE)
108#define STP_SDIO_TX_ENTRY_SIZE (STP_SDIO_TX_MAX_BLK_CNT * STP_SDIO_BLK_SIZE)
109#endif
110
111/*software rx buffer size */
112/*#define STP_SDIO_RX_BUF_SIZE (STP_SDIO_RX_FIFO_SIZE)*/
113/* George: SHALL BE a multiple of the used BLK_SIZE!! */
114#if 1
115/* round up: 512*5 = 2560 > 2304 */
116#define STP_SDIO_RX_BUF_SIZE ((STP_SDIO_RX_FIFO_SIZE + (STP_SDIO_BLK_SIZE - 1)) & ~(STP_SDIO_BLK_SIZE - 1))
117#else
118/* round down: 512*4 = 2048 < 2304 */
119#define STP_SDIO_RX_MAX_BLK_CNT (STP_SDIO_RX_FIFO_SIZE / STP_SDIO_BLK_SIZE)
120#define STP_SDIO_RX_BUF_SIZE (STP_SDIO_RX_MAX_BLK_CNT * STP_SDIO_BLK_SIZE)
121#endif
122
123#define COHEC_00006052 (1)
124/* #define COHEC_00006052 (0) */
125
126
127/*******************************************************************************
128* D A T A T Y P E S
129********************************************************************************
130*/
131/* HIF's local packet buffer variables for Tx/Rx */
132typedef struct _MTK_WCN_STP_SDIO_PKT_BUF {
133 /* Tx entry ring buffer. Entry size is aligned to SDIO block size. */
134#if KMALLOC_UPDATE
135 PUINT8 tx_buf;
136#else
137 UINT8 tx_buf[STP_SDIO_TX_BUF_CNT][STP_SDIO_TX_ENTRY_SIZE];
138#endif
139
140 /* Tx size ring buffer. Record valid data size in tx_buf. */
141 UINT32 tx_buf_sz[STP_SDIO_TX_BUF_CNT];
142 /* Tx debug timestamp: 1st time when the entry is filled with data */
143 UINT32 tx_buf_ts[STP_SDIO_TX_BUF_CNT];
144#if KMALLOC_UPDATE
145 PUINT8 rx_buf;
146#else
147 UINT8 rx_buf[STP_SDIO_RX_BUF_SIZE]; /* Rx buffer (not ring) */
148#endif
149#if STP_SDIO_NEW_TXRING
150 UINT32 wr_cnt; /* Tx entry ring buffer write count */
151 UINT32 rd_cnt; /* Tx entry ring buffer read count */
152 spinlock_t rd_cnt_lock; /* Tx entry ring buffer read count spin lock */
153#else
154 UINT8 wr_idx; /* Tx ring buffer write index *//*George: obsolete */
155 UINT8 rd_idx; /* Tx ring buffer read index *//*George: obsolete */
156 spinlock_t rd_idx_lock; /* spin lock for Tx ring buffer read index */
157#endif
158 MTK_WCN_BOOL full_flag; /* Tx entry ring buffer full flag (TRUE: full, FALSE: not full) */
159 /* save interrupt status flag for Tx entry ring buf spin lock */
160 UINT32 rd_irq_flag;
161 /* wait queue head for Tx entry ring buf full case */
162 wait_queue_head_t fullwait_q;
163} MTK_WCN_STP_SDIO_PKT_BUF;
164
165/* Tx packet list information */
166typedef struct _MTK_WCN_STP_SDIO_Tx_Pkt_LIST {
167 UINT32 pkt_rd_cnt;
168 UINT32 pkt_wr_cnt;
169 UINT16 pkt_size_list[STP_SDIO_TX_PKT_LIST_SIZE]; /*max length is FIFO Size */
170 UINT32 out_ts[STP_SDIO_TX_PKT_LIST_SIZE];
171 UINT32 in_ts[STP_SDIO_TX_PKT_LIST_SIZE];
172} MTK_WCN_STP_SDIO_Tx_Pkt_LIST;
173
174/* STP HIF firmware information */
175typedef struct _MTK_WCN_STP_SDIO_FIRMWARE_INFO {
176 UINT32 tx_fifo_size; /* Current left tx FIFO size */
177 UINT32 tx_packet_num; /* Current outstanding tx packet (0~7) */
178 atomic_t tx_comp_num; /* Current total tx ok but fifo size not released packet count */
179} MTK_WCN_STP_SDIO_FIRMWARE_INFO;
180
181/* STP SDIO private information */
182typedef struct _MTK_WCN_STP_SDIO_PRIVATE_INFO {
183 UINT8 stp_sdio_host_idx;
184} MTK_WCN_STP_SDIO_PRIVATE_INFO;
185
186/* STP SDIO host information */
187typedef struct _MTK_WCN_STP_SDIO_HIF_INFO {
188 MTK_WCN_HIF_SDIO_CLTCTX sdio_cltctx;
189 MTK_WCN_STP_SDIO_PKT_BUF pkt_buf;
190 MTK_WCN_STP_SDIO_Tx_Pkt_LIST tx_pkt_list;
191 UINT32 rx_pkt_len; /* George: use 32-bit for efficiency. Correct name to pkt for packet */
192 MTK_WCN_STP_SDIO_FIRMWARE_INFO firmware_info;
193 MTK_WCN_STP_SDIO_PRIVATE_INFO private_info;
194#if STP_SDIO_OWN_THREAD
195 /* struct tasklet_struct tx_rx_job; */
196 OSAL_THREAD tx_rx_thread;
197 INT32 irq_pending;
198 INT32 sleep_flag;
199 INT32 wakeup_flag;
200 INT32 awake_flag;
201 OSAL_EVENT tx_rx_event;
202 OSAL_SIGNAL isr_check_complete;
203 INT32 dump_flag;
204#endif
205 INT32 tx_dbg_dump_flag;
206 struct work_struct tx_work;
207 struct work_struct rx_work;
208} MTK_WCN_STP_SDIO_HIF_INFO;
209
210/*******************************************************************************
211* P U B L I C D A T A
212********************************************************************************
213*/
214
215/*******************************************************************************
216* P R I V A T E D A T A
217********************************************************************************
218*/
219
220/*******************************************************************************
221* M A C R O S
222********************************************************************************
223*/
224/* STP_SDIO_TX_PKT_LIST_SIZE must be 2^x */
225#define STP_SDIO_GET_PKT_AR_IDX(idx) ((idx) & STP_SDIO_TX_PKT_LIST_SIZE_MASK)
226
227/*******************************************************************************
228* F U N C T I O N D E C L A R A T I O N S
229********************************************************************************
230*/
231
232/*!
233 * \brief MTK hif sdio client registration function
234 *
235 * Client uses this function to do hif sdio registration
236 *
237 * \param pinfo a pointer of client's information
238 *
239 * \retval 0 register successfully
240 * \retval < 0 error code
241 */
242extern INT32 mtk_wcn_hif_sdio_client_reg(const MTK_WCN_HIF_SDIO_CLTINFO *pinfo);
243
244extern INT32 mtk_wcn_stp_sdio_do_own_clr(VOID);
245
246/* extern INT32 */
247/* mtk_wcn_stp_sdio_do_own_set (void); */
248
249/*******************************************************************************
250* F U N C T I O N S
251********************************************************************************
252*/
253#endif /* _STP_SDIO_H */
kernel source for telekom puls (alcatel/mediatek)