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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / cmdq / cmdq_mdp_common.c
CommitLineData
6fa3eb70
S		 1#include "cmdq_mdp_common.h"
2#include "cmdq_core.h"
3#include "cmdq_reg.h"
4#include "cmdq_mmp.h"
5#include "cmdq_mdp.h"
6#include <linux/met_drv.h>
7
8
9void cmdq_mdp_enable(uint64_t engineFlag,
10 enum cg_clk_id gateId, CMDQ_ENG_ENUM engine, const char *name)
11{
12#ifdef CMDQ_PWR_AWARE
13 CMDQ_VERBOSE("Test for ENG %d\n", engine);
14 if (engineFlag & (1LL << engine)) {
15 CMDQ_MSG("Enable %s clock\n", name);
16 enable_clock(gateId, (char *)name);
17 }
18#endif
19}
20
21int cmdq_mdp_loop_reset_impl(
22 const unsigned long resetReg,
23 const uint32_t resetWriteValue,
24 const unsigned long resetStateReg,
25 const uint32_t resetMask,
26 const uint32_t resetPollingValue,
27 const char *name,
28 const int32_t maxLoopCount)
29{
30 int loop = 0;
31
32 CMDQ_REG_SET32(resetReg, resetWriteValue);
33 while (loop < maxLoopCount) {
34 if (resetPollingValue == (CMDQ_REG_GET32(resetStateReg) & resetMask)) {
35 break;
36 }
37
38 loop++;
39 }
40
41 /* return polling result*/
42 if (loop >= maxLoopCount) {
43 CMDQ_ERR("%s failed, Reg:0x%lx, writeValue:0x%08x, stateReg:0x%lx, mask:0x%08x, pollingValue:0x%08x\n",
44 __func__, resetReg, resetWriteValue, resetStateReg, resetMask, resetPollingValue);
45 return -EFAULT;
46 }
47
48 return 0;
49}
50
51int cmdq_mdp_loop_reset(enum cg_clk_id clkId,
52 const unsigned long resetReg,
53 const unsigned long resetStateReg,
54 const uint32_t resetMask,
55 const uint32_t resetValue, const char *name, const bool pollInitResult)
56{
57#ifdef CMDQ_PWR_AWARE
58 int resetStatus = 0;
59 int initStatus = 0;
60
61 if (clock_is_on(clkId)) {
62 CMDQ_PROF_START(current->pid, __func__);
63 CMDQ_PROF_MMP(cmdq_mmp_get_event()->MDP_reset,
64 MMProfileFlagStart, resetReg, resetStateReg);
65
66
67 /* loop reset*/
68 resetStatus = cmdq_mdp_loop_reset_impl(
69 resetReg, 0x1,
70 resetStateReg, resetMask, resetValue,
71 name, CMDQ_MAX_LOOP_COUNT);
72
73 if(pollInitResult)
74 {
75 /* loop init*/
76 initStatus = cmdq_mdp_loop_reset_impl(
77 resetReg, 0x0,
78 resetStateReg, resetMask, 0x0,
79 name, CMDQ_MAX_LOOP_COUNT);
80 }
81 else
82 {
83 /* always clear to init state no matter what polling result*/
84 CMDQ_REG_SET32(resetReg, 0x0);
85 }
86
87 CMDQ_PROF_MMP(cmdq_mmp_get_event()->MDP_reset,
88 MMProfileFlagEnd, resetReg, resetStateReg);
89 CMDQ_PROF_END(current->pid, __func__);
90
91 /* retrun failed if loop failed */
92 if ((0 > resetStatus) || (0 > initStatus)) {
93 CMDQ_ERR("Reset MDP %s failed, resetStatus:%d, initStatus:%d\n",
94 name, resetStatus, initStatus);
95 return -EFAULT;
96 }
97 }
98#endif
99
100 return 0;
101};
102
103void cmdq_mdp_loop_off(enum cg_clk_id clkId,
104 const unsigned long resetReg,
105 const unsigned long resetStateReg,
106 const uint32_t resetMask,
107 const uint32_t resetValue, const char *name, const bool pollInitResult)
108{
109#ifdef CMDQ_PWR_AWARE
110 int resetStatus = 0;
111 int initStatus = 0;
112
113 if (clock_is_on(clkId)) {
114
115 /* loop reset*/
116 resetStatus = cmdq_mdp_loop_reset_impl(
117 resetReg, 0x1,
118 resetStateReg, resetMask, resetValue,
119 name, CMDQ_MAX_LOOP_COUNT);
120
121 if(pollInitResult)
122 {
123 /* loop init*/
124 initStatus = cmdq_mdp_loop_reset_impl(
125 resetReg, 0x0,
126 resetStateReg, resetMask, 0x0,
127 name, CMDQ_MAX_LOOP_COUNT);
128 }
129 else
130 {
131 /* always clear to init state no matter what polling result*/
132 CMDQ_REG_SET32(resetReg, 0x0);
133 }
134
135 /* retrun failed if loop failed */
136 if ((0 > resetStatus) || (0 > initStatus)) {
137 CMDQ_AEE("MDP", "Disable %s engine failed, resetStatus:%d, initStatus:%d\n",
138 name, resetStatus, initStatus);
139 return;
140 }
141
142 CMDQ_MSG("Disable %s clock\n", name);
143
144 disable_clock(clkId, (char *)name);
145 }
146#endif
147
148 return;
149}
150
151void cmdq_mdp_dump_venc(const unsigned long base, const char *label)
152{
153 CMDQ_ERR("======== cmdq_mdp_dump_venc + ========\n");
154 CMDQ_ERR("[0x%lx] to [0x%lx]\n", base, base + 0x1000 * 4);
155
156 print_hex_dump(KERN_ERR, "[CMDQ][ERR][VENC]", DUMP_PREFIX_ADDRESS, 16, 4,
157 (void *)base, 0x1000, false);
158 CMDQ_ERR("======== cmdq_mdp_dump_venc - ========\n");
159}
160
161const char *cmdq_mdp_get_rdma_state(uint32_t state)
162{
163 switch (state) {
164 case 0x1:
165 return "idle";
166 case 0x2:
167 return "wait sof";
168 case 0x4:
169 return "reg update";
170 case 0x8:
171 return "clear0";
172 case 0x10:
173 return "clear1";
174 case 0x20:
175 return "int0";
176 case 0x40:
177 return "int1";
178 case 0x80:
179 return "data running";
180 case 0x100:
181 return "wait done";
182 case 0x200:
183 return "warm reset";
184 case 0x400:
185 return "wait reset";
186 default:
187 return "";
188 }
189}
190
191void cmdq_mdp_dump_rdma(const unsigned long base, const char *label)
192{
193 uint32_t value[15] = { 0 };
194 uint32_t state = 0;
195 uint32_t grep = 0;
196
197 value[0] = CMDQ_REG_GET32(base + 0x030);
198 value[1] = CMDQ_REG_GET32(base + cmdq_mdp_rdma_get_reg_offset_src_addr());
199 value[2] = CMDQ_REG_GET32(base + 0x060);
200 value[3] = CMDQ_REG_GET32(base + 0x070);
201 value[4] = CMDQ_REG_GET32(base + 0x078);
202 value[5] = CMDQ_REG_GET32(base + 0x080);
203 value[6] = CMDQ_REG_GET32(base + 0x100);
204 value[7] = CMDQ_REG_GET32(base + 0x118);
205 value[8] = CMDQ_REG_GET32(base + 0x130);
206 value[9] = CMDQ_REG_GET32(base + 0x400);
207 value[10] = CMDQ_REG_GET32(base + 0x408);
208 value[11] = CMDQ_REG_GET32(base + 0x410);
209 value[12] = CMDQ_REG_GET32(base + 0x420);
210 value[13] = CMDQ_REG_GET32(base + 0x430);
211 value[14] = CMDQ_REG_GET32(base + 0x4D0);
212
213 CMDQ_ERR("=============== [CMDQ] %s Status ====================================\n", label);
214 CMDQ_ERR
215 ("RDMA_SRC_CON: 0x%08x, RDMA_SRC_BASE_0: 0x%08x, RDMA_MF_BKGD_SIZE_IN_BYTE: 0x%08x\n",
216 value[0], value[1], value[2]);
217 CMDQ_ERR("RDMA_MF_SRC_SIZE: 0x%08x, RDMA_MF_CLIP_SIZE: 0x%08x, RDMA_MF_OFFSET_1: 0x%08x\n",
218 value[3], value[4], value[5]);
219 CMDQ_ERR("RDMA_SRC_END_0: 0x%08x, RDMA_SRC_OFFSET_0: 0x%08x, RDMA_SRC_OFFSET_W_0: 0x%08x\n",
220 value[6], value[7], value[8]);
221 CMDQ_ERR("RDMA_MON_STA_0: 0x%08x, RDMA_MON_STA_1: 0x%08x, RDMA_MON_STA_2: 0x%08x\n",
222 value[9], value[10], value[11]);
223 CMDQ_ERR("RDMA_MON_STA_4: 0x%08x, RDMA_MON_STA_6: 0x%08x, RDMA_MON_STA_26: 0x%08x\n",
224 value[12], value[13], value[14]);
225
226 /* parse state */
227 CMDQ_ERR("RDMA ack:%d req:%d\n", (value[9] & (1 << 11)) >> 11,
228 (value[9] & (1 << 10)) >> 10);
229 state = (value[10] >> 8) & 0x7FF;
230 grep = (value[10] >> 20) & 0x1;
231 CMDQ_ERR("RDMA state: 0x%x (%s)\n", state, cmdq_mdp_get_rdma_state(state));
232 CMDQ_ERR("RDMA horz_cnt: %d vert_cnt:%d\n", value[14] & 0xFFF, (value[14] >> 16) & 0xFFF);
233
234 CMDQ_ERR("RDMA grep:%d => suggest to ask SMI help:%d\n", grep, grep);
235}
236
237const char *cmdq_mdp_get_rsz_state(const uint32_t state)
238{
239 switch (state) {
240 case 0x5:
241 return "downstream hang"; /* 0,1,0,1 */
242 case 0xa:
243 return "upstream hang"; /* 1,0,1,0 */
244 default:
245 return "";
246 }
247}
248
249void cmdq_mdp_dump_rsz(const unsigned long base, const char *label)
250{
251 uint32_t value[8] = { 0 };
252 uint32_t request[4] = { 0 };
253 uint32_t state = 0;
254
255 value[0] = CMDQ_REG_GET32(base + 0x004);
256 value[1] = CMDQ_REG_GET32(base + 0x00C);
257 value[2] = CMDQ_REG_GET32(base + 0x010);
258 value[3] = CMDQ_REG_GET32(base + 0x014);
259 value[4] = CMDQ_REG_GET32(base + 0x018);
260 CMDQ_REG_SET32(base + 0x040, 0x00000001);
261 value[5] = CMDQ_REG_GET32(base + 0x044);
262 CMDQ_REG_SET32(base + 0x040, 0x00000002);
263 value[6] = CMDQ_REG_GET32(base + 0x044);
264 CMDQ_REG_SET32(base + 0x040, 0x00000003);
265 value[7] = CMDQ_REG_GET32(base + 0x044);
266
267 CMDQ_ERR("=============== [CMDQ] %s Status ====================================\n", label);
268 CMDQ_ERR("RSZ_CONTROL: 0x%08x, RSZ_INPUT_IMAGE: 0x%08x RSZ_OUTPUT_IMAGE: 0x%08x\n",
269 value[0], value[1], value[2]);
270 CMDQ_ERR("RSZ_HORIZONTAL_COEFF_STEP: 0x%08x, RSZ_VERTICAL_COEFF_STEP: 0x%08x\n",
271 value[3], value[4]);
272 CMDQ_ERR("RSZ_DEBUG_1: 0x%08x, RSZ_DEBUG_2: 0x%08x, RSZ_DEBUG_3: 0x%08x\n",
273 value[5], value[6], value[7]);
274
275 /* parse state */
276 /* .valid=1/request=1: upstream module sends data */
277 /* .ready=1: downstream module receives data */
278 state = value[6] & 0xF;
279 request[0] = state & (0x1); /* out valid */
280 request[1] = (state & (0x1 << 1)) >> 1; /* out ready */
281 request[2] = (state & (0x1 << 2)) >> 2; /* in valid */
282 request[3] = (state & (0x1 << 3)) >> 3; /* in ready */
283
284 CMDQ_ERR("RSZ inRdy,inRsq,outRdy,outRsq: %d,%d,%d,%d (%s)\n",
285 request[3], request[2], request[1], request[0], cmdq_mdp_get_rsz_state(state));
286}
287
288void cmdq_mdp_dump_rot(const unsigned long base, const char *label)
289{
290 uint32_t value[32] = { 0 };
291
292 value[0] = CMDQ_REG_GET32(base + 0x000);
293 value[1] = CMDQ_REG_GET32(base + 0x008);
294 value[2] = CMDQ_REG_GET32(base + 0x00C);
295 value[3] = CMDQ_REG_GET32(base + 0x024);
296 value[4] = CMDQ_REG_GET32(base + cmdq_mdp_wrot_get_reg_offset_dst_addr());
297 value[5] = CMDQ_REG_GET32(base + 0x02C);
298 value[6] = CMDQ_REG_GET32(base + 0x004);
299 value[7] = CMDQ_REG_GET32(base + 0x030);
300 value[8] = CMDQ_REG_GET32(base + 0x078);
301 value[9] = CMDQ_REG_GET32(base + 0x070);
302 CMDQ_REG_SET32(base + 0x018, 0x00000100);
303 value[10] = CMDQ_REG_GET32(base + 0x0D0);
304 CMDQ_REG_SET32(base + 0x018, 0x00000200);
305 value[11] = CMDQ_REG_GET32(base + 0x0D0);
306 CMDQ_REG_SET32(base + 0x018, 0x00000300);
307 value[12] = CMDQ_REG_GET32(base + 0x0D0);
308 CMDQ_REG_SET32(base + 0x018, 0x00000400);
309 value[13] = CMDQ_REG_GET32(base + 0x0D0);
310 CMDQ_REG_SET32(base + 0x018, 0x00000500);
311 value[14] = CMDQ_REG_GET32(base + 0x0D0);
312 CMDQ_REG_SET32(base + 0x018, 0x00000600);
313 value[15] = CMDQ_REG_GET32(base + 0x0D0);
314 CMDQ_REG_SET32(base + 0x018, 0x00000700);
315 value[16] = CMDQ_REG_GET32(base + 0x0D0);
316 CMDQ_REG_SET32(base + 0x018, 0x00000800);
317 value[17] = CMDQ_REG_GET32(base + 0x0D0);
318 CMDQ_REG_SET32(base + 0x018, 0x00000900);
319 value[18] = CMDQ_REG_GET32(base + 0x0D0);
320 CMDQ_REG_SET32(base + 0x018, 0x00000A00);
321 value[19] = CMDQ_REG_GET32(base + 0x0D0);
322 CMDQ_REG_SET32(base + 0x018, 0x00000B00);
323 value[20] = CMDQ_REG_GET32(base + 0x0D0);
324 CMDQ_REG_SET32(base + 0x018, 0x00000C00);
325 value[21] = CMDQ_REG_GET32(base + 0x0D0);
326 CMDQ_REG_SET32(base + 0x018, 0x00000D00);
327 value[22] = CMDQ_REG_GET32(base + 0x0D0);
328 CMDQ_REG_SET32(base + 0x018, 0x00000E00);
329 value[23] = CMDQ_REG_GET32(base + 0x0D0);
330 CMDQ_REG_SET32(base + 0x018, 0x00000F00);
331 value[24] = CMDQ_REG_GET32(base + 0x0D0);
332 CMDQ_REG_SET32(base + 0x018, 0x00001000);
333 value[25] = CMDQ_REG_GET32(base + 0x0D0);
334 CMDQ_REG_SET32(base + 0x018, 0x00001100);
335 value[26] = CMDQ_REG_GET32(base + 0x0D0);
336 CMDQ_REG_SET32(base + 0x018, 0x00001200);
337 value[27] = CMDQ_REG_GET32(base + 0x0D0);
338 CMDQ_REG_SET32(base + 0x018, 0x00001300);
339 value[28] = CMDQ_REG_GET32(base + 0x0D0);
340 CMDQ_REG_SET32(base + 0x018, 0x00001400);
341 value[29] = CMDQ_REG_GET32(base + 0x0D0);
342 value[30] = CMDQ_REG_GET32(base + 0x01C);
343
344 CMDQ_ERR("=============== [CMDQ] %s Status ====================================\n", label);
345 CMDQ_ERR("ROT_CTRL: 0x%08x, ROT_MAIN_BUF_SIZE: 0x%08x, ROT_SUB_BUF_SIZE: 0x%08x\n",
346 value[0], value[1], value[2]);
347 CMDQ_ERR("ROT_TAR_SIZE: 0x%08x, ROT_BASE_ADDR: 0x%08x, ROT_OFST_ADDR: 0x%08x\n",
348 value[3], value[4], value[5]);
349 CMDQ_ERR("ROT_DMA_PERF: 0x%08x, ROT_STRIDE: 0x%08x, ROT_IN_SIZE: 0x%08x\n",
350 value[6], value[7], value[8]);
351 CMDQ_ERR("ROT_EOL: 0x%08x, ROT_DBUGG_1: 0x%08x, ROT_DEBUBG_2: 0x%08x\n",
352 value[9], value[10], value[11]);
353 CMDQ_ERR("ROT_DBUGG_3: 0x%08x, ROT_DBUGG_4: 0x%08x, ROT_DEBUBG_5: 0x%08x\n",
354 value[12], value[13], value[14]);
355 CMDQ_ERR("ROT_DBUGG_6: 0x%08x, ROT_DBUGG_7: 0x%08x, ROT_DEBUBG_8: 0x%08x\n",
356 value[15], value[16], value[17]);
357 CMDQ_ERR("ROT_DBUGG_9: 0x%08x, ROT_DBUGG_A: 0x%08x, ROT_DEBUBG_B: 0x%08x\n",
358 value[18], value[19], value[20]);
359 CMDQ_ERR("ROT_DBUGG_C: 0x%08x, ROT_DBUGG_D: 0x%08x, ROT_DEBUBG_E: 0x%08x\n",
360 value[21], value[22], value[23]);
361 CMDQ_ERR("ROT_DBUGG_F: 0x%08x, ROT_DBUGG_10: 0x%08x, ROT_DEBUBG_11: 0x%08x\n",
362 value[24], value[25], value[26]);
363 CMDQ_ERR("ROT_DEBUG_12: 0x%08x, ROT_DBUGG_13: 0x%08x, ROT_DBUGG_14: 0x%08x\n",
364 value[27], value[28], value[29]);
365 CMDQ_ERR("VIDO_INT: 0x%08x\n", value[30]);
366}
367
368void cmdq_mdp_dump_tdshp(const unsigned long base, const char *label)
369{
370 uint32_t value[8] = { 0 };
371
372 value[0] = CMDQ_REG_GET32(base + 0x114);
373 value[1] = CMDQ_REG_GET32(base + 0x11C);
374 value[2] = CMDQ_REG_GET32(base + 0x104);
375 value[3] = CMDQ_REG_GET32(base + 0x108);
376 value[4] = CMDQ_REG_GET32(base + 0x10C);
377 value[5] = CMDQ_REG_GET32(base + 0x120);
378 value[6] = CMDQ_REG_GET32(base + 0x128);
379 value[7] = CMDQ_REG_GET32(base + 0x110);
380
381 CMDQ_ERR("=============== [CMDQ] %s Status ====================================\n", label);
382 CMDQ_ERR("TDSHP INPUT_CNT: 0x%08x, OUTPUT_CNT: 0x%08x\n", value[0], value[1]);
383 CMDQ_ERR("TDSHP INTEN: 0x%08x, INTSTA: 0x%08x, 0x10C: 0x%08x\n", value[2], value[3],
384 value[4]);
385 CMDQ_ERR("TDSHP CFG: 0x%08x, IN_SIZE: 0x%08x, OUT_SIZE: 0x%08x\n", value[7], value[5],
386 value[6]);
387}
388
389const char *cmdq_mdp_get_wdma_state(uint32_t state)
390{
391 switch (state) {
392 case 0x1:
393 return "idle";
394 case 0x2:
395 return "clear";
396 case 0x4:
397 return "prepare";
398 case 0x8:
399 return "prepare";
400 case 0x10:
401 return "data running";
402 case 0x20:
403 return "eof wait";
404 case 0x40:
405 return "soft reset wait";
406 case 0x80:
407 return "eof done";
408 case 0x100:
409 return "sof reset done";
410 case 0x200:
411 return "frame complete";
412 default:
413 return "";
414 }
415}
416
417void cmdq_mdp_dump_wdma(const unsigned long base, const char *label)
418{
419 uint32_t value[40] = { 0 };
420 uint32_t state = 0;
421 uint32_t grep = 0; /* grep bit = 1, WDMA has sent request to SMI, and not receive done yet */
422 uint32_t isFIFOFull = 0; /* 1 for WDMA FIFO full */
423
424 value[0] = CMDQ_REG_GET32(base + 0x014);
425 value[1] = CMDQ_REG_GET32(base + 0x018);
426 value[2] = CMDQ_REG_GET32(base + 0x028);
427 value[3] = CMDQ_REG_GET32(base + cmdq_mdp_wdma_get_reg_offset_dst_addr());
428 value[4] = CMDQ_REG_GET32(base + 0x078);
429 value[5] = CMDQ_REG_GET32(base + 0x080);
430 value[6] = CMDQ_REG_GET32(base + 0x0A0);
431 value[7] = CMDQ_REG_GET32(base + 0x0A8);
432
433 CMDQ_REG_SET32(base + 0x014, (value[0] & (0x0FFFFFFF)));
434 value[8] = CMDQ_REG_GET32(base + 0x014);
435 value[9] = CMDQ_REG_GET32(base + 0x0AC);
436 CMDQ_REG_SET32(base + 0x014, 0x10000000 | (value[0] & (0x0FFFFFFF)));
437 value[10] = CMDQ_REG_GET32(base + 0x014);
438 value[11] = CMDQ_REG_GET32(base + 0x0AC);
439 CMDQ_REG_SET32(base + 0x014, 0x20000000 | (value[0] & (0x0FFFFFFF)));
440 value[12] = CMDQ_REG_GET32(base + 0x014);
441 value[13] = CMDQ_REG_GET32(base + 0x0AC);
442 CMDQ_REG_SET32(base + 0x014, 0x30000000 | (value[0] & (0x0FFFFFFF)));
443 value[14] = CMDQ_REG_GET32(base + 0x014);
444 value[15] = CMDQ_REG_GET32(base + 0x0AC);
445 CMDQ_REG_SET32(base + 0x014, 0x40000000 | (value[0] & (0x0FFFFFFF)));
446 value[16] = CMDQ_REG_GET32(base + 0x014);
447 value[17] = CMDQ_REG_GET32(base + 0x0AC);
448 CMDQ_REG_SET32(base + 0x014, 0x50000000 | (value[0] & (0x0FFFFFFF)));
449 value[18] = CMDQ_REG_GET32(base + 0x014);
450 value[19] = CMDQ_REG_GET32(base + 0x0AC);
451 CMDQ_REG_SET32(base + 0x014, 0x60000000 | (value[0] & (0x0FFFFFFF)));
452 value[20] = CMDQ_REG_GET32(base + 0x014);
453 value[21] = CMDQ_REG_GET32(base + 0x0AC);
454 CMDQ_REG_SET32(base + 0x014, 0x70000000 | (value[0] & (0x0FFFFFFF)));
455 value[22] = CMDQ_REG_GET32(base + 0x014);
456 value[23] = CMDQ_REG_GET32(base + 0x0AC);
457 CMDQ_REG_SET32(base + 0x014, 0x80000000 | (value[0] & (0x0FFFFFFF)));
458 value[24] = CMDQ_REG_GET32(base + 0x014);
459 value[25] = CMDQ_REG_GET32(base + 0x0AC);
460 CMDQ_REG_SET32(base + 0x014, 0x90000000 | (value[0] & (0x0FFFFFFF)));
461 value[26] = CMDQ_REG_GET32(base + 0x014);
462 value[27] = CMDQ_REG_GET32(base + 0x0AC);
463 CMDQ_REG_SET32(base + 0x014, 0xA0000000 | (value[0] & (0x0FFFFFFF)));
464 value[28] = CMDQ_REG_GET32(base + 0x014);
465 value[29] = CMDQ_REG_GET32(base + 0x0AC);
466 CMDQ_REG_SET32(base + 0x014, 0xB0000000 | (value[0] & (0x0FFFFFFF)));
467 value[30] = CMDQ_REG_GET32(base + 0x014);
468 value[31] = CMDQ_REG_GET32(base + 0x0AC);
469 CMDQ_REG_SET32(base + 0x014, 0xC0000000 | (value[0] & (0x0FFFFFFF)));
470 value[32] = CMDQ_REG_GET32(base + 0x014);
471 value[33] = CMDQ_REG_GET32(base + 0x0AC);
472 CMDQ_REG_SET32(base + 0x014, 0xD0000000 | (value[0] & (0x0FFFFFFF)));
473 value[34] = CMDQ_REG_GET32(base + 0x014);
474 value[35] = CMDQ_REG_GET32(base + 0x0AC);
475 CMDQ_REG_SET32(base + 0x014, 0xE0000000 | (value[0] & (0x0FFFFFFF)));
476 value[36] = CMDQ_REG_GET32(base + 0x014);
477 value[37] = CMDQ_REG_GET32(base + 0x0AC);
478 CMDQ_REG_SET32(base + 0x014, 0xF0000000 | (value[0] & (0x0FFFFFFF)));
479 value[38] = CMDQ_REG_GET32(base + 0x014);
480 value[39] = CMDQ_REG_GET32(base + 0x0AC);
481
482 CMDQ_ERR("=============== [CMDQ] %s Status ====================================\n", label);
483 CMDQ_ERR("[CMDQ]WDMA_CFG: 0x%08x, WDMA_SRC_SIZE: 0x%08x, WDMA_DST_W_IN_BYTE = 0x%08x\n",
484 value[0], value[1], value[2]);
485 CMDQ_ERR
486 ("[CMDQ]WDMA_DST_ADDR0: 0x%08x, WDMA_DST_UV_PITCH: 0x%08x, WDMA_DST_ADDR_OFFSET0 = 0x%08x\n",
487 value[3], value[4], value[5]);
488 CMDQ_ERR("[CMDQ]WDMA_STATUS: 0x%08x, WDMA_INPUT_CNT: 0x%08x\n", value[6], value[7]);
489
490 /* Dump Addtional WDMA debug info */
491 CMDQ_ERR("WDMA_DEBUG_0 +014: 0x%08x , +0ac: 0x%08x\n", value[8], value[9]);
492 CMDQ_ERR("WDMA_DEBUG_1 +014: 0x%08x , +0ac: 0x%08x\n", value[10], value[11]);
493 CMDQ_ERR("WDMA_DEBUG_2 +014: 0x%08x , +0ac: 0x%08x\n", value[12], value[13]);
494 CMDQ_ERR("WDMA_DEBUG_3 +014: 0x%08x , +0ac: 0x%08x\n", value[14], value[15]);
495 CMDQ_ERR("WDMA_DEBUG_4 +014: 0x%08x , +0ac: 0x%08x\n", value[16], value[17]);
496 CMDQ_ERR("WDMA_DEBUG_5 +014: 0x%08x , +0ac: 0x%08x\n", value[18], value[19]);
497 CMDQ_ERR("WDMA_DEBUG_6 +014: 0x%08x , +0ac: 0x%08x\n", value[20], value[21]);
498 CMDQ_ERR("WDMA_DEBUG_7 +014: 0x%08x , +0ac: 0x%08x\n", value[22], value[23]);
499 CMDQ_ERR("WDMA_DEBUG_8 +014: 0x%08x , +0ac: 0x%08x\n", value[24], value[25]);
500 CMDQ_ERR("WDMA_DEBUG_9 +014: 0x%08x , +0ac: 0x%08x\n", value[26], value[27]);
501 CMDQ_ERR("WDMA_DEBUG_A +014: 0x%08x , +0ac: 0x%08x\n", value[28], value[29]);
502 CMDQ_ERR("WDMA_DEBUG_B +014: 0x%08x , +0ac: 0x%08x\n", value[30], value[31]);
503 CMDQ_ERR("WDMA_DEBUG_C +014: 0x%08x , +0ac: 0x%08x\n", value[32], value[33]);
504 CMDQ_ERR("WDMA_DEBUG_D +014: 0x%08x , +0ac: 0x%08x\n", value[34], value[35]);
505 CMDQ_ERR("WDMA_DEBUG_E +014: 0x%08x , +0ac: 0x%08x\n", value[36], value[37]);
506 CMDQ_ERR("WDMA_DEBUG_F +014: 0x%08x , +0ac: 0x%08x\n", value[38], value[39]);
507
508 /* parse WDMA state */
509 state = value[6] & 0x3FF;
510 grep = (value[6] >> 13) & 0x1;
511 isFIFOFull = (value[6] >> 12) & 0x1;
512
513 CMDQ_ERR("WDMA state:0x%x (%s)\n", state, cmdq_mdp_get_wdma_state(state));
514 CMDQ_ERR("WDMA in_req:%d in_ack:%d\n", (value[6] >> 15) & 0x1, (value[6] >> 14) & 0x1);
515
516 /* note WDMA send request(i.e command) to SMI first, then SMI takes request data from WDMA FIFO */
517 /* if SMI dose not process request and upstream HWs such as MDP_RSZ send data to WDMA, WDMA FIFO will full finally */
518 CMDQ_ERR("WDMA grep:%d, FIFO full:%d\n", grep, isFIFOFull);
519 CMDQ_ERR("WDMA suggest: Need SMI help:%d, Need check WDMA config:%d\n", (grep),
520 ((0 == grep) && (1 == isFIFOFull)));
521}
kernel source for telekom puls (alcatel/mediatek)