[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_sa.c

/*
 * Copyright 2011 Red Hat Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Jerome Glisse <glisse@freedesktop.org>
 */
/* Algorithm:
 *
 * We store the last allocated bo in "hole", we always try to allocate
 * after the last allocated bo. Principle is that in a linear GPU ring
 * progression was is after last is the oldest bo we allocated and thus
 * the first one that should no longer be in use by the GPU.
 *
 * If it's not the case we skip over the bo after last to the closest
 * done bo if such one exist. If none exist and we are not asked to
 * block we report failure to allocate.
 *
 * If we are asked to block we wait on all the oldest fence of all
 * rings. We just wait for any of those fence to complete.
 */
#include <drm/drmP.h>
#include "radeon.h"

static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);
static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);

int radeon_sa_bo_manager_init(struct radeon_device *rdev,
			      struct radeon_sa_manager *sa_manager,
			      unsigned size, u32 align, u32 domain)
{
	int i, r;

	init_waitqueue_head(&sa_manager->wq);
	sa_manager->bo = NULL;
	sa_manager->size = size;
	sa_manager->domain = domain;
	sa_manager->align = align;
	sa_manager->hole = &sa_manager->olist;
	INIT_LIST_HEAD(&sa_manager->olist);
	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
		INIT_LIST_HEAD(&sa_manager->flist[i]);
	}

	r = radeon_bo_create(rdev, size, align, true,
			     domain, NULL, &sa_manager->bo);
	if (r) {
		dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
		return r;
	}

	return r;
}

void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
			       struct radeon_sa_manager *sa_manager)
{
	struct radeon_sa_bo *sa_bo, *tmp;

	if (!list_empty(&sa_manager->olist)) {
		sa_manager->hole = &sa_manager->olist,
		radeon_sa_bo_try_free(sa_manager);
		if (!list_empty(&sa_manager->olist)) {
			dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n");
		}
	}
	list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
		radeon_sa_bo_remove_locked(sa_bo);
	}
	radeon_bo_unref(&sa_manager->bo);
	sa_manager->size = 0;
}

int radeon_sa_bo_manager_start(struct radeon_device *rdev,
			       struct radeon_sa_manager *sa_manager)
{
	int r;

	if (sa_manager->bo == NULL) {
		dev_err(rdev->dev, "no bo for sa manager\n");
		return -EINVAL;
	}

	/* map the buffer */
	r = radeon_bo_reserve(sa_manager->bo, false);
	if (r) {
		dev_err(rdev->dev, "(%d) failed to reserve manager bo\n", r);
		return r;
	}
	r = radeon_bo_pin(sa_manager->bo, sa_manager->domain, &sa_manager->gpu_addr);
	if (r) {
		radeon_bo_unreserve(sa_manager->bo);
		dev_err(rdev->dev, "(%d) failed to pin manager bo\n", r);
		return r;
	}
	r = radeon_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
	radeon_bo_unreserve(sa_manager->bo);
	return r;
}

int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
				 struct radeon_sa_manager *sa_manager)
{
	int r;

	if (sa_manager->bo == NULL) {
		dev_err(rdev->dev, "no bo for sa manager\n");
		return -EINVAL;
	}

	r = radeon_bo_reserve(sa_manager->bo, false);
	if (!r) {
		radeon_bo_kunmap(sa_manager->bo);
		radeon_bo_unpin(sa_manager->bo);
		radeon_bo_unreserve(sa_manager->bo);
	}
	return r;
}

static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)
{
	struct radeon_sa_manager *sa_manager = sa_bo->manager;
	if (sa_manager->hole == &sa_bo->olist) {
		sa_manager->hole = sa_bo->olist.prev;
	}
	list_del_init(&sa_bo->olist);
	list_del_init(&sa_bo->flist);
	radeon_fence_unref(&sa_bo->fence);
	kfree(sa_bo);
}

static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)
{
	struct radeon_sa_bo *sa_bo, *tmp;

	if (sa_manager->hole->next == &sa_manager->olist)
		return;

	sa_bo = list_entry(sa_manager->hole->next, struct radeon_sa_bo, olist);
	list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
		if (sa_bo->fence == NULL || !radeon_fence_signaled(sa_bo->fence)) {
			return;
		}
		radeon_sa_bo_remove_locked(sa_bo);
	}
}

static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)
{
	struct list_head *hole = sa_manager->hole;

	if (hole != &sa_manager->olist) {
		return list_entry(hole, struct radeon_sa_bo, olist)->eoffset;
	}
	return 0;
}

static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)
{
	struct list_head *hole = sa_manager->hole;

	if (hole->next != &sa_manager->olist) {
		return list_entry(hole->next, struct radeon_sa_bo, olist)->soffset;
	}
	return sa_manager->size;
}

static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,
				   struct radeon_sa_bo *sa_bo,
				   unsigned size, unsigned align)
{
	unsigned soffset, eoffset, wasted;

	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
	wasted = (align - (soffset % align)) % align;

	if ((eoffset - soffset) >= (size + wasted)) {
		soffset += wasted;

		sa_bo->manager = sa_manager;
		sa_bo->soffset = soffset;
		sa_bo->eoffset = soffset + size;
		list_add(&sa_bo->olist, sa_manager->hole);
		INIT_LIST_HEAD(&sa_bo->flist);
		sa_manager->hole = &sa_bo->olist;
		return true;
	}
	return false;
}

/**
 * radeon_sa_event - Check if we can stop waiting
 *
 * @sa_manager: pointer to the sa_manager
 * @size: number of bytes we want to allocate
 * @align: alignment we need to match
 *
 * Check if either there is a fence we can wait for or
 * enough free memory to satisfy the allocation directly
 */
static bool radeon_sa_event(struct radeon_sa_manager *sa_manager,
			    unsigned size, unsigned align)
{
	unsigned soffset, eoffset, wasted;
	int i;

	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
		if (!list_empty(&sa_manager->flist[i])) {
			return true;
		}
	}

	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
	wasted = (align - (soffset % align)) % align;

	if ((eoffset - soffset) >= (size + wasted)) {
		return true;
	}

	return false;
}

static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,
				   struct radeon_fence **fences,
				   unsigned *tries)
{
	struct radeon_sa_bo *best_bo = NULL;
	unsigned i, soffset, best, tmp;

	/* if hole points to the end of the buffer */
	if (sa_manager->hole->next == &sa_manager->olist) {
		/* try again with its beginning */
		sa_manager->hole = &sa_manager->olist;
		return true;
	}

	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	/* to handle wrap around we add sa_manager->size */
	best = sa_manager->size * 2;
	/* go over all fence list and try to find the closest sa_bo
	 * of the current last
	 */
	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
		struct radeon_sa_bo *sa_bo;

		if (list_empty(&sa_manager->flist[i])) {
			continue;
		}

		sa_bo = list_first_entry(&sa_manager->flist[i],
					 struct radeon_sa_bo, flist);

		if (!radeon_fence_signaled(sa_bo->fence)) {
			fences[i] = sa_bo->fence;
			continue;
		}

		/* limit the number of tries each ring gets */
		if (tries[i] > 2) {
			continue;
		}

		tmp = sa_bo->soffset;
		if (tmp < soffset) {
			/* wrap around, pretend it's after */
			tmp += sa_manager->size;
		}
		tmp -= soffset;
		if (tmp < best) {
			/* this sa bo is the closest one */
			best = tmp;
			best_bo = sa_bo;
		}
	}

	if (best_bo) {
		++tries[best_bo->fence->ring];
		sa_manager->hole = best_bo->olist.prev;

		/* we knew that this one is signaled,
		   so it's save to remote it */
		radeon_sa_bo_remove_locked(best_bo);
		return true;
	}
	return false;
}

int radeon_sa_bo_new(struct radeon_device *rdev,
		     struct radeon_sa_manager *sa_manager,
		     struct radeon_sa_bo **sa_bo,
		     unsigned size, unsigned align, bool block)
{
	struct radeon_fence *fences[RADEON_NUM_RINGS];
	unsigned tries[RADEON_NUM_RINGS];
	int i, r;

	BUG_ON(align > sa_manager->align);
	BUG_ON(size > sa_manager->size);

	*sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
	if ((*sa_bo) == NULL) {
		return -ENOMEM;
	}
	(*sa_bo)->manager = sa_manager;
	(*sa_bo)->fence = NULL;
	INIT_LIST_HEAD(&(*sa_bo)->olist);
	INIT_LIST_HEAD(&(*sa_bo)->flist);

	spin_lock(&sa_manager->wq.lock);
	do {
		for (i = 0; i < RADEON_NUM_RINGS; ++i) {
			fences[i] = NULL;
			tries[i] = 0;
		}

		do {
			radeon_sa_bo_try_free(sa_manager);

			if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,
						   size, align)) {
				spin_unlock(&sa_manager->wq.lock);
				return 0;
			}

			/* see if we can skip over some allocations */
		} while (radeon_sa_bo_next_hole(sa_manager, fences, tries));

		for (i = 0; i < RADEON_NUM_RINGS; ++i)
			radeon_fence_ref(fences[i]);

		spin_unlock(&sa_manager->wq.lock);
		r = radeon_fence_wait_any(rdev, fences, false);
		for (i = 0; i < RADEON_NUM_RINGS; ++i)
			radeon_fence_unref(&fences[i]);
		spin_lock(&sa_manager->wq.lock);
		/* if we have nothing to wait for block */
		if (r == -ENOENT && block) {
			r = wait_event_interruptible_locked(
				sa_manager->wq, 
				radeon_sa_event(sa_manager, size, align)
			);

		} else if (r == -ENOENT) {
			r = -ENOMEM;
		}

	} while (!r);

	spin_unlock(&sa_manager->wq.lock);
	kfree(*sa_bo);
	*sa_bo = NULL;
	return r;
}

void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
		       struct radeon_fence *fence)
{
	struct radeon_sa_manager *sa_manager;

	if (sa_bo == NULL || *sa_bo == NULL) {
		return;
	}

	sa_manager = (*sa_bo)->manager;
	spin_lock(&sa_manager->wq.lock);
	if (fence && !radeon_fence_signaled(fence)) {
		(*sa_bo)->fence = radeon_fence_ref(fence);
		list_add_tail(&(*sa_bo)->flist,
			      &sa_manager->flist[fence->ring]);
	} else {
		radeon_sa_bo_remove_locked(*sa_bo);
	}
	wake_up_all_locked(&sa_manager->wq);
	spin_unlock(&sa_manager->wq.lock);
	*sa_bo = NULL;
}

#if defined(CONFIG_DEBUG_FS)
void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
				  struct seq_file *m)
{
	struct radeon_sa_bo *i;

	spin_lock(&sa_manager->wq.lock);
	list_for_each_entry(i, &sa_manager->olist, olist) {
		if (&i->olist == sa_manager->hole) {
			seq_printf(m, ">");
		} else {
			seq_printf(m, " ");
		}
		seq_printf(m, "[0x%08x 0x%08x] size %8d",
			   i->soffset, i->eoffset, i->eoffset - i->soffset);
		if (i->fence) {
			seq_printf(m, " protected by 0x%016llx on ring %d",
				   i->fence->seq, i->fence->ring);
		}
		seq_printf(m, "\n");
	}
	spin_unlock(&sa_manager->wq.lock);
}
#endif
Commit	Line	Data
b15ba512 JG	1	/*
	2	* Copyright 2011 Red Hat Inc.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	20	*
	21	* The above copyright notice and this permission notice (including the
	22	* next paragraph) shall be included in all copies or substantial portions
	23	* of the Software.
	24	*
	25	*/
	26	/*
	27	* Authors:
	28	* Jerome Glisse <glisse@freedesktop.org>
	29	*/
c3b7fe8b CK	30	/* Algorithm:
	31	*
	32	* We store the last allocated bo in "hole", we always try to allocate
	33	* after the last allocated bo. Principle is that in a linear GPU ring
	34	* progression was is after last is the oldest bo we allocated and thus
	35	* the first one that should no longer be in use by the GPU.
	36	*
	37	* If it's not the case we skip over the bo after last to the closest
	38	* done bo if such one exist. If none exist and we are not asked to
	39	* block we report failure to allocate.
	40	*
	41	* If we are asked to block we wait on all the oldest fence of all
	42	* rings. We just wait for any of those fence to complete.
	43	*/
760285e7	44	#include <drm/drmP.h>
b15ba512 JG	45	#include "radeon.h"
b15ba512 JG	46
c3b7fe8b CK	47	static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);
	48	static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);
	49
b15ba512 JG	50	int radeon_sa_bo_manager_init(struct radeon_device *rdev,
b15ba512 JG	51	struct radeon_sa_manager *sa_manager,
f92c99de	52	unsigned size, u32 align, u32 domain)
b15ba512	53	{
c3b7fe8b	54	int i, r;
b15ba512	55
bfb38d35	56	init_waitqueue_head(&sa_manager->wq);
b15ba512 JG	57	sa_manager->bo = NULL;
	58	sa_manager->size = size;
	59	sa_manager->domain = domain;
f92c99de	60	sa_manager->align = align;
c3b7fe8b CK	61	sa_manager->hole = &sa_manager->olist;
	62	INIT_LIST_HEAD(&sa_manager->olist);
	63	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
	64	INIT_LIST_HEAD(&sa_manager->flist[i]);
	65	}
b15ba512	66
f92c99de	67	r = radeon_bo_create(rdev, size, align, true,
7220f639	68	domain, NULL, &sa_manager->bo);
b15ba512 JG	69	if (r) {
	70	dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
	71	return r;
	72	}
	73
	74	return r;
	75	}
	76
	77	void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
	78	struct radeon_sa_manager *sa_manager)
	79	{
	80	struct radeon_sa_bo sa_bo, tmp;
	81
c3b7fe8b CK	82	if (!list_empty(&sa_manager->olist)) {
	83	sa_manager->hole = &sa_manager->olist,
	84	radeon_sa_bo_try_free(sa_manager);
	85	if (!list_empty(&sa_manager->olist)) {
	86	dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n");
	87	}
b15ba512	88	}
c3b7fe8b CK	89	list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
c3b7fe8b CK	90	radeon_sa_bo_remove_locked(sa_bo);
b15ba512 JG	91	}
	92	radeon_bo_unref(&sa_manager->bo);
	93	sa_manager->size = 0;
	94	}
	95
	96	int radeon_sa_bo_manager_start(struct radeon_device *rdev,
	97	struct radeon_sa_manager *sa_manager)
	98	{
	99	int r;
	100
	101	if (sa_manager->bo == NULL) {
	102	dev_err(rdev->dev, "no bo for sa manager\n");
	103	return -EINVAL;
	104	}
	105
	106	/* map the buffer */
	107	r = radeon_bo_reserve(sa_manager->bo, false);
	108	if (r) {
	109	dev_err(rdev->dev, "(%d) failed to reserve manager bo\n", r);
	110	return r;
	111	}
	112	r = radeon_bo_pin(sa_manager->bo, sa_manager->domain, &sa_manager->gpu_addr);
	113	if (r) {
	114	radeon_bo_unreserve(sa_manager->bo);
	115	dev_err(rdev->dev, "(%d) failed to pin manager bo\n", r);
	116	return r;
	117	}
	118	r = radeon_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
	119	radeon_bo_unreserve(sa_manager->bo);
	120	return r;
	121	}
	122
	123	int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
	124	struct radeon_sa_manager *sa_manager)
	125	{
	126	int r;
	127
	128	if (sa_manager->bo == NULL) {
	129	dev_err(rdev->dev, "no bo for sa manager\n");
	130	return -EINVAL;
	131	}
	132
	133	r = radeon_bo_reserve(sa_manager->bo, false);
	134	if (!r) {
	135	radeon_bo_kunmap(sa_manager->bo);
	136	radeon_bo_unpin(sa_manager->bo);
	137	radeon_bo_unreserve(sa_manager->bo);
	138	}
	139	return r;
	140	}
	141
557017a0 CK	142	static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)
557017a0 CK	143	{
c3b7fe8b CK	144	struct radeon_sa_manager *sa_manager = sa_bo->manager;
	145	if (sa_manager->hole == &sa_bo->olist) {
	146	sa_manager->hole = sa_bo->olist.prev;
	147	}
	148	list_del_init(&sa_bo->olist);
	149	list_del_init(&sa_bo->flist);
557017a0 CK	150	radeon_fence_unref(&sa_bo->fence);
	151	kfree(sa_bo);
	152	}
	153
c3b7fe8b CK	154	static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)
	155	{
	156	struct radeon_sa_bo sa_bo, tmp;
	157
	158	if (sa_manager->hole->next == &sa_manager->olist)
	159	return;
	160
	161	sa_bo = list_entry(sa_manager->hole->next, struct radeon_sa_bo, olist);
	162	list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
	163	if (sa_bo->fence == NULL \|\| !radeon_fence_signaled(sa_bo->fence)) {
	164	return;
	165	}
	166	radeon_sa_bo_remove_locked(sa_bo);
	167	}
	168	}
	169
	170	static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)
	171	{
	172	struct list_head *hole = sa_manager->hole;
	173
	174	if (hole != &sa_manager->olist) {
	175	return list_entry(hole, struct radeon_sa_bo, olist)->eoffset;
	176	}
	177	return 0;
	178	}
	179
	180	static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)
	181	{
	182	struct list_head *hole = sa_manager->hole;
	183
	184	if (hole->next != &sa_manager->olist) {
	185	return list_entry(hole->next, struct radeon_sa_bo, olist)->soffset;
	186	}
	187	return sa_manager->size;
	188	}
	189
	190	static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,
	191	struct radeon_sa_bo *sa_bo,
	192	unsigned size, unsigned align)
	193	{
	194	unsigned soffset, eoffset, wasted;
	195
	196	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	197	eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
	198	wasted = (align - (soffset % align)) % align;
	199
	200	if ((eoffset - soffset) >= (size + wasted)) {
	201	soffset += wasted;
	202
	203	sa_bo->manager = sa_manager;
	204	sa_bo->soffset = soffset;
	205	sa_bo->eoffset = soffset + size;
	206	list_add(&sa_bo->olist, sa_manager->hole);
	207	INIT_LIST_HEAD(&sa_bo->flist);
	208	sa_manager->hole = &sa_bo->olist;
	209	return true;
	210	}
	211	return false;
	212	}
	213
bfb38d35 CK	214	/**
	215	* radeon_sa_event - Check if we can stop waiting
	216	*
	217	* @sa_manager: pointer to the sa_manager
	218	* @size: number of bytes we want to allocate
	219	* @align: alignment we need to match
	220	*
	221	* Check if either there is a fence we can wait for or
	222	* enough free memory to satisfy the allocation directly
	223	*/
	224	static bool radeon_sa_event(struct radeon_sa_manager *sa_manager,
	225	unsigned size, unsigned align)
	226	{
	227	unsigned soffset, eoffset, wasted;
	228	int i;
	229
	230	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
	231	if (!list_empty(&sa_manager->flist[i])) {
	232	return true;
	233	}
	234	}
	235
	236	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	237	eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
	238	wasted = (align - (soffset % align)) % align;
	239
	240	if ((eoffset - soffset) >= (size + wasted)) {
	241	return true;
	242	}
	243
	244	return false;
	245	}
	246
c3b7fe8b CK	247	static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,
	248	struct radeon_fence **fences,
	249	unsigned *tries)
	250	{
	251	struct radeon_sa_bo *best_bo = NULL;
	252	unsigned i, soffset, best, tmp;
	253
	254	/* if hole points to the end of the buffer */
	255	if (sa_manager->hole->next == &sa_manager->olist) {
	256	/* try again with its beginning */
	257	sa_manager->hole = &sa_manager->olist;
	258	return true;
	259	}
	260
	261	soffset = radeon_sa_bo_hole_soffset(sa_manager);
	262	/* to handle wrap around we add sa_manager->size */
	263	best = sa_manager->size * 2;
	264	/* go over all fence list and try to find the closest sa_bo
	265	* of the current last
	266	*/
	267	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
	268	struct radeon_sa_bo *sa_bo;
	269
	270	if (list_empty(&sa_manager->flist[i])) {
	271	continue;
	272	}
	273
	274	sa_bo = list_first_entry(&sa_manager->flist[i],
	275	struct radeon_sa_bo, flist);
	276
	277	if (!radeon_fence_signaled(sa_bo->fence)) {
	278	fences[i] = sa_bo->fence;
	279	continue;
	280	}
	281
	282	/* limit the number of tries each ring gets */
	283	if (tries[i] > 2) {
	284	continue;
	285	}
	286
	287	tmp = sa_bo->soffset;
	288	if (tmp < soffset) {
	289	/* wrap around, pretend it's after */
	290	tmp += sa_manager->size;
	291	}
	292	tmp -= soffset;
	293	if (tmp < best) {
	294	/* this sa bo is the closest one */
	295	best = tmp;
	296	best_bo = sa_bo;
	297	}
	298	}
	299
	300	if (best_bo) {
	301	++tries[best_bo->fence->ring];
	302	sa_manager->hole = best_bo->olist.prev;
	303
	304	/* we knew that this one is signaled,
	305	so it's save to remote it */
	306	radeon_sa_bo_remove_locked(best_bo);
	307	return true;
	308	}
	309	return false;
	310	}
311
b15ba512 JG	312	int radeon_sa_bo_new(struct radeon_device *rdev,
b15ba512 JG	313	struct radeon_sa_manager *sa_manager,
2e0d9910	314	struct radeon_sa_bo **sa_bo,
557017a0	315	unsigned size, unsigned align, bool block)
b15ba512	316	{
c3b7fe8b CK	317	struct radeon_fence *fences[RADEON_NUM_RINGS];
c3b7fe8b CK	318	unsigned tries[RADEON_NUM_RINGS];
ddf03f5c	319	int i, r;
b15ba512	320
f92c99de	321	BUG_ON(align > sa_manager->align);
b15ba512	322	BUG_ON(size > sa_manager->size);
2e0d9910 CK	323
2e0d9910 CK	324	*sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
c3b7fe8b CK	325	if ((*sa_bo) == NULL) {
	326	return -ENOMEM;
	327	}
	328	(*sa_bo)->manager = sa_manager;
	329	(*sa_bo)->fence = NULL;
	330	INIT_LIST_HEAD(&(*sa_bo)->olist);
	331	INIT_LIST_HEAD(&(*sa_bo)->flist);
557017a0	332
bfb38d35	333	spin_lock(&sa_manager->wq.lock);
ddf03f5c	334	do {
c3b7fe8b CK	335	for (i = 0; i < RADEON_NUM_RINGS; ++i) {
	336	fences[i] = NULL;
	337	tries[i] = 0;
	338	}
b15ba512	339
c3b7fe8b CK	340	do {
c3b7fe8b CK	341	radeon_sa_bo_try_free(sa_manager);
b15ba512	342
c3b7fe8b CK	343	if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,
c3b7fe8b CK	344	size, align)) {
bfb38d35	345	spin_unlock(&sa_manager->wq.lock);
c3b7fe8b	346	return 0;
557017a0	347	}
557017a0	348
c3b7fe8b CK	349	/* see if we can skip over some allocations */
	350	} while (radeon_sa_bo_next_hole(sa_manager, fences, tries));
	351
8d5e1e5a NH	352	for (i = 0; i < RADEON_NUM_RINGS; ++i)
	353	radeon_fence_ref(fences[i]);
	354
bfb38d35 CK	355	spin_unlock(&sa_manager->wq.lock);
bfb38d35 CK	356	r = radeon_fence_wait_any(rdev, fences, false);
8d5e1e5a NH	357	for (i = 0; i < RADEON_NUM_RINGS; ++i)
8d5e1e5a NH	358	radeon_fence_unref(&fences[i]);
bfb38d35 CK	359	spin_lock(&sa_manager->wq.lock);
bfb38d35 CK	360	/* if we have nothing to wait for block */
ddf03f5c	361	if (r == -ENOENT && block) {
bfb38d35 CK	362	r = wait_event_interruptible_locked(
	363	sa_manager->wq,
	364	radeon_sa_event(sa_manager, size, align)
	365	);
ddf03f5c CK	366
	367	} else if (r == -ENOENT) {
	368	r = -ENOMEM;
bfb38d35	369	}
b15ba512	370
ddf03f5c CK	371	} while (!r);
ddf03f5c CK	372
bfb38d35	373	spin_unlock(&sa_manager->wq.lock);
c3b7fe8b CK	374	kfree(*sa_bo);
	375	*sa_bo = NULL;
	376	return r;
b15ba512 JG	377	}
b15ba512 JG	378
557017a0 CK	379	void radeon_sa_bo_free(struct radeon_device rdev, struct radeon_sa_bo *sa_bo,
557017a0 CK	380	struct radeon_fence *fence)
b15ba512	381	{
557017a0 CK	382	struct radeon_sa_manager *sa_manager;
557017a0 CK	383
c3b7fe8b	384	if (sa_bo == NULL \|\| *sa_bo == NULL) {
2e0d9910	385	return;
c3b7fe8b	386	}
2e0d9910	387
557017a0	388	sa_manager = (*sa_bo)->manager;
bfb38d35	389	spin_lock(&sa_manager->wq.lock);
876dc9f3	390	if (fence && !radeon_fence_signaled(fence)) {
557017a0	391	(*sa_bo)->fence = radeon_fence_ref(fence);
c3b7fe8b CK	392	list_add_tail(&(*sa_bo)->flist,
c3b7fe8b CK	393	&sa_manager->flist[fence->ring]);
557017a0 CK	394	} else {
	395	radeon_sa_bo_remove_locked(*sa_bo);
	396	}
bfb38d35 CK	397	wake_up_all_locked(&sa_manager->wq);
bfb38d35 CK	398	spin_unlock(&sa_manager->wq.lock);
2e0d9910	399	*sa_bo = NULL;
b15ba512	400	}
711a9729 CK	401
	402	#if defined(CONFIG_DEBUG_FS)
	403	void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
	404	struct seq_file *m)
	405	{
	406	struct radeon_sa_bo *i;
	407
bfb38d35	408	spin_lock(&sa_manager->wq.lock);
c3b7fe8b CK	409	list_for_each_entry(i, &sa_manager->olist, olist) {
	410	if (&i->olist == sa_manager->hole) {
	411	seq_printf(m, ">");
557017a0	412	} else {
c3b7fe8b CK	413	seq_printf(m, " ");
	414	}
	415	seq_printf(m, "[0x%08x 0x%08x] size %8d",
	416	i->soffset, i->eoffset, i->eoffset - i->soffset);
	417	if (i->fence) {
	418	seq_printf(m, " protected by 0x%016llx on ring %d",
	419	i->fence->seq, i->fence->ring);
557017a0	420	}
c3b7fe8b	421	seq_printf(m, "\n");
711a9729	422	}
bfb38d35	423	spin_unlock(&sa_manager->wq.lock);
711a9729 CK	424	}
711a9729 CK	425	#endif