dt-bindings: mfd: Add bindings for STM32 Timers driver

[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / Documentation / devicetree / bindings / mfd / stm32-timers.txt

diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
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+STM32 Timers driver bindings
+
+This IP provides 3 types of timer along with PWM functionality:
+- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
+  prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
+- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
+  programmable prescaler and PWM outputs.
+- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
+
+Required parameters:
+- compatible: must be "st,stm32-timers"
+
+- reg:                 Physical base address and length of the controller's
+                       registers.
+- clock-names:         Set to "int".
+- clocks:              Phandle to the clock used by the timer module.
+                       For Clk properties, please refer to ../clock/clock-bindings.txt
+
+Optional parameters:
+- resets:              Phandle to the parent reset controller.
+                       See ../reset/st,stm32-rcc.txt
+
+Optional subnodes:
+- pwm:                 See ../pwm/pwm-stm32.txt
+- timer:               See ../iio/timer/stm32-timer-trigger.txt
+
+Example:
+       timers@40010000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "st,stm32-timers";
+               reg = <0x40010000 0x400>;
+               clocks = <&rcc 0 160>;
+               clock-names = "clk_int";
+
+               pwm {
+                       compatible = "st,stm32-pwm";
+                       pinctrl-0       = <&pwm1_pins>;
+                       pinctrl-names   = "default";
+               };
+
+               timer@0 {
+                       compatible = "st,stm32-timer-trigger";
+                       reg = <0>;
+               };
+       };