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ALSA: ca0106 - clean up playback pointer callback
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / ca0106 / ca0106_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
3 * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
48510070 4 * Version: 0.0.25
1da177e4
LT		 5 *
6 * FEATURES currently supported:
7 * Front, Rear and Center/LFE.
8 * Surround40 and Surround51.
9 * Capture from MIC an LINE IN input.
10 * SPDIF digital playback of PCM stereo and AC3/DTS works.
11 * (One can use a standard mono mini-jack to one RCA plugs cable.
12 * or one can use a standard stereo mini-jack to two RCA plugs cable.
13 * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
14 * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
15 * Notes on how to capture sound:
16 * The AC97 is used in the PLAYBACK direction.
17 * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
18 * So, to record from the MIC, set the MIC Playback volume to max,
19 * unmute the MIC and turn up the MASTER Playback volume.
20 * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
21 *
22 * The only playback controls that currently do anything are: -
23 * Analog Front
24 * Analog Rear
25 * Analog Center/LFE
26 * SPDIF Front
27 * SPDIF Rear
28 * SPDIF Center/LFE
29 *
30 * For capture from Mic in or Line in.
31 * Digital/Analog ( switch must be in Analog mode for CAPTURE. )
32 *
33 * CAPTURE feedback into PLAYBACK
34 *
35 * Changelog:
36 * Support interrupts per period.
37 * Removed noise from Center/LFE channel when in Analog mode.
38 * Rename and remove mixer controls.
39 * 0.0.6
40 * Use separate card based DMA buffer for periods table list.
41 * 0.0.7
42 * Change remove and rename ctrls into lists.
43 * 0.0.8
44 * Try to fix capture sources.
45 * 0.0.9
46 * Fix AC3 output.
47 * Enable S32_LE format support.
48 * 0.0.10
49 * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
50 * 0.0.11
51 * Add Model name recognition.
52 * 0.0.12
53 * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
54 * Remove redundent "voice" handling.
55 * 0.0.13
56 * Single trigger call for multi channels.
57 * 0.0.14
58 * Set limits based on what the sound card hardware can do.
59 * playback periods_min=2, periods_max=8
60 * capture hw constraints require period_size = n * 64 bytes.
61 * playback hw constraints require period_size = n * 64 bytes.
62 * 0.0.15
63 * Minor updates.
64 * 0.0.16
65 * Implement 192000 sample rate.
66 * 0.0.17
67 * Add support for SB0410 and SB0413.
68 * 0.0.18
69 * Modified Copyright message.
70 * 0.0.19
71 * Finally fix support for SB Live 24 bit. SB0410 and SB0413.
72 * The output codec needs resetting, otherwise all output is muted.
73 * 0.0.20
74 * Merge "pci_disable_device(pci);" fixes.
75 * 0.0.21
76 * Add 4 capture channels. (SPDIF only comes in on channel 0. )
77 * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
78 * 0.0.22
79 * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
7199acdc
JCD		 80 * 0.0.23
81 * Implement support for Line-in capture on SB Live 24bit.
b18cd538
TP		 82 * 0.0.24
83 * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
48510070
TP		 84 * 0.0.25
85 * Powerdown SPI DAC channels when not in use
1da177e4
LT		 86 *
87 * BUGS:
88 * Some stability problems when unloading the snd-ca0106 kernel module.
89 * --
90 *
91 * TODO:
92 * 4 Capture channels, only one implemented so far.
93 * Other capture rates apart from 48khz not implemented.
94 * MIDI
95 * --
96 * GENERAL INFO:
97 * Model: SB0310
98 * P17 Chip: CA0106-DAT
99 * AC97 Codec: STAC 9721
100 * ADC: Philips 1361T (Stereo 24bit)
101 * DAC: WM8746EDS (6-channel, 24bit, 192Khz)
102 *
103 * GENERAL INFO:
104 * Model: SB0410
105 * P17 Chip: CA0106-DAT
106 * AC97 Codec: None
107 * ADC: WM8775EDS (4 Channel)
108 * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
109 * SPDIF Out control switches between Mic in and SPDIF out.
110 * No sound out or mic input working yet.
111 *
112 * GENERAL INFO:
113 * Model: SB0413
114 * P17 Chip: CA0106-DAT
115 * AC97 Codec: None.
116 * ADC: Unknown
117 * DAC: Unknown
118 * Trying to handle it like the SB0410.
119 *
120 * This code was initally based on code from ALSA's emu10k1x.c which is:
121 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
122 *
123 * This program is free software; you can redistribute it and/or modify
124 * it under the terms of the GNU General Public License as published by
125 * the Free Software Foundation; either version 2 of the License, or
126 * (at your option) any later version.
127 *
128 * This program is distributed in the hope that it will be useful,
129 * but WITHOUT ANY WARRANTY; without even the implied warranty of
130 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
131 * GNU General Public License for more details.
132 *
133 * You should have received a copy of the GNU General Public License
134 * along with this program; if not, write to the Free Software
135 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
136 *
137 */
1da177e4
LT		 138#include <linux/delay.h>
139#include <linux/init.h>
140#include <linux/interrupt.h>
141#include <linux/pci.h>
142#include <linux/slab.h>
143#include <linux/moduleparam.h>
299676b1 144#include <linux/dma-mapping.h>
1da177e4
LT		 145#include <sound/core.h>
146#include <sound/initval.h>
147#include <sound/pcm.h>
148#include <sound/ac97_codec.h>
149#include <sound/info.h>
150
151MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
152MODULE_DESCRIPTION("CA0106");
153MODULE_LICENSE("GPL");
154MODULE_SUPPORTED_DEVICE("{{Creative,SB CA0106 chip}}");
155
156// module parameters (see "Module Parameters")
157static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
158static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
159static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
e4f55d80 160static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
1da177e4
LT		 161
162module_param_array(index, int, NULL, 0444);
163MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
164module_param_array(id, charp, NULL, 0444);
165MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
166module_param_array(enable, bool, NULL, 0444);
167MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
e4f55d80
JCD		 168module_param_array(subsystem, uint, NULL, 0444);
169MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
1da177e4
LT		 170
171#include "ca0106.h"
172
e4a3d145 173static struct snd_ca0106_details ca0106_chip_details[] = {
8632649b
JCD		 174 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
175 /* It is really just a normal SB Live 24bit. */
aaccf54f
JCD		 176 /* Tested:
177 * See ALSA bug#3251
178 */
179 { .serial = 0x10131102,
180 .name = "X-Fi Extreme Audio [SBxxxx]",
181 .gpio_type = 1,
182 .i2c_adc = 1 } ,
183 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
184 /* It is really just a normal SB Live 24bit. */
8632649b
JCD		 185 /*
186 * CTRL:CA0111-WTLF
187 * ADC: WM8775SEDS
188 * DAC: CS4382-KQZ
189 */
190 /* Tested:
191 * Playback on front, rear, center/lfe speakers
192 * Capture from Mic in.
193 * Not-Tested:
194 * Capture from Line in.
195 * Playback to digital out.
196 */
197 { .serial = 0x10121102,
198 .name = "X-Fi Extreme Audio [SB0790]",
199 .gpio_type = 1,
200 .i2c_adc = 1 } ,
201 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
1baa705b
JCD		 202 /* AudigyLS[SB0310] */
203 { .serial = 0x10021102,
204 .name = "AudigyLS [SB0310]",
205 .ac97 = 1 } ,
206 /* Unknown AudigyLS that also says SB0310 on it */
207 { .serial = 0x10051102,
208 .name = "AudigyLS [SB0310b]",
209 .ac97 = 1 } ,
210 /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
211 { .serial = 0x10061102,
212 .name = "Live! 7.1 24bit [SB0410]",
7199acdc
JCD		 213 .gpio_type = 1,
214 .i2c_adc = 1 } ,
1baa705b
JCD		 215 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
216 { .serial = 0x10071102,
217 .name = "Live! 7.1 24bit [SB0413]",
7199acdc
JCD		 218 .gpio_type = 1,
219 .i2c_adc = 1 } ,
a5875159
JCD		 220 /* New Audigy SE. Has a different DAC. */
221 /* SB0570:
222 * CTRL:CA0106-DAT
58398895
JCD		 223 * ADC: WM8775EDS
224 * DAC: WM8768GEDS
a5875159
JCD		 225 */
226 { .serial = 0x100a1102,
227 .name = "Audigy SE [SB0570]",
228 .gpio_type = 1,
229 .i2c_adc = 1,
230 .spi_dac = 1 } ,
e4f55d80
JCD		 231 /* New Audigy LS. Has a different DAC. */
232 /* SB0570:
233 * CTRL:CA0106-DAT
234 * ADC: WM8775EDS
235 * DAC: WM8768GEDS
236 */
237 { .serial = 0x10111102,
d5f6a38d 238 .name = "Audigy SE OEM [SB0570a]",
e4f55d80
JCD		 239 .gpio_type = 1,
240 .i2c_adc = 1,
241 .spi_dac = 1 } ,
1baa705b 242 /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
be0b7b01
JCD		 243 /* SB0438
244 * CTRL:CA0106-DAT
245 * ADC: WM8775SEDS
246 * DAC: CS4382-KQZ
247 */
1baa705b
JCD		 248 { .serial = 0x10091462,
249 .name = "MSI K8N Diamond MB [SB0438]",
be0b7b01 250 .gpio_type = 2,
7199acdc 251 .i2c_adc = 1 } ,
c5d44423 252 /* MSI K8N Diamond PLUS MB */
f52845ad
TI		 253 { .serial = 0x10091102,
254 .name = "MSI K8N Diamond MB",
255 .gpio_type = 2,
c5d44423 256 .i2c_adc = 1,
bb1f24bf 257 .spi_dac = 1 } ,
f3a374e5
TI		 258 /* Giga-byte GA-G1975X mobo
259 * Novell bnc#395807
260 */
261 /* FIXME: the GPIO and I2C setting aren't tested well */
262 { .serial = 0x1458a006,
263 .name = "Giga-byte GA-G1975X",
264 .gpio_type = 1,
265 .i2c_adc = 1 },
be3cd57a
JCD		 266 /* Shuttle XPC SD31P which has an onboard Creative Labs
267 * Sound Blaster Live! 24-bit EAX
1b05962e
JCD		 268 * high-definition 7.1 audio processor".
269 * Added using info from andrewvegan in alsa bug #1298
270 */
271 { .serial = 0x30381297,
272 .name = "Shuttle XPC SD31P [SD31P]",
273 .gpio_type = 1,
274 .i2c_adc = 1 } ,
be3cd57a
JCD		 275 /* Shuttle XPC SD11G5 which has an onboard Creative Labs
276 * Sound Blaster Live! 24-bit EAX
277 * high-definition 7.1 audio processor".
278 * Fixes ALSA bug#1600
279 */
280 { .serial = 0x30411297,
281 .name = "Shuttle XPC SD11G5 [SD11G5]",
282 .gpio_type = 1,
283 .i2c_adc = 1 } ,
1baa705b
JCD		 284 { .serial = 0,
285 .name = "AudigyLS [Unknown]" }
1da177e4
LT		 286};
287
288/* hardware definition */
e4a3d145 289static struct snd_pcm_hardware snd_ca0106_playback_hw = {
b83f346b
CL		 290 .info = SNDRV_PCM_INFO_MMAP |
291 SNDRV_PCM_INFO_INTERLEAVED |
292 SNDRV_PCM_INFO_BLOCK_TRANSFER |
293 SNDRV_PCM_INFO_MMAP_VALID |
294 SNDRV_PCM_INFO_SYNC_START,
1da177e4 295 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
95a98265
TI		 296 .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
297 SNDRV_PCM_RATE_192000),
1da177e4
LT		 298 .rate_min = 48000,
299 .rate_max = 192000,
300 .channels_min = 2, //1,
301 .channels_max = 2, //6,
302 .buffer_bytes_max = ((65536 - 64) * 8),
303 .period_bytes_min = 64,
304 .period_bytes_max = (65536 - 64),
305 .periods_min = 2,
306 .periods_max = 8,
307 .fifo_size = 0,
308};
309
e4a3d145 310static struct snd_pcm_hardware snd_ca0106_capture_hw = {
1da177e4
LT		 311 .info = (SNDRV_PCM_INFO_MMAP |
312 SNDRV_PCM_INFO_INTERLEAVED |
313 SNDRV_PCM_INFO_BLOCK_TRANSFER |
314 SNDRV_PCM_INFO_MMAP_VALID),
883130b4 315 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
ff75427a 316#if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
95a98265
TI		 317 .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
318 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
883130b4 319 .rate_min = 44100,
ff75427a
TI		 320#else
321 .rates = (SNDRV_PCM_RATE_48000 |
322 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
323 .rate_min = 48000,
324#endif /* FIXME */
883130b4 325 .rate_max = 192000,
1da177e4
LT		 326 .channels_min = 2,
327 .channels_max = 2,
34fdeb2d 328 .buffer_bytes_max = 65536 - 128,
1da177e4 329 .period_bytes_min = 64,
34fdeb2d 330 .period_bytes_max = 32768 - 64,
1da177e4
LT		 331 .periods_min = 2,
332 .periods_max = 2,
333 .fifo_size = 0,
334};
335
e4a3d145 336unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
1da177e4
LT		 337 unsigned int reg,
338 unsigned int chn)
339{
340 unsigned long flags;
341 unsigned int regptr, val;
342
343 regptr = (reg << 16) | chn;
344
345 spin_lock_irqsave(&emu->emu_lock, flags);
346 outl(regptr, emu->port + PTR);
347 val = inl(emu->port + DATA);
348 spin_unlock_irqrestore(&emu->emu_lock, flags);
349 return val;
350}
351
e4a3d145 352void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
1da177e4
LT		 353 unsigned int reg,
354 unsigned int chn,
355 unsigned int data)
356{
357 unsigned int regptr;
358 unsigned long flags;
359
360 regptr = (reg << 16) | chn;
361
362 spin_lock_irqsave(&emu->emu_lock, flags);
363 outl(regptr, emu->port + PTR);
364 outl(data, emu->port + DATA);
365 spin_unlock_irqrestore(&emu->emu_lock, flags);
366}
367
aad90953
JCD		 368int snd_ca0106_spi_write(struct snd_ca0106 * emu,
369 unsigned int data)
a5875159 370{
aad90953
JCD		 371 unsigned int reset, set;
372 unsigned int reg, tmp;
373 int n, result;
374 reg = SPI;
375 if (data > 0xffff) /* Only 16bit values allowed */
376 return 1;
377 tmp = snd_ca0106_ptr_read(emu, reg, 0);
378 reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
379 set = reset | 0x10000; /* Set xxx1xxxx */
380 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
381 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
382 snd_ca0106_ptr_write(emu, reg, 0, set | data);
383 result = 1;
384 /* Wait for status bit to return to 0 */
385 for (n = 0; n < 100; n++) {
386 udelay(10);
387 tmp = snd_ca0106_ptr_read(emu, reg, 0);
388 if (!(tmp & 0x10000)) {
389 result = 0;
390 break;
391 }
392 }
393 if (result) /* Timed out */
394 return 1;
395 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
396 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
a5875159
JCD		 397 return 0;
398}
399
6129daaa 400/* The ADC does not support i2c read, so only write is implemented */
e4a3d145 401int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
7199acdc
JCD		 402 u32 reg,
403 u32 value)
404{
405 u32 tmp;
95a98265 406 int timeout = 0;
7199acdc
JCD		 407 int status;
408 int retry;
95a98265 409 if ((reg > 0x7f) || (value > 0x1ff)) {
99b359ba 410 snd_printk(KERN_ERR "i2c_write: invalid values.\n");
7199acdc
JCD		 411 return -EINVAL;
412 }
413
414 tmp = reg << 25 | value << 16;
ee419653
TI		 415 /*
416 snd_printk(KERN_DEBUG "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
417 */
8fabab15
JCD		 418 /* Not sure what this I2C channel controls. */
419 /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
420
421 /* This controls the I2C connected to the WM8775 ADC Codec */
7199acdc
JCD		 422 snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
423
95a98265 424 for (retry = 0; retry < 10; retry++) {
7199acdc 425 /* Send the data to i2c */
6129daaa
JCD		 426 //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
427 //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
428 tmp = 0;
7199acdc
JCD		 429 tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
430 snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
431
432 /* Wait till the transaction ends */
95a98265 433 while (1) {
7199acdc 434 status = snd_ca0106_ptr_read(emu, I2C_A, 0);
ee419653 435 /*snd_printk(KERN_DEBUG "I2C:status=0x%x\n", status);*/
7199acdc 436 timeout++;
95a98265 437 if ((status & I2C_A_ADC_START) == 0)
7199acdc
JCD		 438 break;
439
95a98265 440 if (timeout > 1000)
7199acdc
JCD		 441 break;
442 }
443 //Read back and see if the transaction is successful
95a98265 444 if ((status & I2C_A_ADC_ABORT) == 0)
7199acdc
JCD		 445 break;
446 }
447
95a98265 448 if (retry == 10) {
99b359ba 449 snd_printk(KERN_ERR "Writing to ADC failed!\n");
7199acdc
JCD		 450 return -EINVAL;
451 }
452
453 return 0;
454}
455
456
e4a3d145 457static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
1da177e4
LT		 458{
459 unsigned long flags;
d967a027
HH		 460 unsigned int intr_enable;
461
1da177e4 462 spin_lock_irqsave(&emu->emu_lock, flags);
d967a027
HH		 463 intr_enable = inl(emu->port + INTE) | intrenb;
464 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 465 spin_unlock_irqrestore(&emu->emu_lock, flags);
466}
467
e4a3d145 468static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
8a5afd29
JCD		 469{
470 unsigned long flags;
d967a027
HH		 471 unsigned int intr_enable;
472
8a5afd29 473 spin_lock_irqsave(&emu->emu_lock, flags);
d967a027
HH		 474 intr_enable = inl(emu->port + INTE) & ~intrenb;
475 outl(intr_enable, emu->port + INTE);
8a5afd29
JCD		 476 spin_unlock_irqrestore(&emu->emu_lock, flags);
477}
478
479
e4a3d145 480static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 481{
4d572776 482 kfree(runtime->private_data);
1da177e4
LT		 483}
484
48510070
TP		 485static const int spi_dacd_reg[] = {
486 [PCM_FRONT_CHANNEL] = SPI_DACD4_REG,
487 [PCM_REAR_CHANNEL] = SPI_DACD0_REG,
488 [PCM_CENTER_LFE_CHANNEL]= SPI_DACD2_REG,
489 [PCM_UNKNOWN_CHANNEL] = SPI_DACD1_REG,
490};
491static const int spi_dacd_bit[] = {
18b5d32f
TP		 492 [PCM_FRONT_CHANNEL] = SPI_DACD4_BIT,
493 [PCM_REAR_CHANNEL] = SPI_DACD0_BIT,
494 [PCM_CENTER_LFE_CHANNEL]= SPI_DACD2_BIT,
495 [PCM_UNKNOWN_CHANNEL] = SPI_DACD1_BIT,
48510070
TP		 496};
497
3d475829
TI		 498static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
499{
500 if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
501 chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
502 snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
503 chip->spdif_str_bits[idx]);
504 }
505}
506
1da177e4 507/* open_playback callback */
e4a3d145
TI		 508static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
509 int channel_id)
1da177e4 510{
e4a3d145
TI		 511 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
512 struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
513 struct snd_ca0106_pcm *epcm;
514 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 515 int err;
516
e560d8d8 517 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 518
519 if (epcm == NULL)
520 return -ENOMEM;
521 epcm->emu = chip;
522 epcm->substream = substream;
523 epcm->channel_id=channel_id;
524
525 runtime->private_data = epcm;
526 runtime->private_free = snd_ca0106_pcm_free_substream;
527
528 runtime->hw = snd_ca0106_playback_hw;
529
530 channel->emu = chip;
531 channel->number = channel_id;
532
95a98265 533 channel->use = 1;
ee419653
TI		 534 /*
535 printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
536 channel_id, chip, channel);
537 */
1da177e4 538 //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
95a98265 539 channel->epcm = epcm;
1da177e4
LT		 540 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
541 return err;
542 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
543 return err;
b83f346b 544 snd_pcm_set_sync(substream);
48510070
TP		 545
546 if (chip->details->spi_dac && channel_id != PCM_FRONT_CHANNEL) {
547 const int reg = spi_dacd_reg[channel_id];
548
549 /* Power up dac */
550 chip->spi_dac_reg[reg] &= ~spi_dacd_bit[channel_id];
551 err = snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]);
552 if (err < 0)
553 return err;
554 }
3d475829
TI		 555
556 restore_spdif_bits(chip, channel_id);
557
1da177e4
LT		 558 return 0;
559}
560
561/* close callback */
e4a3d145 562static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
1da177e4 563{
e4a3d145
TI		 564 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
565 struct snd_pcm_runtime *runtime = substream->runtime;
566 struct snd_ca0106_pcm *epcm = runtime->private_data;
567 chip->playback_channels[epcm->channel_id].use = 0;
48510070 568
3d475829
TI		 569 restore_spdif_bits(chip, epcm->channel_id);
570
48510070
TP		 571 if (chip->details->spi_dac && epcm->channel_id != PCM_FRONT_CHANNEL) {
572 const int reg = spi_dacd_reg[epcm->channel_id];
573
574 /* Power down DAC */
575 chip->spi_dac_reg[reg] |= spi_dacd_bit[epcm->channel_id];
576 snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]);
577 }
e4a3d145 578 /* FIXME: maybe zero others */
1da177e4
LT		 579 return 0;
580}
581
e4a3d145 582static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
1da177e4
LT		 583{
584 return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
585}
586
e4a3d145 587static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
1da177e4
LT		 588{
589 return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
590}
591
e4a3d145 592static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
1da177e4
LT		 593{
594 return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
595}
596
e4a3d145 597static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
1da177e4
LT		 598{
599 return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
600}
601
602/* open_capture callback */
e4a3d145
TI		 603static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
604 int channel_id)
1da177e4 605{
e4a3d145
TI		 606 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
607 struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
608 struct snd_ca0106_pcm *epcm;
609 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 610 int err;
611
e560d8d8 612 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4 613 if (epcm == NULL) {
99b359ba 614 snd_printk(KERN_ERR "open_capture_channel: failed epcm alloc\n");
1da177e4
LT		 615 return -ENOMEM;
616 }
617 epcm->emu = chip;
618 epcm->substream = substream;
619 epcm->channel_id=channel_id;
620
621 runtime->private_data = epcm;
622 runtime->private_free = snd_ca0106_pcm_free_substream;
623
624 runtime->hw = snd_ca0106_capture_hw;
625
626 channel->emu = chip;
627 channel->number = channel_id;
628
95a98265 629 channel->use = 1;
ee419653
TI		 630 /*
631 printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
632 channel_id, chip, channel);
633 */
1da177e4 634 //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
e4a3d145 635 channel->epcm = epcm;
1da177e4
LT		 636 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
637 return err;
638 //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
639 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
640 return err;
641 return 0;
642}
643
644/* close callback */
e4a3d145 645static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
1da177e4 646{
e4a3d145
TI		 647 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
648 struct snd_pcm_runtime *runtime = substream->runtime;
649 struct snd_ca0106_pcm *epcm = runtime->private_data;
650 chip->capture_channels[epcm->channel_id].use = 0;
651 /* FIXME: maybe zero others */
1da177e4
LT		 652 return 0;
653}
654
e4a3d145 655static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 656{
657 return snd_ca0106_pcm_open_capture_channel(substream, 0);
658}
659
e4a3d145 660static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 661{
662 return snd_ca0106_pcm_open_capture_channel(substream, 1);
663}
664
e4a3d145 665static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 666{
667 return snd_ca0106_pcm_open_capture_channel(substream, 2);
668}
669
e4a3d145 670static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 671{
672 return snd_ca0106_pcm_open_capture_channel(substream, 3);
673}
674
675/* hw_params callback */
e4a3d145
TI		 676static int snd_ca0106_pcm_hw_params_playback(struct snd_pcm_substream *substream,
677 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 678{
679 return snd_pcm_lib_malloc_pages(substream,
680 params_buffer_bytes(hw_params));
681}
682
683/* hw_free callback */
e4a3d145 684static int snd_ca0106_pcm_hw_free_playback(struct snd_pcm_substream *substream)
1da177e4
LT		 685{
686 return snd_pcm_lib_free_pages(substream);
687}
688
689/* hw_params callback */
e4a3d145
TI		 690static int snd_ca0106_pcm_hw_params_capture(struct snd_pcm_substream *substream,
691 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 692{
693 return snd_pcm_lib_malloc_pages(substream,
694 params_buffer_bytes(hw_params));
695}
696
697/* hw_free callback */
e4a3d145 698static int snd_ca0106_pcm_hw_free_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 699{
700 return snd_pcm_lib_free_pages(substream);
701}
702
703/* prepare playback callback */
e4a3d145 704static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
1da177e4 705{
e4a3d145
TI		 706 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
707 struct snd_pcm_runtime *runtime = substream->runtime;
708 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4
LT		 709 int channel = epcm->channel_id;
710 u32 *table_base = (u32 *)(emu->buffer.area+(8*16*channel));
711 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
712 u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
713 u32 hcfg_set = 0x00000000;
714 u32 hcfg;
715 u32 reg40_mask = 0x30000 << (channel<<1);
716 u32 reg40_set = 0;
717 u32 reg40;
718 /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
719 u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
720 u32 reg71_set = 0;
721 u32 reg71;
722 int i;
723
ee419653
TI		 724#if 0 /* debug */
725 snd_printk(KERN_DEBUG
726 "prepare:channel_number=%d, rate=%d, format=0x%x, "
727 "channels=%d, buffer_size=%ld, period_size=%ld, "
728 "periods=%u, frames_to_bytes=%d\n",
729 channel, runtime->rate, runtime->format,
730 runtime->channels, runtime->buffer_size,
731 runtime->period_size, runtime->periods,
732 frames_to_bytes(runtime, 1));
733 snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, table_base=%p\n",
734 runtime->dma_addr, runtime->dma_area, table_base);
735 snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
736 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
737#endif /* debug */
1da177e4
LT		 738 /* Rate can be set per channel. */
739 /* reg40 control host to fifo */
740 /* reg71 controls DAC rate. */
741 switch (runtime->rate) {
742 case 44100:
743 reg40_set = 0x10000 << (channel<<1);
744 reg71_set = 0x01010000;
745 break;
746 case 48000:
747 reg40_set = 0;
748 reg71_set = 0;
749 break;
750 case 96000:
751 reg40_set = 0x20000 << (channel<<1);
752 reg71_set = 0x02020000;
753 break;
754 case 192000:
755 reg40_set = 0x30000 << (channel<<1);
756 reg71_set = 0x03030000;
757 break;
758 default:
759 reg40_set = 0;
760 reg71_set = 0;
761 break;
762 }
763 /* Format is a global setting */
764 /* FIXME: Only let the first channel accessed set this. */
765 switch (runtime->format) {
766 case SNDRV_PCM_FORMAT_S16_LE:
767 hcfg_set = 0;
768 break;
769 case SNDRV_PCM_FORMAT_S32_LE:
770 hcfg_set = HCFG_PLAYBACK_S32_LE;
771 break;
772 default:
773 hcfg_set = 0;
774 break;
775 }
776 hcfg = inl(emu->port + HCFG) ;
777 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
778 outl(hcfg, emu->port + HCFG);
779 reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
780 reg40 = (reg40 & ~reg40_mask) | reg40_set;
781 snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
782 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
783 reg71 = (reg71 & ~reg71_mask) | reg71_set;
784 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
785
786 /* FIXME: Check emu->buffer.size before actually writing to it. */
787 for(i=0; i < runtime->periods; i++) {
95a98265
TI		 788 table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
789 table_base[i*2+1] = period_size_bytes << 16;
1da177e4
LT		 790 }
791
792 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer.addr+(8*16*channel));
793 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
794 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
795 snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
796 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
797 /* FIXME test what 0 bytes does. */
798 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
799 snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
800 snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
801 snd_ca0106_ptr_write(emu, 0x08, channel, 0);
802 snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
803#if 0
804 snd_ca0106_ptr_write(emu, SPCS0, 0,
805 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
806 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
807 SPCS_GENERATIONSTATUS | 0x00001200 |
808 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
1da177e4
LT		 809#endif
810
811 return 0;
812}
813
814/* prepare capture callback */
e4a3d145 815static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
1da177e4 816{
e4a3d145
TI		 817 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
818 struct snd_pcm_runtime *runtime = substream->runtime;
819 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4 820 int channel = epcm->channel_id;
883130b4
JCD		 821 u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
822 u32 hcfg_set = 0x00000000;
823 u32 hcfg;
824 u32 over_sampling=0x2;
825 u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
826 u32 reg71_set = 0;
827 u32 reg71;
828
ee419653
TI		 829#if 0 /* debug */
830 snd_printk(KERN_DEBUG
831 "prepare:channel_number=%d, rate=%d, format=0x%x, "
832 "channels=%d, buffer_size=%ld, period_size=%ld, "
833 "periods=%u, frames_to_bytes=%d\n",
834 channel, runtime->rate, runtime->format,
835 runtime->channels, runtime->buffer_size,
836 runtime->period_size, runtime->periods,
837 frames_to_bytes(runtime, 1));
838 snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, table_base=%p\n",
839 runtime->dma_addr, runtime->dma_area, table_base);
840 snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
841 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
842#endif /* debug */
883130b4
JCD		 843 /* reg71 controls ADC rate. */
844 switch (runtime->rate) {
845 case 44100:
846 reg71_set = 0x00004000;
847 break;
848 case 48000:
849 reg71_set = 0;
850 break;
851 case 96000:
852 reg71_set = 0x00008000;
853 over_sampling=0xa;
854 break;
855 case 192000:
856 reg71_set = 0x0000c000;
857 over_sampling=0xa;
858 break;
859 default:
860 reg71_set = 0;
861 break;
862 }
863 /* Format is a global setting */
864 /* FIXME: Only let the first channel accessed set this. */
865 switch (runtime->format) {
866 case SNDRV_PCM_FORMAT_S16_LE:
867 hcfg_set = 0;
868 break;
869 case SNDRV_PCM_FORMAT_S32_LE:
870 hcfg_set = HCFG_CAPTURE_S32_LE;
871 break;
872 default:
873 hcfg_set = 0;
874 break;
875 }
876 hcfg = inl(emu->port + HCFG) ;
877 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
878 outl(hcfg, emu->port + HCFG);
879 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
880 reg71 = (reg71 & ~reg71_mask) | reg71_set;
881 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
882 if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
883 snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
884 }
885
886
ee419653
TI		 887 /*
888 printk(KERN_DEBUG
889 "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
890 "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
891 channel, runtime->rate, runtime->format, runtime->channels,
892 runtime->buffer_size, runtime->period_size,
893 frames_to_bytes(runtime, 1));
894 */
1da177e4
LT		 895 snd_ca0106_ptr_write(emu, 0x13, channel, 0);
896 snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
897 snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
898 snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
899
900 return 0;
901}
902
903/* trigger_playback callback */
e4a3d145 904static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
1da177e4
LT		 905 int cmd)
906{
e4a3d145
TI		 907 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
908 struct snd_pcm_runtime *runtime;
909 struct snd_ca0106_pcm *epcm;
1da177e4
LT		 910 int channel;
911 int result = 0;
e4a3d145 912 struct snd_pcm_substream *s;
1da177e4
LT		 913 u32 basic = 0;
914 u32 extended = 0;
5da95273
TI		 915 u32 bits;
916 int running = 0;
1da177e4
LT		 917
918 switch (cmd) {
919 case SNDRV_PCM_TRIGGER_START:
5da95273
TI		 920 case SNDRV_PCM_TRIGGER_RESUME:
921 running = 1;
1da177e4
LT		 922 break;
923 case SNDRV_PCM_TRIGGER_STOP:
5da95273 924 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4 925 default:
5da95273 926 running = 0;
1da177e4
LT		 927 break;
928 }
ef991b95 929 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL		 930 if (snd_pcm_substream_chip(s) != emu ||
931 s->stream != SNDRV_PCM_STREAM_PLAYBACK)
932 continue;
1da177e4
LT		 933 runtime = s->runtime;
934 epcm = runtime->private_data;
935 channel = epcm->channel_id;
ee419653 936 /* snd_printk(KERN_DEBUG "channel=%d\n", channel); */
1da177e4 937 epcm->running = running;
5da95273
TI		 938 basic |= (0x1 << channel);
939 extended |= (0x10 << channel);
1da177e4
LT		 940 snd_pcm_trigger_done(s, substream);
941 }
ee419653 942 /* snd_printk(KERN_DEBUG "basic=0x%x, extended=0x%x\n",basic, extended); */
1da177e4
LT		 943
944 switch (cmd) {
945 case SNDRV_PCM_TRIGGER_START:
5da95273
TI		 946 case SNDRV_PCM_TRIGGER_RESUME:
947 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
948 bits |= extended;
949 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
950 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
951 bits |= basic;
952 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
1da177e4
LT		 953 break;
954 case SNDRV_PCM_TRIGGER_STOP:
5da95273
TI		 955 case SNDRV_PCM_TRIGGER_SUSPEND:
956 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
957 bits &= ~basic;
958 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
959 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
960 bits &= ~extended;
961 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
1da177e4
LT		 962 break;
963 default:
964 result = -EINVAL;
965 break;
966 }
967 return result;
968}
969
970/* trigger_capture callback */
e4a3d145 971static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
1da177e4
LT		 972 int cmd)
973{
e4a3d145
TI		 974 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
975 struct snd_pcm_runtime *runtime = substream->runtime;
976 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4
LT		 977 int channel = epcm->channel_id;
978 int result = 0;
979
980 switch (cmd) {
981 case SNDRV_PCM_TRIGGER_START:
982 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
983 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
984 epcm->running = 1;
985 break;
986 case SNDRV_PCM_TRIGGER_STOP:
987 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
988 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
989 epcm->running = 0;
990 break;
991 default:
992 result = -EINVAL;
993 break;
994 }
995 return result;
996}
997
998/* pointer_playback callback */
999static snd_pcm_uframes_t
e4a3d145 1000snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
1da177e4 1001{
e4a3d145
TI		 1002 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1003 struct snd_pcm_runtime *runtime = substream->runtime;
1004 struct snd_ca0106_pcm *epcm = runtime->private_data;
add7c0a6 1005 unsigned int ptr, prev_ptr;
1da177e4 1006 int channel = epcm->channel_id;
add7c0a6 1007 int timeout = 10;
1da177e4
LT		 1008
1009 if (!epcm->running)
1010 return 0;
1011
add7c0a6
TI		 1012 prev_ptr = -1;
1013 do {
1014 ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
1015 ptr = (ptr >> 3) * runtime->period_size;
1016 ptr += bytes_to_frames(runtime,
1017 snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
1018 if (ptr >= runtime->buffer_size)
1019 ptr -= runtime->buffer_size;
1020 if (prev_ptr == ptr)
1021 return ptr;
1022 prev_ptr = ptr;
1023 } while (--timeout);
1024 snd_printk(KERN_WARNING "ca0106: unstable DMA pointer!\n");
1025 return 0;
1da177e4
LT		 1026}
1027
1028/* pointer_capture callback */
1029static snd_pcm_uframes_t
e4a3d145 1030snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
1da177e4 1031{
e4a3d145
TI		 1032 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1033 struct snd_pcm_runtime *runtime = substream->runtime;
1034 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4
LT		 1035 snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
1036 int channel = channel=epcm->channel_id;
1037
1038 if (!epcm->running)
1039 return 0;
1040
1041 ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
1042 ptr2 = bytes_to_frames(runtime, ptr1);
1043 ptr=ptr2;
1044 if (ptr >= runtime->buffer_size)
1045 ptr -= runtime->buffer_size;
ee419653
TI		 1046 /*
1047 printk(KERN_DEBUG "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
1048 "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
1049 ptr1, ptr2, ptr, (int)runtime->buffer_size,
1050 (int)runtime->period_size, (int)runtime->frame_bits,
1051 (int)runtime->rate);
1052 */
1da177e4
LT		 1053 return ptr;
1054}
1055
1056/* operators */
e4a3d145 1057static struct snd_pcm_ops snd_ca0106_playback_front_ops = {
1da177e4
LT		 1058 .open = snd_ca0106_pcm_open_playback_front,
1059 .close = snd_ca0106_pcm_close_playback,
1060 .ioctl = snd_pcm_lib_ioctl,
1061 .hw_params = snd_ca0106_pcm_hw_params_playback,
1062 .hw_free = snd_ca0106_pcm_hw_free_playback,
1063 .prepare = snd_ca0106_pcm_prepare_playback,
1064 .trigger = snd_ca0106_pcm_trigger_playback,
1065 .pointer = snd_ca0106_pcm_pointer_playback,
1066};
1067
e4a3d145 1068static struct snd_pcm_ops snd_ca0106_capture_0_ops = {
1da177e4
LT		 1069 .open = snd_ca0106_pcm_open_0_capture,
1070 .close = snd_ca0106_pcm_close_capture,
1071 .ioctl = snd_pcm_lib_ioctl,
1072 .hw_params = snd_ca0106_pcm_hw_params_capture,
1073 .hw_free = snd_ca0106_pcm_hw_free_capture,
1074 .prepare = snd_ca0106_pcm_prepare_capture,
1075 .trigger = snd_ca0106_pcm_trigger_capture,
1076 .pointer = snd_ca0106_pcm_pointer_capture,
1077};
1078
e4a3d145 1079static struct snd_pcm_ops snd_ca0106_capture_1_ops = {
1da177e4
LT		 1080 .open = snd_ca0106_pcm_open_1_capture,
1081 .close = snd_ca0106_pcm_close_capture,
1082 .ioctl = snd_pcm_lib_ioctl,
1083 .hw_params = snd_ca0106_pcm_hw_params_capture,
1084 .hw_free = snd_ca0106_pcm_hw_free_capture,
1085 .prepare = snd_ca0106_pcm_prepare_capture,
1086 .trigger = snd_ca0106_pcm_trigger_capture,
1087 .pointer = snd_ca0106_pcm_pointer_capture,
1088};
1089
e4a3d145 1090static struct snd_pcm_ops snd_ca0106_capture_2_ops = {
1da177e4
LT		 1091 .open = snd_ca0106_pcm_open_2_capture,
1092 .close = snd_ca0106_pcm_close_capture,
1093 .ioctl = snd_pcm_lib_ioctl,
1094 .hw_params = snd_ca0106_pcm_hw_params_capture,
1095 .hw_free = snd_ca0106_pcm_hw_free_capture,
1096 .prepare = snd_ca0106_pcm_prepare_capture,
1097 .trigger = snd_ca0106_pcm_trigger_capture,
1098 .pointer = snd_ca0106_pcm_pointer_capture,
1099};
1100
e4a3d145 1101static struct snd_pcm_ops snd_ca0106_capture_3_ops = {
1da177e4
LT		 1102 .open = snd_ca0106_pcm_open_3_capture,
1103 .close = snd_ca0106_pcm_close_capture,
1104 .ioctl = snd_pcm_lib_ioctl,
1105 .hw_params = snd_ca0106_pcm_hw_params_capture,
1106 .hw_free = snd_ca0106_pcm_hw_free_capture,
1107 .prepare = snd_ca0106_pcm_prepare_capture,
1108 .trigger = snd_ca0106_pcm_trigger_capture,
1109 .pointer = snd_ca0106_pcm_pointer_capture,
1110};
1111
e4a3d145 1112static struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
1da177e4
LT		 1113 .open = snd_ca0106_pcm_open_playback_center_lfe,
1114 .close = snd_ca0106_pcm_close_playback,
1115 .ioctl = snd_pcm_lib_ioctl,
1116 .hw_params = snd_ca0106_pcm_hw_params_playback,
1117 .hw_free = snd_ca0106_pcm_hw_free_playback,
1118 .prepare = snd_ca0106_pcm_prepare_playback,
1119 .trigger = snd_ca0106_pcm_trigger_playback,
1120 .pointer = snd_ca0106_pcm_pointer_playback,
1121};
1122
e4a3d145 1123static struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
1da177e4
LT		 1124 .open = snd_ca0106_pcm_open_playback_unknown,
1125 .close = snd_ca0106_pcm_close_playback,
1126 .ioctl = snd_pcm_lib_ioctl,
1127 .hw_params = snd_ca0106_pcm_hw_params_playback,
1128 .hw_free = snd_ca0106_pcm_hw_free_playback,
1129 .prepare = snd_ca0106_pcm_prepare_playback,
1130 .trigger = snd_ca0106_pcm_trigger_playback,
1131 .pointer = snd_ca0106_pcm_pointer_playback,
1132};
1133
e4a3d145 1134static struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
1da177e4
LT		 1135 .open = snd_ca0106_pcm_open_playback_rear,
1136 .close = snd_ca0106_pcm_close_playback,
1137 .ioctl = snd_pcm_lib_ioctl,
1138 .hw_params = snd_ca0106_pcm_hw_params_playback,
1139 .hw_free = snd_ca0106_pcm_hw_free_playback,
1140 .prepare = snd_ca0106_pcm_prepare_playback,
1141 .trigger = snd_ca0106_pcm_trigger_playback,
1142 .pointer = snd_ca0106_pcm_pointer_playback,
1143};
1144
1145
e4a3d145 1146static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 1147 unsigned short reg)
1148{
e4a3d145 1149 struct snd_ca0106 *emu = ac97->private_data;
1da177e4
LT		 1150 unsigned long flags;
1151 unsigned short val;
1152
1153 spin_lock_irqsave(&emu->emu_lock, flags);
1154 outb(reg, emu->port + AC97ADDRESS);
1155 val = inw(emu->port + AC97DATA);
1156 spin_unlock_irqrestore(&emu->emu_lock, flags);
1157 return val;
1158}
1159
e4a3d145 1160static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 1161 unsigned short reg, unsigned short val)
1162{
e4a3d145 1163 struct snd_ca0106 *emu = ac97->private_data;
1da177e4
LT		 1164 unsigned long flags;
1165
1166 spin_lock_irqsave(&emu->emu_lock, flags);
1167 outb(reg, emu->port + AC97ADDRESS);
1168 outw(val, emu->port + AC97DATA);
1169 spin_unlock_irqrestore(&emu->emu_lock, flags);
1170}
1171
e4a3d145 1172static int snd_ca0106_ac97(struct snd_ca0106 *chip)
1da177e4 1173{
e4a3d145
TI		 1174 struct snd_ac97_bus *pbus;
1175 struct snd_ac97_template ac97;
1da177e4 1176 int err;
e4a3d145 1177 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1178 .write = snd_ca0106_ac97_write,
1179 .read = snd_ca0106_ac97_read,
1180 };
1181
1182 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1183 return err;
1184 pbus->no_vra = 1; /* we don't need VRA */
1185
1186 memset(&ac97, 0, sizeof(ac97));
1187 ac97.private_data = chip;
36c4dc42 1188 ac97.scaps = AC97_SCAP_NO_SPDIF;
1da177e4
LT		 1189 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1190}
1191
5da95273
TI		 1192static void ca0106_stop_chip(struct snd_ca0106 *chip);
1193
e4a3d145 1194static int snd_ca0106_free(struct snd_ca0106 *chip)
1da177e4 1195{
5da95273
TI		 1196 if (chip->res_port != NULL) {
1197 /* avoid access to already used hardware */
1198 ca0106_stop_chip(chip);
1da177e4 1199 }
ebf029da
TI		 1200 if (chip->irq >= 0)
1201 free_irq(chip->irq, chip);
1da177e4
LT		 1202 // release the data
1203#if 1
1204 if (chip->buffer.area)
1205 snd_dma_free_pages(&chip->buffer);
1206#endif
1207
1208 // release the i/o port
b1d5776d
TI		 1209 release_and_free_resource(chip->res_port);
1210
1da177e4
LT		 1211 pci_disable_device(chip->pci);
1212 kfree(chip);
1213 return 0;
1214}
1215
e4a3d145 1216static int snd_ca0106_dev_free(struct snd_device *device)
1da177e4 1217{
e4a3d145 1218 struct snd_ca0106 *chip = device->device_data;
1da177e4
LT		 1219 return snd_ca0106_free(chip);
1220}
1221
7d12e780 1222static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
1da177e4
LT		 1223{
1224 unsigned int status;
1225
e4a3d145 1226 struct snd_ca0106 *chip = dev_id;
1da177e4
LT		 1227 int i;
1228 int mask;
1229 unsigned int stat76;
e4a3d145 1230 struct snd_ca0106_channel *pchannel;
1da177e4 1231
1da177e4 1232 status = inl(chip->port + IPR);
1da177e4
LT		 1233 if (! status)
1234 return IRQ_NONE;
1235
1236 stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
ee419653
TI		 1237 /*
1238 snd_printk(KERN_DEBUG "interrupt status = 0x%08x, stat76=0x%08x\n",
1239 status, stat76);
1240 snd_printk(KERN_DEBUG "ptr=0x%08x\n",
1241 snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
1242 */
1da177e4
LT		 1243 mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
1244 for(i = 0; i < 4; i++) {
1245 pchannel = &(chip->playback_channels[i]);
95a98265 1246 if (stat76 & mask) {
1da177e4
LT		 1247/* FIXME: Select the correct substream for period elapsed */
1248 if(pchannel->use) {
95a98265
TI		 1249 snd_pcm_period_elapsed(pchannel->epcm->substream);
1250 //printk(KERN_INFO "interrupt [%d] used\n", i);
1da177e4
LT		 1251 }
1252 }
1253 //printk(KERN_INFO "channel=%p\n",pchannel);
1254 //printk(KERN_INFO "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1255 mask <<= 1;
1256 }
1257 mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
1258 for(i = 0; i < 4; i++) {
1259 pchannel = &(chip->capture_channels[i]);
95a98265 1260 if (stat76 & mask) {
1da177e4
LT		 1261/* FIXME: Select the correct substream for period elapsed */
1262 if(pchannel->use) {
95a98265
TI		 1263 snd_pcm_period_elapsed(pchannel->epcm->substream);
1264 //printk(KERN_INFO "interrupt [%d] used\n", i);
1da177e4
LT		 1265 }
1266 }
1267 //printk(KERN_INFO "channel=%p\n",pchannel);
1268 //printk(KERN_INFO "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1269 mask <<= 1;
1270 }
1271
1272 snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
8a5afd29
JCD		 1273
1274 if (chip->midi.dev_id &&
95a98265 1275 (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
8a5afd29
JCD		 1276 if (chip->midi.interrupt)
1277 chip->midi.interrupt(&chip->midi, status);
1278 else
1279 chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
1280 }
1281
1da177e4
LT		 1282 // acknowledge the interrupt if necessary
1283 outl(status, chip->port+IPR);
1284
1da177e4
LT		 1285 return IRQ_HANDLED;
1286}
1287
5da95273 1288static int __devinit snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
1da177e4 1289{
e4a3d145
TI		 1290 struct snd_pcm *pcm;
1291 struct snd_pcm_substream *substream;
1da177e4
LT		 1292 int err;
1293
5da95273
TI		 1294 err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
1295 if (err < 0)
1da177e4
LT		 1296 return err;
1297
1298 pcm->private_data = emu;
1da177e4
LT		 1299
1300 switch (device) {
1301 case 0:
1302 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
1303 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
1304 break;
1305 case 1:
1306 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
1307 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
1308 break;
1309 case 2:
1310 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
1311 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
1312 break;
1313 case 3:
1314 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
1315 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
1316 break;
1317 }
1318
1319 pcm->info_flags = 0;
1da177e4 1320 strcpy(pcm->name, "CA0106");
1da177e4
LT		 1321
1322 for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1323 substream;
1324 substream = substream->next) {
1325 if ((err = snd_pcm_lib_preallocate_pages(substream,
1326 SNDRV_DMA_TYPE_DEV,
1327 snd_dma_pci_data(emu->pci),
1328 64*1024, 64*1024)) < 0) /* FIXME: 32*1024 for sound buffer, between 32and64 for Periods table. */
1329 return err;
1330 }
1331
1332 for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
1333 substream;
1334 substream = substream->next) {
1335 if ((err = snd_pcm_lib_preallocate_pages(substream,
1336 SNDRV_DMA_TYPE_DEV,
1337 snd_dma_pci_data(emu->pci),
1338 64*1024, 64*1024)) < 0)
1339 return err;
1340 }
1341
5da95273 1342 emu->pcm[device] = pcm;
1da177e4
LT		 1343
1344 return 0;
1345}
1346
18b5d32f 1347#define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
aad90953 1348static unsigned int spi_dac_init[] = {
18b5d32f
TP		 1349 SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
1350 SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
b87c464e
TP		 1351 SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1352 SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
18b5d32f
TP		 1353 SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
1354 SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
1355 SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
1356 SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
1357 SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
1358 SPI_REG(9, 0x00),
b87c464e 1359 SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
18b5d32f
TP		 1360 SPI_REG(12, 0x00),
1361 SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
b87c464e
TP		 1362 SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
1363 SPI_REG(SPI_DACD4_REG, 0x00),
aad90953
JCD		 1364};
1365
6129daaa
JCD		 1366static unsigned int i2c_adc_init[][2] = {
1367 { 0x17, 0x00 }, /* Reset */
1368 { 0x07, 0x00 }, /* Timeout */
1369 { 0x0b, 0x22 }, /* Interface control */
1370 { 0x0c, 0x22 }, /* Master mode control */
1371 { 0x0d, 0x08 }, /* Powerdown control */
1372 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
1373 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
1374 { 0x10, 0x7b }, /* ALC Control 1 */
1375 { 0x11, 0x00 }, /* ALC Control 2 */
1376 { 0x12, 0x32 }, /* ALC Control 3 */
1377 { 0x13, 0x00 }, /* Noise gate control */
1378 { 0x14, 0xa6 }, /* Limiter control */
1379 { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */
1380};
1381
86effd7e 1382static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
1da177e4 1383{
1da177e4 1384 int ch;
86effd7e 1385 unsigned int def_bits;
1da177e4
LT		 1386
1387 outl(0, chip->port + INTE);
1388
1389 /*
1390 * Init to 0x02109204 :
1391 * Clock accuracy = 0 (1000ppm)
1392 * Sample Rate = 2 (48kHz)
1393 * Audio Channel = 1 (Left of 2)
1394 * Source Number = 0 (Unspecified)
1395 * Generation Status = 1 (Original for Cat Code 12)
1396 * Cat Code = 12 (Digital Signal Mixer)
1397 * Mode = 0 (Mode 0)
1398 * Emphasis = 0 (None)
1399 * CP = 1 (Copyright unasserted)
1400 * AN = 0 (Audio data)
1401 * P = 0 (Consumer)
1402 */
86effd7e 1403 def_bits =
5da95273
TI		 1404 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1405 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1406 SPCS_GENERATIONSTATUS | 0x00001200 |
1407 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
86effd7e 1408 if (!resume) {
3d475829
TI		 1409 chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
1410 chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
1411 chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
1412 chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
86effd7e 1413 }
1da177e4 1414 /* Only SPCS1 has been tested */
3d475829
TI		 1415 snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
1416 snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
1417 snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
1418 snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
1da177e4
LT		 1419
1420 snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
1421 snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
1422
1423 /* Write 0x8000 to AC97_REC_GAIN to mute it. */
1424 outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
1425 outw(0x8000, chip->port + AC97DATA);
5da95273 1426#if 0 /* FIXME: what are these? */
1da177e4
LT		 1427 snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
1428 snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
1429 snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
1430 snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
1431#endif
1432
5da95273
TI		 1433 /* OSS drivers set this. */
1434 /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
1435
1da177e4
LT		 1436 /* Analog or Digital output */
1437 snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
5da95273
TI		 1438 /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
1439 * Use 0x000f0000 for surround71
1440 */
1441 snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
1442
1da177e4 1443 chip->spdif_enable = 0; /* Set digital SPDIF output off */
5da95273
TI		 1444 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
1445 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
1446
1447 /* goes to 0x40c80000 when doing SPDIF IN/OUT */
1448 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
1449 /* (Mute) CAPTURE feedback into PLAYBACK volume.
1450 * Only lower 16 bits matter.
1451 */
1452 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
1453 /* SPDIF IN Volume */
1454 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
1455 /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
1456 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
1da177e4 1457
1da177e4
LT		 1458 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
1459 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
1460 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
1461 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
5da95273
TI		 1462
1463 for (ch = 0; ch < 4; ch++) {
1464 /* Only high 16 bits matter */
1465 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
1da177e4 1466 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
5da95273
TI		 1467#if 0 /* Mute */
1468 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
1469 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
1470 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
1471 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
1472#endif
1da177e4 1473 }
7c157069
JCD		 1474 if (chip->details->i2c_adc == 1) {
1475 /* Select MIC, Line in, TAD in, AUX in */
1476 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1477 /* Default to CAPTURE_SOURCE to i2s in */
86effd7e
TI		 1478 if (!resume)
1479 chip->capture_source = 3;
7c157069
JCD		 1480 } else if (chip->details->ac97 == 1) {
1481 /* Default to AC97 in */
1482 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
1483 /* Default to CAPTURE_SOURCE to AC97 in */
86effd7e
TI		 1484 if (!resume)
1485 chip->capture_source = 4;
7c157069
JCD		 1486 } else {
1487 /* Select MIC, Line in, TAD in, AUX in */
1488 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1489 /* Default to Set CAPTURE_SOURCE to i2s in */
86effd7e
TI		 1490 if (!resume)
1491 chip->capture_source = 3;
7c157069 1492 }
1da177e4 1493
5da95273
TI		 1494 if (chip->details->gpio_type == 2) {
1495 /* The SB0438 use GPIO differently. */
1496 /* FIXME: Still need to find out what the other GPIO bits do.
1497 * E.g. For digital spdif out.
1498 */
6129daaa 1499 outl(0x0, chip->port+GPIO);
5da95273 1500 /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
6129daaa 1501 outl(0x005f5301, chip->port+GPIO); /* Analog */
5da95273
TI		 1502 } else if (chip->details->gpio_type == 1) {
1503 /* The SB0410 and SB0413 use GPIO differently. */
1504 /* FIXME: Still need to find out what the other GPIO bits do.
1505 * E.g. For digital spdif out.
1506 */
1da177e4 1507 outl(0x0, chip->port+GPIO);
5da95273 1508 /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
c82bf829 1509 outl(0x005f5301, chip->port+GPIO); /* Analog */
1da177e4
LT		 1510 } else {
1511 outl(0x0, chip->port+GPIO);
1512 outl(0x005f03a3, chip->port+GPIO); /* Analog */
5da95273 1513 /* outl(0x005f02a2, chip->port+GPIO); */ /* SPDIF */
1da177e4
LT		 1514 }
1515 snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
1516
5da95273
TI		 1517 /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
1518 /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
1519 /* outl(0x00001409, chip->port+HCFG); */
1520 /* outl(0x00000009, chip->port+HCFG); */
1521 /* AC97 2.0, Enable outputs. */
1522 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
1da177e4 1523
5da95273
TI		 1524 if (chip->details->i2c_adc == 1) {
1525 /* The SB0410 and SB0413 use I2C to control ADC. */
6129daaa
JCD		 1526 int size, n;
1527
1528 size = ARRAY_SIZE(i2c_adc_init);
ee419653 1529 /* snd_printk(KERN_DEBUG "I2C:array size=0x%x\n", size); */
5da95273
TI		 1530 for (n = 0; n < size; n++)
1531 snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
1532 i2c_adc_init[n][1]);
1533 for (n = 0; n < 4; n++) {
1534 chip->i2c_capture_volume[n][0] = 0xcf;
1535 chip->i2c_capture_volume[n][1] = 0xcf;
6129daaa 1536 }
5da95273
TI		 1537 chip->i2c_capture_source = 2; /* Line in */
1538 /* Enable Line-in capture. MIC in currently untested. */
1539 /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
7199acdc 1540 }
5da95273
TI		 1541
1542 if (chip->details->spi_dac == 1) {
1543 /* The SB0570 use SPI to control DAC. */
aad90953
JCD		 1544 int size, n;
1545
1546 size = ARRAY_SIZE(spi_dac_init);
b18cd538
TP		 1547 for (n = 0; n < size; n++) {
1548 int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
1549
aad90953 1550 snd_ca0106_spi_write(chip, spi_dac_init[n]);
b18cd538
TP		 1551 if (reg < ARRAY_SIZE(chip->spi_dac_reg))
1552 chip->spi_dac_reg[reg] = spi_dac_init[n];
1553 }
a5875159 1554 }
5da95273
TI		 1555}
1556
1557static void ca0106_stop_chip(struct snd_ca0106 *chip)
1558{
1559 /* disable interrupts */
1560 snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
1561 outl(0, chip->port + INTE);
1562 snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
1563 udelay(1000);
1564 /* disable audio */
1565 /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
1566 outl(0, chip->port + HCFG);
1567 /* FIXME: We need to stop and DMA transfers here.
1568 * But as I am not sure how yet, we cannot from the dma pages.
1569 * So we can fix: snd-malloc: Memory leak? pages not freed = 8
1570 */
1571}
7199acdc 1572
5da95273
TI		 1573static int __devinit snd_ca0106_create(int dev, struct snd_card *card,
1574 struct pci_dev *pci,
1575 struct snd_ca0106 **rchip)
1576{
1577 struct snd_ca0106 *chip;
1578 struct snd_ca0106_details *c;
1579 int err;
1580 static struct snd_device_ops ops = {
1581 .dev_free = snd_ca0106_dev_free,
1582 };
1583
1584 *rchip = NULL;
7199acdc 1585
5da95273
TI		 1586 err = pci_enable_device(pci);
1587 if (err < 0)
1588 return err;
284901a9
YH		 1589 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
1590 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
5da95273
TI		 1591 printk(KERN_ERR "error to set 32bit mask DMA\n");
1592 pci_disable_device(pci);
1593 return -ENXIO;
1594 }
1595
1596 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1597 if (chip == NULL) {
1598 pci_disable_device(pci);
1599 return -ENOMEM;
1600 }
1601
1602 chip->card = card;
1603 chip->pci = pci;
1604 chip->irq = -1;
1605
1606 spin_lock_init(&chip->emu_lock);
1607
1608 chip->port = pci_resource_start(pci, 0);
1609 chip->res_port = request_region(chip->port, 0x20, "snd_ca0106");
1610 if (!chip->res_port) {
1611 snd_ca0106_free(chip);
1612 printk(KERN_ERR "cannot allocate the port\n");
1613 return -EBUSY;
1614 }
1615
1616 if (request_irq(pci->irq, snd_ca0106_interrupt,
1617 IRQF_SHARED, "snd_ca0106", chip)) {
1618 snd_ca0106_free(chip);
1619 printk(KERN_ERR "cannot grab irq\n");
1620 return -EBUSY;
1621 }
1622 chip->irq = pci->irq;
1623
1624 /* This stores the periods table. */
1625 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1626 1024, &chip->buffer) < 0) {
1627 snd_ca0106_free(chip);
1628 return -ENOMEM;
1629 }
1630
1631 pci_set_master(pci);
1632 /* read serial */
1633 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
1634 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
1635 printk(KERN_INFO "snd-ca0106: Model %04x Rev %08x Serial %08x\n",
1636 chip->model, pci->revision, chip->serial);
1637 strcpy(card->driver, "CA0106");
1638 strcpy(card->shortname, "CA0106");
1639
1640 for (c = ca0106_chip_details; c->serial; c++) {
1641 if (subsystem[dev]) {
1642 if (c->serial == subsystem[dev])
1643 break;
1644 } else if (c->serial == chip->serial)
1645 break;
1646 }
1647 chip->details = c;
1648 if (subsystem[dev]) {
1649 printk(KERN_INFO "snd-ca0106: Sound card name=%s, "
1650 "subsystem=0x%x. Forced to subsystem=0x%x\n",
1651 c->name, chip->serial, subsystem[dev]);
1652 }
1653
1654 sprintf(card->longname, "%s at 0x%lx irq %i",
1655 c->name, chip->port, chip->irq);
1656
86effd7e 1657 ca0106_init_chip(chip, 0);
5da95273
TI		 1658
1659 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1660 if (err < 0) {
1da177e4
LT		 1661 snd_ca0106_free(chip);
1662 return err;
1663 }
1664 *rchip = chip;
1665 return 0;
1666}
1667
8a5afd29 1668
e4a3d145 1669static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
7cf4783b 1670{
e4a3d145 1671 snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
8a5afd29
JCD		 1672}
1673
e4a3d145 1674static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
7cf4783b 1675{
e4a3d145 1676 snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
8a5afd29
JCD		 1677}
1678
e4a3d145 1679static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
7cf4783b 1680{
e4a3d145
TI		 1681 return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
1682 midi->port + idx, 0);
8a5afd29
JCD		 1683}
1684
e4a3d145 1685static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
7cf4783b 1686{
e4a3d145 1687 snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
8a5afd29
JCD		 1688}
1689
e4a3d145 1690static struct snd_card *ca0106_dev_id_card(void *dev_id)
7cf4783b 1691{
e4a3d145 1692 return ((struct snd_ca0106 *)dev_id)->card;
8a5afd29
JCD		 1693}
1694
7cf4783b
JCD		 1695static int ca0106_dev_id_port(void *dev_id)
1696{
e4a3d145 1697 return ((struct snd_ca0106 *)dev_id)->port;
8a5afd29
JCD		 1698}
1699
e4a3d145 1700static int __devinit snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
8a5afd29 1701{
e4a3d145 1702 struct snd_ca_midi *midi;
8a5afd29
JCD		 1703 char *name;
1704 int err;
1705
95a98265 1706 if (channel == CA0106_MIDI_CHAN_B) {
8a5afd29
JCD		 1707 name = "CA0106 MPU-401 (UART) B";
1708 midi = &chip->midi2;
1709 midi->tx_enable = INTE_MIDI_TX_B;
1710 midi->rx_enable = INTE_MIDI_RX_B;
1711 midi->ipr_tx = IPR_MIDI_TX_B;
1712 midi->ipr_rx = IPR_MIDI_RX_B;
1713 midi->port = MIDI_UART_B_DATA;
1714 } else {
1715 name = "CA0106 MPU-401 (UART)";
1716 midi = &chip->midi;
1717 midi->tx_enable = INTE_MIDI_TX_A;
1718 midi->rx_enable = INTE_MIDI_TX_B;
1719 midi->ipr_tx = IPR_MIDI_TX_A;
1720 midi->ipr_rx = IPR_MIDI_RX_A;
1721 midi->port = MIDI_UART_A_DATA;
1722 }
1723
1724 midi->reset = CA0106_MPU401_RESET;
1725 midi->enter_uart = CA0106_MPU401_ENTER_UART;
1726 midi->ack = CA0106_MPU401_ACK;
1727
1728 midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
1729 midi->output_ready = CA0106_MIDI_OUTPUT_READY;
1730
1731 midi->channel = channel;
1732
1733 midi->interrupt_enable = ca0106_midi_interrupt_enable;
1734 midi->interrupt_disable = ca0106_midi_interrupt_disable;
1735
1736 midi->read = ca0106_midi_read;
1737 midi->write = ca0106_midi_write;
1738
1739 midi->get_dev_id_card = ca0106_dev_id_card;
1740 midi->get_dev_id_port = ca0106_dev_id_port;
1741
1742 midi->dev_id = chip;
1743
1744 if ((err = ca_midi_init(chip, midi, 0, name)) < 0)
1745 return err;
1746
1747 return 0;
1748}
1749
1750
1da177e4
LT		 1751static int __devinit snd_ca0106_probe(struct pci_dev *pci,
1752 const struct pci_device_id *pci_id)
1753{
1754 static int dev;
e4a3d145
TI		 1755 struct snd_card *card;
1756 struct snd_ca0106 *chip;
5da95273 1757 int i, err;
1da177e4
LT		 1758
1759 if (dev >= SNDRV_CARDS)
1760 return -ENODEV;
1761 if (!enable[dev]) {
1762 dev++;
1763 return -ENOENT;
1764 }
1765
e58de7ba
TI		 1766 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
1767 if (err < 0)
1768 return err;
1da177e4 1769
5da95273
TI		 1770 err = snd_ca0106_create(dev, card, pci, &chip);
1771 if (err < 0)
1772 goto error;
72077aa3 1773 card->private_data = chip;
1da177e4 1774
5da95273
TI		 1775 for (i = 0; i < 4; i++) {
1776 err = snd_ca0106_pcm(chip, i);
1777 if (err < 0)
1778 goto error;
1da177e4 1779 }
5da95273
TI		 1780
1781 if (chip->details->ac97 == 1) {
1782 /* The SB0410 and SB0413 do not have an AC97 chip. */
1783 err = snd_ca0106_ac97(chip);
1784 if (err < 0)
1785 goto error;
1da177e4 1786 }
5da95273
TI		 1787 err = snd_ca0106_mixer(chip);
1788 if (err < 0)
1789 goto error;
1da177e4 1790
7cf4783b 1791 snd_printdd("ca0106: probe for MIDI channel A ...");
5da95273
TI		 1792 err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
1793 if (err < 0)
1794 goto error;
7cf4783b 1795 snd_printdd(" done.\n");
8a5afd29 1796
adf1b3d2 1797#ifdef CONFIG_PROC_FS
1da177e4 1798 snd_ca0106_proc_init(chip);
adf1b3d2 1799#endif
1da177e4 1800
c6d6eeea
TI		 1801 snd_card_set_dev(card, &pci->dev);
1802
5da95273
TI		 1803 err = snd_card_register(card);
1804 if (err < 0)
1805 goto error;
1da177e4
LT		 1806
1807 pci_set_drvdata(pci, card);
1808 dev++;
1809 return 0;
5da95273
TI		 1810
1811 error:
1812 snd_card_free(card);
1813 return err;
1da177e4
LT		 1814}
1815
1816static void __devexit snd_ca0106_remove(struct pci_dev *pci)
1817{
1818 snd_card_free(pci_get_drvdata(pci));
1819 pci_set_drvdata(pci, NULL);
1820}
1821
5da95273
TI		 1822#ifdef CONFIG_PM
1823static int snd_ca0106_suspend(struct pci_dev *pci, pm_message_t state)
1824{
1825 struct snd_card *card = pci_get_drvdata(pci);
1826 struct snd_ca0106 *chip = card->private_data;
1827 int i;
1828
1829 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1830 for (i = 0; i < 4; i++)
1831 snd_pcm_suspend_all(chip->pcm[i]);
50232d62
TI		 1832 if (chip->details->ac97)
1833 snd_ac97_suspend(chip->ac97);
5da95273
TI		 1834 snd_ca0106_mixer_suspend(chip);
1835
1836 ca0106_stop_chip(chip);
1837
1838 pci_disable_device(pci);
1839 pci_save_state(pci);
1840 pci_set_power_state(pci, pci_choose_state(pci, state));
1841 return 0;
1842}
1843
1844static int snd_ca0106_resume(struct pci_dev *pci)
1845{
1846 struct snd_card *card = pci_get_drvdata(pci);
1847 struct snd_ca0106 *chip = card->private_data;
1848 int i;
1849
1850 pci_set_power_state(pci, PCI_D0);
1851 pci_restore_state(pci);
44411e07
TI		 1852
1853 if (pci_enable_device(pci) < 0) {
1854 snd_card_disconnect(card);
1855 return -EIO;
1856 }
1857
5da95273
TI		 1858 pci_set_master(pci);
1859
86effd7e 1860 ca0106_init_chip(chip, 1);
5da95273 1861
50232d62
TI		 1862 if (chip->details->ac97)
1863 snd_ac97_resume(chip->ac97);
5da95273
TI		 1864 snd_ca0106_mixer_resume(chip);
1865 if (chip->details->spi_dac) {
1866 for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
1867 snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
1868 }
1869
1870 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1871 return 0;
1872}
1873#endif
1874
1da177e4 1875// PCI IDs
cebe41d4 1876static DEFINE_PCI_DEVICE_TABLE(snd_ca0106_ids) = {
0d7392e5 1877 { PCI_VDEVICE(CREATIVE, 0x0007), 0 }, /* Audigy LS or Live 24bit */
1da177e4
LT		 1878 { 0, }
1879};
1880MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
1881
1882// pci_driver definition
1883static struct pci_driver driver = {
1884 .name = "CA0106",
1885 .id_table = snd_ca0106_ids,
1886 .probe = snd_ca0106_probe,
1887 .remove = __devexit_p(snd_ca0106_remove),
5da95273
TI		 1888#ifdef CONFIG_PM
1889 .suspend = snd_ca0106_suspend,
1890 .resume = snd_ca0106_resume,
1891#endif
1da177e4
LT		 1892};
1893
1894// initialization of the module
1895static int __init alsa_card_ca0106_init(void)
1896{
95a98265 1897 return pci_register_driver(&driver);
1da177e4
LT		 1898}
1899
1900// clean up the module
1901static void __exit alsa_card_ca0106_exit(void)
1902{
1903 pci_unregister_driver(&driver);
1904}
1905
1906module_init(alsa_card_ca0106_init)
1907module_exit(alsa_card_ca0106_exit)
kernel source for telekom puls (alcatel/mediatek)