[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-x86_64 / pgtable.h

#ifndef _X86_64_PGTABLE_H
#define _X86_64_PGTABLE_H

#include <linux/const.h>
#ifndef __ASSEMBLY__

/*
 * This file contains the functions and defines necessary to modify and use
 * the x86-64 page table tree.
 */
#include <asm/processor.h>
#include <asm/bitops.h>
#include <linux/threads.h>
#include <asm/pda.h>

extern pud_t level3_kernel_pgt[512];
extern pud_t level3_ident_pgt[512];
extern pmd_t level2_kernel_pgt[512];
extern pgd_t init_level4_pgt[];
extern unsigned long __supported_pte_mask;

#define swapper_pg_dir init_level4_pgt

extern void paging_init(void);
extern void clear_kernel_mapping(unsigned long addr, unsigned long size);

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))

#endif /* !__ASSEMBLY__ */

/*
 * PGDIR_SHIFT determines what a top-level page table entry can map
 */
#define PGDIR_SHIFT	39
#define PTRS_PER_PGD	512

/*
 * 3rd level page
 */
#define PUD_SHIFT	30
#define PTRS_PER_PUD	512

/*
 * PMD_SHIFT determines the size of the area a middle-level
 * page table can map
 */
#define PMD_SHIFT	21
#define PTRS_PER_PMD	512

/*
 * entries per page directory level
 */
#define PTRS_PER_PTE	512

#ifndef __ASSEMBLY__

#define pte_ERROR(e) \
	printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
#define pmd_ERROR(e) \
	printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
#define pud_ERROR(e) \
	printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
#define pgd_ERROR(e) \
	printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))

#define pgd_none(x)	(!pgd_val(x))
#define pud_none(x)	(!pud_val(x))

static inline void set_pte(pte_t *dst, pte_t val)
{
	pte_val(*dst) = pte_val(val);
} 
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

static inline void set_pmd(pmd_t *dst, pmd_t val)
{
        pmd_val(*dst) = pmd_val(val); 
} 

static inline void set_pud(pud_t *dst, pud_t val)
{
	pud_val(*dst) = pud_val(val);
}

static inline void pud_clear (pud_t *pud)
{
	set_pud(pud, __pud(0));
}

static inline void set_pgd(pgd_t *dst, pgd_t val)
{
	pgd_val(*dst) = pgd_val(val); 
} 

static inline void pgd_clear (pgd_t * pgd)
{
	set_pgd(pgd, __pgd(0));
}

#define ptep_get_and_clear(mm,addr,xp)	__pte(xchg(&(xp)->pte, 0))

struct mm_struct;

static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
{
	pte_t pte;
	if (full) {
		pte = *ptep;
		*ptep = __pte(0);
	} else {
		pte = ptep_get_and_clear(mm, addr, ptep);
	}
	return pte;
}

#define pte_same(a, b)		((a).pte == (b).pte)

#define pte_pgprot(a)	(__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))

#endif /* !__ASSEMBLY__ */

#define PMD_SIZE	(_AC(1,UL) << PMD_SHIFT)
#define PMD_MASK	(~(PMD_SIZE-1))
#define PUD_SIZE	(_AC(1,UL) << PUD_SHIFT)
#define PUD_MASK	(~(PUD_SIZE-1))
#define PGDIR_SIZE	(_AC(1,UL) << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

#define USER_PTRS_PER_PGD	((TASK_SIZE-1)/PGDIR_SIZE+1)
#define FIRST_USER_ADDRESS	0

#define MAXMEM		 _AC(0x3fffffffffff, UL)
#define VMALLOC_START    _AC(0xffffc20000000000, UL)
#define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
#define MODULES_VADDR    _AC(0xffffffff88000000, UL)
#define MODULES_END      _AC(0xfffffffffff00000, UL)
#define MODULES_LEN   (MODULES_END - MODULES_VADDR)

#define _PAGE_BIT_PRESENT	0
#define _PAGE_BIT_RW		1
#define _PAGE_BIT_USER		2
#define _PAGE_BIT_PWT		3
#define _PAGE_BIT_PCD		4
#define _PAGE_BIT_ACCESSED	5
#define _PAGE_BIT_DIRTY		6
#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page */
#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
#define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */

#define _PAGE_PRESENT	0x001
#define _PAGE_RW	0x002
#define _PAGE_USER	0x004
#define _PAGE_PWT	0x008
#define _PAGE_PCD	0x010
#define _PAGE_ACCESSED	0x020
#define _PAGE_DIRTY	0x040
#define _PAGE_PSE	0x080	/* 2MB page */
#define _PAGE_FILE	0x040	/* nonlinear file mapping, saved PTE; unset:swap */
#define _PAGE_GLOBAL	0x100	/* Global TLB entry */

#define _PAGE_PROTNONE	0x080	/* If not present */
#define _PAGE_NX        (_AC(1,UL)<<_PAGE_BIT_NX)

#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)

#define _PAGE_CHG_MASK	(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)

#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_COPY PAGE_COPY_NOEXEC
#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
#define __PAGE_KERNEL \
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
#define __PAGE_KERNEL_EXEC \
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
#define __PAGE_KERNEL_NOCACHE \
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX)
#define __PAGE_KERNEL_RO \
	(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
#define __PAGE_KERNEL_VSYSCALL \
	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
#define __PAGE_KERNEL_VSYSCALL_NOCACHE \
	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD)
#define __PAGE_KERNEL_LARGE \
	(__PAGE_KERNEL | _PAGE_PSE)
#define __PAGE_KERNEL_LARGE_EXEC \
	(__PAGE_KERNEL_EXEC | _PAGE_PSE)

#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)

#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
#define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)

/*         xwr */
#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY_EXEC
#define __P101	PAGE_READONLY_EXEC
#define __P110	PAGE_COPY_EXEC
#define __P111	PAGE_COPY_EXEC

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY_EXEC
#define __S101	PAGE_READONLY_EXEC
#define __S110	PAGE_SHARED_EXEC
#define __S111	PAGE_SHARED_EXEC

#ifndef __ASSEMBLY__

static inline unsigned long pgd_bad(pgd_t pgd)
{
	return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
}

static inline unsigned long pud_bad(pud_t pud)
{
	return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
}

static inline unsigned long pmd_bad(pmd_t pmd)
{
	return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
}

#define pte_none(x)	(!pte_val(x))
#define pte_present(x)	(pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
#define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)

#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))	/* FIXME: is this
						   right? */
#define pte_page(x)	pfn_to_page(pte_pfn(x))
#define pte_pfn(x)  ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)

static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
{
	pte_t pte;
	pte_val(pte) = (page_nr << PAGE_SHIFT);
	pte_val(pte) |= pgprot_val(pgprot);
	pte_val(pte) &= __supported_pte_mask;
	return pte;
}

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
static inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
static inline int pte_huge(pte_t pte)		{ return pte_val(pte) & _PAGE_PSE; }

static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }

struct vm_area_struct;

static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
{
	if (!pte_young(*ptep))
		return 0;
	return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
}

static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	clear_bit(_PAGE_BIT_RW, &ptep->pte);
}

/*
 * Macro to mark a page protection value as "uncacheable".
 */
#define pgprot_noncached(prot)	(__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))

static inline int pmd_large(pmd_t pte) { 
	return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE; 
} 	


/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */

/*
 * Level 4 access.
 */
#define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
#define pgd_page(pgd)		(pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
#define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
#define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })

/* PUD - Level3 access */
/* to find an entry in a page-table-directory. */
#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
#define pud_page(pud)		(pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
#define pud_offset(pgd, address) ((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
#define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)

/* PMD  - Level 2 access */
#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
#define pmd_page(pmd)		(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))

#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
#define pmd_offset(dir, address) ((pmd_t *) pud_page_vaddr(*(dir)) + \
			pmd_index(address))
#define pmd_none(x)	(!pmd_val(x))
#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
#define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
#define pmd_pfn(x)  ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)

#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT

/* PTE - Level 1 access. */

/* page, protection -> pte */
#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
#define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
 
/* Change flags of a PTE */
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{ 
	pte_val(pte) &= _PAGE_CHG_MASK;
	pte_val(pte) |= pgprot_val(newprot);
	pte_val(pte) &= __supported_pte_mask;
       return pte; 
}

#define pte_index(address) \
		(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
			pte_index(address))

/* x86-64 always has all page tables mapped. */
#define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
#define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
#define pte_unmap(pte) /* NOP */
#define pte_unmap_nested(pte) /* NOP */ 

#define update_mmu_cache(vma,address,pte) do { } while (0)

/* We only update the dirty/accessed state if we set
 * the dirty bit by hand in the kernel, since the hardware
 * will do the accessed bit for us, and we don't want to
 * race with other CPU's that might be updating the dirty
 * bit at the same time. */
#define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
({									  \
	int __changed = !pte_same(*(__ptep), __entry);			  \
	if (__changed && __dirty) {					  \
		set_pte(__ptep, __entry);			  	  \
		flush_tlb_page(__vma, __address);		  	  \
	}								  \
	__changed;							  \
})

/* Encode and de-code a swap entry */
#define __swp_type(x)			(((x).val >> 1) & 0x3f)
#define __swp_offset(x)			((x).val >> 8)
#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x)		((pte_t) { (x).val })

extern spinlock_t pgd_lock;
extern struct list_head pgd_list;

extern int kern_addr_valid(unsigned long addr); 

pte_t *lookup_address(unsigned long addr);

#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
		remap_pfn_range(vma, vaddr, pfn, size, prot)

#define HAVE_ARCH_UNMAPPED_AREA

#define pgtable_cache_init()   do { } while (0)
#define check_pgt_cache()      do { } while (0)

#define PAGE_AGP    PAGE_KERNEL_NOCACHE
#define HAVE_PAGE_AGP 1

/* fs/proc/kcore.c */
#define	kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
#define	kc_offset_to_vaddr(o) \
   (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))

#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
#define __HAVE_ARCH_PTE_SAME
#include <asm-generic/pgtable.h>
#endif /* !__ASSEMBLY__ */

#endif /* _X86_64_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _X86_64_PGTABLE_H
	2	#define _X86_64_PGTABLE_H
	3
6df95fd7	4	#include <linux/const.h>
9d291e78 VG	5	#ifndef __ASSEMBLY__
9d291e78 VG	6
1da177e4 LT	7	/*
	8	* This file contains the functions and defines necessary to modify and use
	9	* the x86-64 page table tree.
	10	*/
	11	#include <asm/processor.h>
1da177e4 LT	12	#include <asm/bitops.h>
	13	#include <linux/threads.h>
	14	#include <asm/pda.h>
	15
	16	extern pud_t level3_kernel_pgt[512];
1da177e4 LT	17	extern pud_t level3_ident_pgt[512];
	18	extern pmd_t level2_kernel_pgt[512];
	19	extern pgd_t init_level4_pgt[];
	20	extern unsigned long __supported_pte_mask;
	21
e3ebadd9	22	#define swapper_pg_dir init_level4_pgt
1da177e4	23
1da177e4 LT	24	extern void paging_init(void);
	25	extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
	26
1da177e4 LT	27	/*
	28	* ZERO_PAGE is a global shared page that is always zero: used
	29	* for zero-mapped memory areas etc..
	30	*/
	31	extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
e3ebadd9	32	#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
1da177e4	33
9d291e78 VG	34	#endif /* !__ASSEMBLY__ */
9d291e78 VG	35
1da177e4 LT	36	/*
	37	* PGDIR_SHIFT determines what a top-level page table entry can map
	38	*/
	39	#define PGDIR_SHIFT 39
	40	#define PTRS_PER_PGD 512
	41
	42	/*
	43	* 3rd level page
	44	*/
	45	#define PUD_SHIFT 30
	46	#define PTRS_PER_PUD 512
	47
	48	/*
	49	* PMD_SHIFT determines the size of the area a middle-level
	50	* page table can map
	51	*/
	52	#define PMD_SHIFT 21
	53	#define PTRS_PER_PMD 512
	54
	55	/*
	56	* entries per page directory level
	57	*/
	58	#define PTRS_PER_PTE 512
	59
9d291e78 VG	60	#ifndef __ASSEMBLY__
9d291e78 VG	61
1da177e4 LT	62	#define pte_ERROR(e) \
	63	printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
	64	#define pmd_ERROR(e) \
	65	printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
	66	#define pud_ERROR(e) \
	67	printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
	68	#define pgd_ERROR(e) \
	69	printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
	70
	71	#define pgd_none(x) (!pgd_val(x))
	72	#define pud_none(x) (!pud_val(x))
	73
	74	static inline void set_pte(pte_t *dst, pte_t val)
	75	{
	76	pte_val(*dst) = pte_val(val);
	77	}
	78	#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
	79
	80	static inline void set_pmd(pmd_t *dst, pmd_t val)
	81	{
	82	pmd_val(*dst) = pmd_val(val);
	83	}
	84
	85	static inline void set_pud(pud_t *dst, pud_t val)
	86	{
	87	pud_val(*dst) = pud_val(val);
	88	}
	89
9c0aa0f9	90	static inline void pud_clear (pud_t *pud)
1da177e4 LT	91	{
	92	set_pud(pud, __pud(0));
	93	}
	94
	95	static inline void set_pgd(pgd_t *dst, pgd_t val)
	96	{
	97	pgd_val(*dst) = pgd_val(val);
	98	}
	99
9c0aa0f9	100	static inline void pgd_clear (pgd_t * pgd)
1da177e4 LT	101	{
	102	set_pgd(pgd, __pgd(0));
	103	}
	104
1da177e4	105	#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
61e06037	106
8c65b4a6 TS	107	struct mm_struct;
8c65b4a6 TS	108
61e06037 ZA	109	static inline pte_t ptep_get_and_clear_full(struct mm_struct mm, unsigned long addr, pte_t ptep, int full)
	110	{
	111	pte_t pte;
	112	if (full) {
	113	pte = *ptep;
	114	*ptep = __pte(0);
	115	} else {
	116	pte = ptep_get_and_clear(mm, addr, ptep);
	117	}
	118	return pte;
	119	}
	120
1da177e4 LT	121	#define pte_same(a, b) ((a).pte == (b).pte)
1da177e4 LT	122
c728252c AV	123	#define pte_pgprot(a) (__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
c728252c AV	124
9d291e78 VG	125	#endif /* !__ASSEMBLY__ */
	126
	127	#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
1da177e4	128	#define PMD_MASK (~(PMD_SIZE-1))
9d291e78	129	#define PUD_SIZE (_AC(1,UL) << PUD_SHIFT)
1da177e4	130	#define PUD_MASK (~(PUD_SIZE-1))
9d291e78	131	#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
1da177e4 LT	132	#define PGDIR_MASK (~(PGDIR_SIZE-1))
1da177e4 LT	133
f83f2b5f	134	#define USER_PTRS_PER_PGD ((TASK_SIZE-1)/PGDIR_SIZE+1)
d455a369	135	#define FIRST_USER_ADDRESS 0
1da177e4	136
63f6564d RD	137	#define MAXMEM _AC(0x3fffffffffff, UL)
	138	#define VMALLOC_START _AC(0xffffc20000000000, UL)
	139	#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
	140	#define MODULES_VADDR _AC(0xffffffff88000000, UL)
	141	#define MODULES_END _AC(0xfffffffffff00000, UL)
1da177e4 LT	142	#define MODULES_LEN (MODULES_END - MODULES_VADDR)
	143
	144	#define _PAGE_BIT_PRESENT 0
	145	#define _PAGE_BIT_RW 1
	146	#define _PAGE_BIT_USER 2
	147	#define _PAGE_BIT_PWT 3
	148	#define _PAGE_BIT_PCD 4
	149	#define _PAGE_BIT_ACCESSED 5
	150	#define _PAGE_BIT_DIRTY 6
	151	#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
	152	#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
	153	#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
	154
	155	#define _PAGE_PRESENT 0x001
	156	#define _PAGE_RW 0x002
	157	#define _PAGE_USER 0x004
	158	#define _PAGE_PWT 0x008
	159	#define _PAGE_PCD 0x010
	160	#define _PAGE_ACCESSED 0x020
	161	#define _PAGE_DIRTY 0x040
	162	#define _PAGE_PSE 0x080 /* 2MB page */
9b4ee40e	163	#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
1da177e4 LT	164	#define _PAGE_GLOBAL 0x100 /* Global TLB entry */
	165
	166	#define _PAGE_PROTNONE 0x080 /* If not present */
9d291e78	167	#define _PAGE_NX (_AC(1,UL)<<_PAGE_BIT_NX)
1da177e4 LT	168
	169	#define _PAGE_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	170	#define _KERNPG_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	171
	172	#define _PAGE_CHG_MASK (PTE_MASK \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	173
	174	#define PAGE_NONE __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)
	175	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_NX)
	176	#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED)
	177	#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_NX)
	178	#define PAGE_COPY PAGE_COPY_NOEXEC
	179	#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED)
	180	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_NX)
	181	#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED)
	182	#define __PAGE_KERNEL \
	183	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED \| _PAGE_NX)
	184	#define __PAGE_KERNEL_EXEC \
	185	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED)
	186	#define __PAGE_KERNEL_NOCACHE \
	187	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_PCD \| _PAGE_ACCESSED \| _PAGE_NX)
	188	#define __PAGE_KERNEL_RO \
	189	(_PAGE_PRESENT \| _PAGE_DIRTY \| _PAGE_ACCESSED \| _PAGE_NX)
	190	#define __PAGE_KERNEL_VSYSCALL \
	191	(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED)
	192	#define __PAGE_KERNEL_VSYSCALL_NOCACHE \
	193	(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_PCD)
	194	#define __PAGE_KERNEL_LARGE \
	195	(__PAGE_KERNEL \| _PAGE_PSE)
8bf27556 EB	196	#define __PAGE_KERNEL_LARGE_EXEC \
8bf27556 EB	197	(__PAGE_KERNEL_EXEC \| _PAGE_PSE)
1da177e4 LT	198
	199	#define MAKE_GLOBAL(x) __pgprot((x) \| _PAGE_GLOBAL)
	200
	201	#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
	202	#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
	203	#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
	204	#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
	205	#define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
	206	#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
	207	#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
	208	#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
	209
	210	/* xwr */
	211	#define __P000 PAGE_NONE
	212	#define __P001 PAGE_READONLY
	213	#define __P010 PAGE_COPY
	214	#define __P011 PAGE_COPY
	215	#define __P100 PAGE_READONLY_EXEC
	216	#define __P101 PAGE_READONLY_EXEC
	217	#define __P110 PAGE_COPY_EXEC
	218	#define __P111 PAGE_COPY_EXEC
	219
	220	#define __S000 PAGE_NONE
	221	#define __S001 PAGE_READONLY
	222	#define __S010 PAGE_SHARED
	223	#define __S011 PAGE_SHARED
	224	#define __S100 PAGE_READONLY_EXEC
	225	#define __S101 PAGE_READONLY_EXEC
	226	#define __S110 PAGE_SHARED_EXEC
	227	#define __S111 PAGE_SHARED_EXEC
	228
9d291e78 VG	229	#ifndef __ASSEMBLY__
9d291e78 VG	230
eab724e5 JB	231	static inline unsigned long pgd_bad(pgd_t pgd)
	232	{
	233	return pgd_val(pgd) & ~(PTE_MASK \| _KERNPG_TABLE \| _PAGE_USER);
	234	}
1da177e4 LT	235
	236	static inline unsigned long pud_bad(pud_t pud)
	237	{
eab724e5 JB	238	return pud_val(pud) & ~(PTE_MASK \| _KERNPG_TABLE \| _PAGE_USER);
	239	}
	240
	241	static inline unsigned long pmd_bad(pmd_t pmd)
	242	{
	243	return pmd_val(pmd) & ~(PTE_MASK \| _KERNPG_TABLE \| _PAGE_USER);
1da177e4 LT	244	}
	245
	246	#define pte_none(x) (!pte_val(x))
	247	#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT \| _PAGE_PROTNONE))
	248	#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
	249
	250	#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this
	251	right? */
	252	#define pte_page(x) pfn_to_page(pte_pfn(x))
6b75aeed	253	#define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4 LT	254
	255	static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
	256	{
	257	pte_t pte;
	258	pte_val(pte) = (page_nr << PAGE_SHIFT);
	259	pte_val(pte) \|= pgprot_val(pgprot);
	260	pte_val(pte) &= __supported_pte_mask;
	261	return pte;
	262	}
	263
	264	/*
	265	* The following only work if pte_present() is true.
	266	* Undefined behaviour if not..
	267	*/
32e51a8c	268	#define __LARGE_PTE (_PAGE_PSE\|_PAGE_PRESENT)
4839057c AB	269	static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
	270	static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
	271	static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
1da177e4	272	static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
8f860591	273	static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_PSE; }
1da177e4	274
4839057c AB	275	static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
	276	static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
	277	static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
df992848	278	static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
4839057c AB	279	static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) \| _PAGE_DIRTY)); return pte; }
	280	static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) \| _PAGE_ACCESSED)); return pte; }
	281	static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) \| _PAGE_RW)); return pte; }
8f860591	282	static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) \| _PAGE_PSE)); return pte; }
5e6b0bfe	283	static inline pte_t pte_clrhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
1da177e4 LT	284
	285	struct vm_area_struct;
	286
1da177e4 LT	287	static inline int ptep_test_and_clear_young(struct vm_area_struct vma, unsigned long addr, pte_t ptep)
	288	{
	289	if (!pte_young(*ptep))
	290	return 0;
3d1712c9	291	return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
1da177e4 LT	292	}
	293
	294	static inline void ptep_set_wrprotect(struct mm_struct mm, unsigned long addr, pte_t ptep)
	295	{
3d1712c9	296	clear_bit(_PAGE_BIT_RW, &ptep->pte);
1da177e4 LT	297	}
	298
	299	/*
	300	* Macro to mark a page protection value as "uncacheable".
	301	*/
	302	#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) \| _PAGE_PCD \| _PAGE_PWT))
	303
1da177e4 LT	304	static inline int pmd_large(pmd_t pte) {
	305	return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
	306	}
	307
	308
	309	/*
	310	* Conversion functions: convert a page and protection to a page entry,
	311	* and a page entry and page directory to the page they refer to.
	312	*/
	313
1da177e4 LT	314	/*
	315	* Level 4 access.
	316	*/
46a82b2d DM	317	#define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
46a82b2d DM	318	#define pgd_page(pgd) (pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
1da177e4 LT	319	#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
	320	#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
	321	#define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
	322	#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
	323	#define mk_kernel_pgd(address) ((pgd_t){ (address) \| _KERNPG_TABLE })
	324
	325	/* PUD - Level3 access */
	326	/* to find an entry in a page-table-directory. */
46a82b2d DM	327	#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
46a82b2d DM	328	#define pud_page(pud) (pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
1da177e4	329	#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
46a82b2d	330	#define pud_offset(pgd, address) ((pud_t ) pgd_page_vaddr((pgd)) + pud_index(address))
1da177e4 LT	331	#define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
1da177e4 LT	332
1da177e4	333	/* PMD - Level 2 access */
46a82b2d	334	#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
1da177e4 LT	335	#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
	336
	337	#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
46a82b2d	338	#define pmd_offset(dir, address) ((pmd_t ) pud_page_vaddr((dir)) + \
1da177e4 LT	339	pmd_index(address))
	340	#define pmd_none(x) (!pmd_val(x))
	341	#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
	342	#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
1da177e4	343	#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) \| pgprot_val(prot)))
6b75aeed	344	#define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4 LT	345
	346	#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
	347	#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) \| _PAGE_FILE })
	348	#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
	349
	350	/* PTE - Level 1 access. */
	351
	352	/* page, protection -> pte */
	353	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
	354	#define mk_pte_huge(entry) (pte_val(entry) \|= _PAGE_PRESENT \| _PAGE_PSE)
	355
1da177e4	356	/* Change flags of a PTE */
9c0aa0f9	357	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4 LT	358	{
	359	pte_val(pte) &= _PAGE_CHG_MASK;
	360	pte_val(pte) \|= pgprot_val(newprot);
	361	pte_val(pte) &= __supported_pte_mask;
	362	return pte;
	363	}
	364
	365	#define pte_index(address) \
1294b118	366	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
46a82b2d	367	#define pte_offset_kernel(dir, address) ((pte_t ) pmd_page_vaddr((dir)) + \
1da177e4 LT	368	pte_index(address))
	369
	370	/* x86-64 always has all page tables mapped. */
	371	#define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
	372	#define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
	373	#define pte_unmap(pte) /* NOP */
	374	#define pte_unmap_nested(pte) /* NOP */
	375
	376	#define update_mmu_cache(vma,address,pte) do { } while (0)
	377
	378	/* We only update the dirty/accessed state if we set
	379	* the dirty bit by hand in the kernel, since the hardware
	380	* will do the accessed bit for us, and we don't want to
	381	* race with other CPU's that might be updating the dirty
	382	* bit at the same time. */
	383	#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
	384	#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
8dab5241 BH	385	({ \
	386	int __changed = !pte_same(*(__ptep), __entry); \
	387	if (__changed && __dirty) { \
	388	set_pte(__ptep, __entry); \
	389	flush_tlb_page(__vma, __address); \
	390	} \
	391	__changed; \
	392	})
1da177e4 LT	393
	394	/* Encode and de-code a swap entry */
	395	#define __swp_type(x) (((x).val >> 1) & 0x3f)
	396	#define __swp_offset(x) ((x).val >> 8)
	397	#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) \| ((offset) << 8) })
	398	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	399	#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
	400
8c914cb7	401	extern spinlock_t pgd_lock;
2bff7383	402	extern struct list_head pgd_list;
8c914cb7	403
1da177e4 LT	404	extern int kern_addr_valid(unsigned long addr);
1da177e4 LT	405
19d36ccd AK	406	pte_t *lookup_address(unsigned long addr);
19d36ccd AK	407
1da177e4 LT	408	#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
	409	remap_pfn_range(vma, vaddr, pfn, size, prot)
	410
1da177e4 LT	411	#define HAVE_ARCH_UNMAPPED_AREA
	412
	413	#define pgtable_cache_init() do { } while (0)
da8f153e	414	#define check_pgt_cache() do { } while (0)
1da177e4 LT	415
	416	#define PAGE_AGP PAGE_KERNEL_NOCACHE
	417	#define HAVE_PAGE_AGP 1
	418
	419	/* fs/proc/kcore.c */
	420	#define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
	421	#define kc_offset_to_vaddr(o) \
	422	(((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) \| (~__VIRTUAL_MASK)) : (o))
	423
	424	#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1da177e4	425	#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
61e06037	426	#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1da177e4 LT	427	#define __HAVE_ARCH_PTEP_SET_WRPROTECT
	428	#define __HAVE_ARCH_PTE_SAME
	429	#include <asm-generic/pgtable.h>
9d291e78	430	#endif /* !__ASSEMBLY__ */
1da177e4 LT	431
1da177e4 LT	432	#endif /* _X86_64_PGTABLE_H */