[PATCH] x86-64: Remove the identity mapping as early as possible
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-x86_64 / pgtable.h
CommitLineData
1da177e4
LT
1#ifndef _X86_64_PGTABLE_H
2#define _X86_64_PGTABLE_H
3
9d291e78
VG
4#include <asm/const.h>
5#ifndef __ASSEMBLY__
6
1da177e4
LT
7/*
8 * This file contains the functions and defines necessary to modify and use
9 * the x86-64 page table tree.
10 */
11#include <asm/processor.h>
1da177e4
LT
12#include <asm/bitops.h>
13#include <linux/threads.h>
14#include <asm/pda.h>
15
16extern pud_t level3_kernel_pgt[512];
1da177e4
LT
17extern pud_t level3_ident_pgt[512];
18extern pmd_t level2_kernel_pgt[512];
19extern pgd_t init_level4_pgt[];
20extern unsigned long __supported_pte_mask;
21
22#define swapper_pg_dir init_level4_pgt
23
1da177e4
LT
24extern void paging_init(void);
25extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
26
1da177e4
LT
27/*
28 * ZERO_PAGE is a global shared page that is always zero: used
29 * for zero-mapped memory areas etc..
30 */
31extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
32#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
33
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VG
34#endif /* !__ASSEMBLY__ */
35
1da177e4
LT
36/*
37 * PGDIR_SHIFT determines what a top-level page table entry can map
38 */
39#define PGDIR_SHIFT 39
40#define PTRS_PER_PGD 512
41
42/*
43 * 3rd level page
44 */
45#define PUD_SHIFT 30
46#define PTRS_PER_PUD 512
47
48/*
49 * PMD_SHIFT determines the size of the area a middle-level
50 * page table can map
51 */
52#define PMD_SHIFT 21
53#define PTRS_PER_PMD 512
54
55/*
56 * entries per page directory level
57 */
58#define PTRS_PER_PTE 512
59
9d291e78
VG
60#ifndef __ASSEMBLY__
61
1da177e4
LT
62#define pte_ERROR(e) \
63 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
64#define pmd_ERROR(e) \
65 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
66#define pud_ERROR(e) \
67 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
68#define pgd_ERROR(e) \
69 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
70
71#define pgd_none(x) (!pgd_val(x))
72#define pud_none(x) (!pud_val(x))
73
74static inline void set_pte(pte_t *dst, pte_t val)
75{
76 pte_val(*dst) = pte_val(val);
77}
78#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
79
80static inline void set_pmd(pmd_t *dst, pmd_t val)
81{
82 pmd_val(*dst) = pmd_val(val);
83}
84
85static inline void set_pud(pud_t *dst, pud_t val)
86{
87 pud_val(*dst) = pud_val(val);
88}
89
9c0aa0f9 90static inline void pud_clear (pud_t *pud)
1da177e4
LT
91{
92 set_pud(pud, __pud(0));
93}
94
95static inline void set_pgd(pgd_t *dst, pgd_t val)
96{
97 pgd_val(*dst) = pgd_val(val);
98}
99
9c0aa0f9 100static inline void pgd_clear (pgd_t * pgd)
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LT
101{
102 set_pgd(pgd, __pgd(0));
103}
104
1da177e4 105#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
61e06037 106
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TS
107struct mm_struct;
108
61e06037
ZA
109static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
110{
111 pte_t pte;
112 if (full) {
113 pte = *ptep;
114 *ptep = __pte(0);
115 } else {
116 pte = ptep_get_and_clear(mm, addr, ptep);
117 }
118 return pte;
119}
120
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LT
121#define pte_same(a, b) ((a).pte == (b).pte)
122
c728252c
AV
123#define pte_pgprot(a) (__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
124
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VG
125#endif /* !__ASSEMBLY__ */
126
127#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
1da177e4 128#define PMD_MASK (~(PMD_SIZE-1))
9d291e78 129#define PUD_SIZE (_AC(1,UL) << PUD_SHIFT)
1da177e4 130#define PUD_MASK (~(PUD_SIZE-1))
9d291e78 131#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
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LT
132#define PGDIR_MASK (~(PGDIR_SIZE-1))
133
f83f2b5f 134#define USER_PTRS_PER_PGD ((TASK_SIZE-1)/PGDIR_SIZE+1)
d455a369 135#define FIRST_USER_ADDRESS 0
1da177e4 136
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VG
137#define MAXMEM 0x3fffffffffff
138#define VMALLOC_START 0xffffc20000000000
139#define VMALLOC_END 0xffffe1ffffffffff
140#define MODULES_VADDR 0xffffffff88000000
141#define MODULES_END 0xfffffffffff00000
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LT
142#define MODULES_LEN (MODULES_END - MODULES_VADDR)
143
144#define _PAGE_BIT_PRESENT 0
145#define _PAGE_BIT_RW 1
146#define _PAGE_BIT_USER 2
147#define _PAGE_BIT_PWT 3
148#define _PAGE_BIT_PCD 4
149#define _PAGE_BIT_ACCESSED 5
150#define _PAGE_BIT_DIRTY 6
151#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
152#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
153#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
154
155#define _PAGE_PRESENT 0x001
156#define _PAGE_RW 0x002
157#define _PAGE_USER 0x004
158#define _PAGE_PWT 0x008
159#define _PAGE_PCD 0x010
160#define _PAGE_ACCESSED 0x020
161#define _PAGE_DIRTY 0x040
162#define _PAGE_PSE 0x080 /* 2MB page */
9b4ee40e 163#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
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164#define _PAGE_GLOBAL 0x100 /* Global TLB entry */
165
166#define _PAGE_PROTNONE 0x080 /* If not present */
9d291e78 167#define _PAGE_NX (_AC(1,UL)<<_PAGE_BIT_NX)
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168
169#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
170#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
171
172#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
173
174#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
175#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
176#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
177#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
178#define PAGE_COPY PAGE_COPY_NOEXEC
179#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
180#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
181#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
182#define __PAGE_KERNEL \
183 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
184#define __PAGE_KERNEL_EXEC \
185 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
186#define __PAGE_KERNEL_NOCACHE \
187 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX)
188#define __PAGE_KERNEL_RO \
189 (_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
190#define __PAGE_KERNEL_VSYSCALL \
191 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
192#define __PAGE_KERNEL_VSYSCALL_NOCACHE \
193 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD)
194#define __PAGE_KERNEL_LARGE \
195 (__PAGE_KERNEL | _PAGE_PSE)
8bf27556
EB
196#define __PAGE_KERNEL_LARGE_EXEC \
197 (__PAGE_KERNEL_EXEC | _PAGE_PSE)
1da177e4
LT
198
199#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
200
201#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
202#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
203#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
204#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
205#define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
206#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
207#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
208#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
209
210/* xwr */
211#define __P000 PAGE_NONE
212#define __P001 PAGE_READONLY
213#define __P010 PAGE_COPY
214#define __P011 PAGE_COPY
215#define __P100 PAGE_READONLY_EXEC
216#define __P101 PAGE_READONLY_EXEC
217#define __P110 PAGE_COPY_EXEC
218#define __P111 PAGE_COPY_EXEC
219
220#define __S000 PAGE_NONE
221#define __S001 PAGE_READONLY
222#define __S010 PAGE_SHARED
223#define __S011 PAGE_SHARED
224#define __S100 PAGE_READONLY_EXEC
225#define __S101 PAGE_READONLY_EXEC
226#define __S110 PAGE_SHARED_EXEC
227#define __S111 PAGE_SHARED_EXEC
228
9d291e78
VG
229#ifndef __ASSEMBLY__
230
eab724e5
JB
231static inline unsigned long pgd_bad(pgd_t pgd)
232{
233 return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
234}
1da177e4
LT
235
236static inline unsigned long pud_bad(pud_t pud)
237{
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JB
238 return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
239}
240
241static inline unsigned long pmd_bad(pmd_t pmd)
242{
243 return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
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LT
244}
245
246#define pte_none(x) (!pte_val(x))
247#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
248#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
249
250#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this
251 right? */
252#define pte_page(x) pfn_to_page(pte_pfn(x))
6b75aeed 253#define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4
LT
254
255static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
256{
257 pte_t pte;
258 pte_val(pte) = (page_nr << PAGE_SHIFT);
259 pte_val(pte) |= pgprot_val(pgprot);
260 pte_val(pte) &= __supported_pte_mask;
261 return pte;
262}
263
264/*
265 * The following only work if pte_present() is true.
266 * Undefined behaviour if not..
267 */
32e51a8c 268#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
1da177e4 269static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
4839057c 270static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
df992848 271static inline int pte_exec(pte_t pte) { return !(pte_val(pte) & _PAGE_NX); }
4839057c
AB
272static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
273static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
274static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
1da177e4 275static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
8f860591 276static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_PSE; }
1da177e4 277
4839057c
AB
278static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
279static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
280static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
281static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
282static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
283static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
df992848 284static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
4839057c
AB
285static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
286static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
287static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
8f860591 288static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
5e6b0bfe 289static inline pte_t pte_clrhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
1da177e4
LT
290
291struct vm_area_struct;
292
293static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
294{
295 if (!pte_dirty(*ptep))
296 return 0;
3d1712c9 297 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
1da177e4
LT
298}
299
300static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
301{
302 if (!pte_young(*ptep))
303 return 0;
3d1712c9 304 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
1da177e4
LT
305}
306
307static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
308{
3d1712c9 309 clear_bit(_PAGE_BIT_RW, &ptep->pte);
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LT
310}
311
312/*
313 * Macro to mark a page protection value as "uncacheable".
314 */
315#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
316
1da177e4
LT
317static inline int pmd_large(pmd_t pte) {
318 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
319}
320
321
322/*
323 * Conversion functions: convert a page and protection to a page entry,
324 * and a page entry and page directory to the page they refer to.
325 */
326
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LT
327/*
328 * Level 4 access.
329 */
46a82b2d
DM
330#define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
331#define pgd_page(pgd) (pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
1da177e4
LT
332#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
333#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
334#define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
335#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
336#define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })
337
338/* PUD - Level3 access */
339/* to find an entry in a page-table-directory. */
46a82b2d
DM
340#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
341#define pud_page(pud) (pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
1da177e4 342#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
46a82b2d 343#define pud_offset(pgd, address) ((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
1da177e4
LT
344#define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
345
1da177e4 346/* PMD - Level 2 access */
46a82b2d 347#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
1da177e4
LT
348#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
349
350#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
46a82b2d 351#define pmd_offset(dir, address) ((pmd_t *) pud_page_vaddr(*(dir)) + \
1da177e4
LT
352 pmd_index(address))
353#define pmd_none(x) (!pmd_val(x))
354#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
355#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
1da177e4 356#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
6b75aeed 357#define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
1da177e4
LT
358
359#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
360#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
361#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
362
363/* PTE - Level 1 access. */
364
365/* page, protection -> pte */
366#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
367#define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
368
1da177e4 369/* Change flags of a PTE */
9c0aa0f9 370static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4
LT
371{
372 pte_val(pte) &= _PAGE_CHG_MASK;
373 pte_val(pte) |= pgprot_val(newprot);
374 pte_val(pte) &= __supported_pte_mask;
375 return pte;
376}
377
378#define pte_index(address) \
1294b118 379 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
46a82b2d 380#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
1da177e4
LT
381 pte_index(address))
382
383/* x86-64 always has all page tables mapped. */
384#define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
385#define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
386#define pte_unmap(pte) /* NOP */
387#define pte_unmap_nested(pte) /* NOP */
388
389#define update_mmu_cache(vma,address,pte) do { } while (0)
390
391/* We only update the dirty/accessed state if we set
392 * the dirty bit by hand in the kernel, since the hardware
393 * will do the accessed bit for us, and we don't want to
394 * race with other CPU's that might be updating the dirty
395 * bit at the same time. */
396#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
397#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
398 do { \
399 if (__dirty) { \
400 set_pte(__ptep, __entry); \
401 flush_tlb_page(__vma, __address); \
402 } \
403 } while (0)
404
405/* Encode and de-code a swap entry */
406#define __swp_type(x) (((x).val >> 1) & 0x3f)
407#define __swp_offset(x) ((x).val >> 8)
408#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
409#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
410#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
411
8c914cb7
JB
412extern spinlock_t pgd_lock;
413extern struct page *pgd_list;
414void vmalloc_sync_all(void);
415
1da177e4
LT
416extern int kern_addr_valid(unsigned long addr);
417
1da177e4
LT
418#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
419 remap_pfn_range(vma, vaddr, pfn, size, prot)
420
421#define MK_IOSPACE_PFN(space, pfn) (pfn)
422#define GET_IOSPACE(pfn) 0
423#define GET_PFN(pfn) (pfn)
424
425#define HAVE_ARCH_UNMAPPED_AREA
426
427#define pgtable_cache_init() do { } while (0)
428#define check_pgt_cache() do { } while (0)
429
430#define PAGE_AGP PAGE_KERNEL_NOCACHE
431#define HAVE_PAGE_AGP 1
432
433/* fs/proc/kcore.c */
434#define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
435#define kc_offset_to_vaddr(o) \
436 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
437
438#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
439#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
440#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
61e06037 441#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1da177e4
LT
442#define __HAVE_ARCH_PTEP_SET_WRPROTECT
443#define __HAVE_ARCH_PTE_SAME
444#include <asm-generic/pgtable.h>
9d291e78 445#endif /* !__ASSEMBLY__ */
1da177e4
LT
446
447#endif /* _X86_64_PGTABLE_H */