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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / auxadc / mt_auxadc.c
CommitLineData
6fa3eb70
S		 1/*****************************************************************************
2 *
3 * Filename:
4 * ---------
5 * mt_auxadc.c
6 *
7 * Project:
8 * --------
9 * Android_Software
10 *
11 * Description:
12 * ------------
13 * This Module defines functions of AUXADC common code
14 *
15 * Author:
16 * -------
17 * Zhong Wang
18 *
19 ****************************************************************************/
20
21#include <linux/init.h> /* For init/exit macros */
22#include <linux/module.h> /* For MODULE_ marcros */
23#include <linux/fs.h>
24#include <linux/device.h>
25#include <linux/interrupt.h>
26#include <linux/spinlock.h>
27#include <linux/platform_device.h>
28#include <linux/device.h>
29#include <linux/kdev_t.h>
30#include <linux/fs.h>
31#include <linux/cdev.h>
32#include <linux/delay.h>
33#include <linux/kernel.h>
34#include <linux/types.h>
35#include <linux/slab.h>
36#include <linux/sched.h>
37#include <linux/proc_fs.h>
38#include <linux/kthread.h>
39
40#include <asm/uaccess.h>
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <mach/mt_gpt.h>
44#include <mach/mt_clkmgr.h>
45#include <mach/sync_write.h>
46#include <cust_adc.h> /* generate by DCT Tool */
47
48#include "mt_auxadc.h"
49#include <mt_auxadc_sw.h>
50
51
52/*****************************************************************************
53 * Integrate with NVRAM
54****************************************************************************/
55#define AUXADC_CALI_DEVNAME "mtk-adc-cali"
56
57#define TEST_ADC_CALI_PRINT _IO('k', 0)
58#define SET_ADC_CALI_Slop _IOW('k', 1, int)
59#define SET_ADC_CALI_Offset _IOW('k', 2, int)
60#define SET_ADC_CALI_Cal _IOW('k', 3, int)
61#define ADC_CHANNEL_READ _IOW('k', 4, int)
62
63typedef struct adc_info {
64 char channel_name[64];
65 int channel_number;
66 int reserve1;
67 int reserve2;
68 int reserve3;
69}ADC_INFO;
70
71static ADC_INFO g_adc_info[ADC_CHANNEL_MAX];
72static int auxadc_cali_slop[ADC_CHANNEL_MAX] = {0};
73static int auxadc_cali_offset[ADC_CHANNEL_MAX] = {0};
74
75static kal_bool g_AUXADC_Cali = KAL_FALSE;
76
77static int auxadc_cali_cal[1] = {0};
78static int auxadc_in_data[2] = {1,1};
79static int auxadc_out_data[2] = {1,1};
80
81static DEFINE_MUTEX(auxadc_mutex);
82static dev_t auxadc_cali_devno;
83static int auxadc_cali_major;
84static struct cdev *auxadc_cali_cdev;
85static struct class *auxadc_cali_class;
86
87static struct task_struct *thread;
88static int g_start_debug_thread;
89
90static int g_adc_init_flag;
91
92/* ///////////////////////////////////////////////////////////////////////////////////////// */
93/* // fop Common API */
94/* ///////////////////////////////////////////////////////////////////////////////////////// */
95int IMM_IsAdcInitReady(void)
96{
97 return g_adc_init_flag;
98}
99
100int IMM_get_adc_channel_num(char *channel_name, int len)
101{
102 unsigned int i;
103
104 printk("[ADC] name = %s\n", channel_name);
105 printk("[ADC] name_len = %d\n", len);
106 for (i = 0; i < ADC_CHANNEL_MAX; i++) {
107 if (!strncmp(channel_name, g_adc_info[i].channel_name, len)) {
108 return g_adc_info[i].channel_number;
109 }
110 }
111 printk("[ADC] find channel number failed\n");
112 return -1;
113}
114
115int IMM_GetOneChannelValue(int dwChannel, int data[4], int* rawdata)
116{
117 return IMM_auxadc_GetOneChannelValue(dwChannel, data, rawdata);
118}
119
120/* 1v == 1000000 uv */
121/* this function voltage Unit is uv */
122int IMM_GetOneChannelValue_Cali(int Channel, int*voltage)
123{
124 return IMM_auxadc_GetOneChannelValue_Cali(Channel, voltage);
125}
126
127
128/* ///////////////////////////////////////////////////////////////////////////////////////// */
129/* // fop API */
130/* ///////////////////////////////////////////////////////////////////////////////////////// */
131static long auxadc_cali_unlocked_ioctl(struct file *file, unsigned int cmd,unsigned long arg)
132{
133 int i = 0, ret = 0;
134 long *user_data_addr;
135 long *nvram_data_addr;
136
137 mutex_lock(&auxadc_mutex);
138
139 switch (cmd) {
140 case TEST_ADC_CALI_PRINT :
141 g_AUXADC_Cali = KAL_FALSE;
142 break;
143
144 case SET_ADC_CALI_Slop:
145 nvram_data_addr = (long *)arg;
146 ret = copy_from_user(auxadc_cali_slop, nvram_data_addr, 36);
147 g_AUXADC_Cali = KAL_FALSE;
148 /* Protection */
149 for (i = 0; i < ADC_CHANNEL_MAX; i++) {
150 if ((*(auxadc_cali_slop + i) == 0) || (*(auxadc_cali_slop + i) == 1)) {
151 *(auxadc_cali_slop + i) = 1000;
152 }
153 }
154 for (i = 0; i < ADC_CHANNEL_MAX; i++)
155 printk("auxadc_cali_slop[%d] = %d\n", i, *(auxadc_cali_slop + i));
156 printk("**** MT auxadc_cali ioctl : SET_ADC_CALI_Slop Done!\n");
157 break;
158
159 case SET_ADC_CALI_Offset:
160 nvram_data_addr = (long *)arg;
161 ret = copy_from_user(auxadc_cali_offset, nvram_data_addr, 36);
162 g_AUXADC_Cali = KAL_FALSE;
163 for (i = 0; i < ADC_CHANNEL_MAX; i++)
164 printk("auxadc_cali_offset[%d] = %d\n", i, *(auxadc_cali_offset + i));
165 printk("**** MT auxadc_cali ioctl : SET_ADC_CALI_Offset Done!\n");
166 break;
167
168 case SET_ADC_CALI_Cal :
169 nvram_data_addr = (long *)arg;
170 ret = copy_from_user(auxadc_cali_cal, nvram_data_addr, 4);
171 g_AUXADC_Cali = KAL_TRUE; /* enable calibration after setting AUXADC_CALI_Cal */
172 if (auxadc_cali_cal[0] == 1) {
173 g_AUXADC_Cali = KAL_TRUE;
174 } else {
175 g_AUXADC_Cali = KAL_FALSE;
176 }
177 for (i = 0; i < 1; i++)
178 printk("auxadc_cali_cal[%d] = %d\n", i, *(auxadc_cali_cal + i));
179 printk("**** MT auxadc_cali ioctl : SET_ADC_CALI_Cal Done!\n");
180 break;
181
182 case ADC_CHANNEL_READ:
183 g_AUXADC_Cali = KAL_FALSE; /* 20100508 Infinity */
184 user_data_addr = (long *)arg;
185 ret = copy_from_user(auxadc_in_data, user_data_addr, 8); /* 2*int = 2*4 */
186
187 printk("this api is removed !! \n");
188 ret = copy_to_user(user_data_addr, auxadc_out_data, 8);
189 printk("**** ioctl : AUXADC Channel %d * %d times = %d\n", auxadc_in_data[0],
190 auxadc_in_data[1], auxadc_out_data[0]);
191 break;
192
193 default:
194 g_AUXADC_Cali = KAL_FALSE;
195 break;
196 }
197
198 mutex_unlock(&auxadc_mutex);
199
200 return 0;
201}
202
203static int auxadc_cali_open(struct inode *inode, struct file *file)
204{
205 return 0;
206}
207
208static int auxadc_cali_release(struct inode *inode, struct file *file)
209{
210 return 0;
211}
212
213static struct file_operations auxadc_cali_fops = {
214 .owner = THIS_MODULE,
215 .unlocked_ioctl = auxadc_cali_unlocked_ioctl,
216 .open = auxadc_cali_open,
217 .release = auxadc_cali_release,
218};
219
220/* ///////////////////////////////////////////////////////////////////////////////////////// */
221/* // Create File For EM : AUXADC_Channel_X_Slope/Offset */
222/* ///////////////////////////////////////////////////////////////////////////////////////// */
223#if ADC_CHANNEL_MAX>0
224static ssize_t show_AUXADC_Channel_0_Slope(struct device *dev, struct device_attribute *attr,
225 char *buf)
226{
227 int ret_value = 1;
228 ret_value = (*(auxadc_cali_slop + 0));
229 printk("[EM] AUXADC_Channel_0_Slope : %d\n", ret_value);
230 return sprintf(buf, "%u\n", ret_value);
231}
232
233static ssize_t store_AUXADC_Channel_0_Slope(struct device *dev, struct device_attribute *attr,
234 const char *buf, size_t size)
235{
236 printk("[EM] Not Support Write Function\n");
237 return size;
238}
239
240static DEVICE_ATTR(AUXADC_Channel_0_Slope, 0664, show_AUXADC_Channel_0_Slope,
241 store_AUXADC_Channel_0_Slope);
242static ssize_t show_AUXADC_Channel_0_Offset(struct device *dev, struct device_attribute *attr,
243 char *buf)
244{
245 int ret_value = 1;
246 ret_value = (*(auxadc_cali_offset + 0));
247 printk("[EM] AUXADC_Channel_0_Offset : %d\n", ret_value);
248 return sprintf(buf, "%u\n", ret_value);
249}
250
251static ssize_t store_AUXADC_Channel_0_Offset(struct device *dev, struct device_attribute *attr,
252 const char *buf, size_t size)
253{
254 printk("[EM] Not Support Write Function\n");
255 return size;
256}
257
258static DEVICE_ATTR(AUXADC_Channel_0_Offset, 0664, show_AUXADC_Channel_0_Offset,
259 store_AUXADC_Channel_0_Offset);
260#endif
261
262
263#if ADC_CHANNEL_MAX>1
264static ssize_t show_AUXADC_Channel_1_Slope(struct device *dev, struct device_attribute *attr,
265 char *buf)
266{
267 int ret_value = 1;
268 ret_value = (*(auxadc_cali_slop + 1));
269 printk("[EM] AUXADC_Channel_1_Slope : %d\n", ret_value);
270 return sprintf(buf, "%u\n", ret_value);
271}
272
273static ssize_t store_AUXADC_Channel_1_Slope(struct device *dev, struct device_attribute *attr,
274 const char *buf, size_t size)
275{
276 printk("[EM] Not Support Write Function\n");
277 return size;
278}
279
280static DEVICE_ATTR(AUXADC_Channel_1_Slope, 0664, show_AUXADC_Channel_1_Slope,
281 store_AUXADC_Channel_1_Slope);
282static ssize_t show_AUXADC_Channel_1_Offset(struct device *dev, struct device_attribute *attr,
283 char *buf)
284{
285 int ret_value = 1;
286 ret_value = (*(auxadc_cali_offset + 1));
287 printk("[EM] AUXADC_Channel_1_Offset : %d\n", ret_value);
288 return sprintf(buf, "%u\n", ret_value);
289}
290
291static ssize_t store_AUXADC_Channel_1_Offset(struct device *dev, struct device_attribute *attr,
292 const char *buf, size_t size)
293{
294 printk("[EM] Not Support Write Function\n");
295 return size;
296}
297
298static DEVICE_ATTR(AUXADC_Channel_1_Offset, 0664, show_AUXADC_Channel_1_Offset,
299 store_AUXADC_Channel_1_Offset);
300#endif
301
302
303#if ADC_CHANNEL_MAX>2
304static ssize_t show_AUXADC_Channel_2_Slope(struct device *dev, struct device_attribute *attr,
305 char *buf)
306{
307 int ret_value = 1;
308 ret_value = (*(auxadc_cali_slop + 2));
309 printk("[EM] AUXADC_Channel_2_Slope : %d\n", ret_value);
310 return sprintf(buf, "%u\n", ret_value);
311}
312
313static ssize_t store_AUXADC_Channel_2_Slope(struct device *dev, struct device_attribute *attr,
314 const char *buf, size_t size)
315{
316 printk("[EM] Not Support Write Function\n");
317 return size;
318}
319
320static DEVICE_ATTR(AUXADC_Channel_2_Slope, 0664, show_AUXADC_Channel_2_Slope,
321 store_AUXADC_Channel_2_Slope);
322static ssize_t show_AUXADC_Channel_2_Offset(struct device *dev, struct device_attribute *attr,
323 char *buf)
324{
325 int ret_value = 1;
326 ret_value = (*(auxadc_cali_offset + 2));
327 printk("[EM] AUXADC_Channel_2_Offset : %d\n", ret_value);
328 return sprintf(buf, "%u\n", ret_value);
329}
330
331static ssize_t store_AUXADC_Channel_2_Offset(struct device *dev, struct device_attribute *attr,
332 const char *buf, size_t size)
333{
334 printk("[EM] Not Support Write Function\n");
335 return size;
336}
337
338static DEVICE_ATTR(AUXADC_Channel_2_Offset, 0664, show_AUXADC_Channel_2_Offset,
339 store_AUXADC_Channel_2_Offset);
340#endif
341
342
343#if ADC_CHANNEL_MAX>3
344static ssize_t show_AUXADC_Channel_3_Slope(struct device *dev, struct device_attribute *attr,
345 char *buf)
346{
347 int ret_value = 1;
348 ret_value = (*(auxadc_cali_slop + 3));
349 printk("[EM] AUXADC_Channel_3_Slope : %d\n", ret_value);
350 return sprintf(buf, "%u\n", ret_value);
351}
352
353static ssize_t store_AUXADC_Channel_3_Slope(struct device *dev, struct device_attribute *attr,
354 const char *buf, size_t size)
355{
356 printk("[EM] Not Support Write Function\n");
357 return size;
358}
359
360static DEVICE_ATTR(AUXADC_Channel_3_Slope, 0664, show_AUXADC_Channel_3_Slope,
361 store_AUXADC_Channel_3_Slope);
362static ssize_t show_AUXADC_Channel_3_Offset(struct device *dev, struct device_attribute *attr,
363 char *buf)
364{
365 int ret_value = 1;
366 ret_value = (*(auxadc_cali_offset + 3));
367 printk("[EM] AUXADC_Channel_3_Offset : %d\n", ret_value);
368 return sprintf(buf, "%u\n", ret_value);
369}
370
371static ssize_t store_AUXADC_Channel_3_Offset(struct device *dev, struct device_attribute *attr,
372 const char *buf, size_t size)
373{
374 printk("[EM] Not Support Write Function\n");
375 return size;
376}
377
378static DEVICE_ATTR(AUXADC_Channel_3_Offset, 0664, show_AUXADC_Channel_3_Offset,
379 store_AUXADC_Channel_3_Offset);
380#endif
381
382
383#if ADC_CHANNEL_MAX>4
384static ssize_t show_AUXADC_Channel_4_Slope(struct device *dev, struct device_attribute *attr,
385 char *buf)
386{
387 int ret_value = 1;
388 ret_value = (*(auxadc_cali_slop + 4));
389 printk("[EM] AUXADC_Channel_4_Slope : %d\n", ret_value);
390 return sprintf(buf, "%u\n", ret_value);
391}
392
393static ssize_t store_AUXADC_Channel_4_Slope(struct device *dev, struct device_attribute *attr,
394 const char *buf, size_t size)
395{
396 printk("[EM] Not Support Write Function\n");
397 return size;
398}
399
400static DEVICE_ATTR(AUXADC_Channel_4_Slope, 0664, show_AUXADC_Channel_4_Slope,
401 store_AUXADC_Channel_4_Slope);
402static ssize_t show_AUXADC_Channel_4_Offset(struct device *dev, struct device_attribute *attr,
403 char *buf)
404{
405 int ret_value = 1;
406 ret_value = (*(auxadc_cali_offset + 4));
407 printk("[EM] AUXADC_Channel_4_Offset : %d\n", ret_value);
408 return sprintf(buf, "%u\n", ret_value);
409}
410
411static ssize_t store_AUXADC_Channel_4_Offset(struct device *dev, struct device_attribute *attr,
412 const char *buf, size_t size)
413{
414 printk("[EM] Not Support Write Function\n");
415 return size;
416}
417
418static DEVICE_ATTR(AUXADC_Channel_4_Offset, 0664, show_AUXADC_Channel_4_Offset,
419 store_AUXADC_Channel_4_Offset);
420#endif
421
422
423#if ADC_CHANNEL_MAX>5
424static ssize_t show_AUXADC_Channel_5_Slope(struct device *dev, struct device_attribute *attr,
425 char *buf)
426{
427 int ret_value = 1;
428 ret_value = (*(auxadc_cali_slop + 5));
429 printk("[EM] AUXADC_Channel_5_Slope : %d\n", ret_value);
430 return sprintf(buf, "%u\n", ret_value);
431}
432
433static ssize_t store_AUXADC_Channel_5_Slope(struct device *dev, struct device_attribute *attr,
434 const char *buf, size_t size)
435{
436 printk("[EM] Not Support Write Function\n");
437 return size;
438}
439
440static DEVICE_ATTR(AUXADC_Channel_5_Slope, 0664, show_AUXADC_Channel_5_Slope,
441 store_AUXADC_Channel_5_Slope);
442static ssize_t show_AUXADC_Channel_5_Offset(struct device *dev, struct device_attribute *attr,
443 char *buf)
444{
445 int ret_value = 1;
446 ret_value = (*(auxadc_cali_offset + 5));
447 printk("[EM] AUXADC_Channel_5_Offset : %d\n", ret_value);
448 return sprintf(buf, "%u\n", ret_value);
449}
450
451static ssize_t store_AUXADC_Channel_5_Offset(struct device *dev, struct device_attribute *attr,
452 const char *buf, size_t size)
453{
454 printk("[EM] Not Support Write Function\n");
455 return size;
456}
457
458static DEVICE_ATTR(AUXADC_Channel_5_Offset, 0664, show_AUXADC_Channel_5_Offset,
459 store_AUXADC_Channel_5_Offset);
460#endif
461
462
463#if ADC_CHANNEL_MAX>6
464static ssize_t show_AUXADC_Channel_6_Slope(struct device *dev, struct device_attribute *attr,
465 char *buf)
466{
467 int ret_value = 1;
468 ret_value = (*(auxadc_cali_slop + 6));
469 printk("[EM] AUXADC_Channel_6_Slope : %d\n", ret_value);
470 return sprintf(buf, "%u\n", ret_value);
471}
472
473static ssize_t store_AUXADC_Channel_6_Slope(struct device *dev, struct device_attribute *attr,
474 const char *buf, size_t size)
475{
476 printk("[EM] Not Support Write Function\n");
477 return size;
478}
479
480static DEVICE_ATTR(AUXADC_Channel_6_Slope, 0664, show_AUXADC_Channel_6_Slope,
481 store_AUXADC_Channel_6_Slope);
482static ssize_t show_AUXADC_Channel_6_Offset(struct device *dev, struct device_attribute *attr,
483 char *buf)
484{
485 int ret_value = 1;
486 ret_value = (*(auxadc_cali_offset + 6));
487 printk("[EM] AUXADC_Channel_6_Offset : %d\n", ret_value);
488 return sprintf(buf, "%u\n", ret_value);
489}
490
491static ssize_t store_AUXADC_Channel_6_Offset(struct device *dev, struct device_attribute *attr,
492 const char *buf, size_t size)
493{
494 printk("[EM] Not Support Write Function\n");
495 return size;
496}
497
498static DEVICE_ATTR(AUXADC_Channel_6_Offset, 0664, show_AUXADC_Channel_6_Offset,
499 store_AUXADC_Channel_6_Offset);
500#endif
501
502
503#if ADC_CHANNEL_MAX>7
504static ssize_t show_AUXADC_Channel_7_Slope(struct device *dev, struct device_attribute *attr,
505 char *buf)
506{
507 int ret_value = 1;
508 ret_value = (*(auxadc_cali_slop + 7));
509 printk("[EM] AUXADC_Channel_7_Slope : %d\n", ret_value);
510 return sprintf(buf, "%u\n", ret_value);
511}
512
513static ssize_t store_AUXADC_Channel_7_Slope(struct device *dev, struct device_attribute *attr,
514 const char *buf, size_t size)
515{
516 printk("[EM] Not Support Write Function\n");
517 return size;
518}
519
520static DEVICE_ATTR(AUXADC_Channel_7_Slope, 0664, show_AUXADC_Channel_7_Slope,
521 store_AUXADC_Channel_7_Slope);
522static ssize_t show_AUXADC_Channel_7_Offset(struct device *dev, struct device_attribute *attr,
523 char *buf)
524{
525 int ret_value = 1;
526 ret_value = (*(auxadc_cali_offset + 7));
527 printk("[EM] AUXADC_Channel_7_Offset : %d\n", ret_value);
528 return sprintf(buf, "%u\n", ret_value);
529}
530
531static ssize_t store_AUXADC_Channel_7_Offset(struct device *dev, struct device_attribute *attr,
532 const char *buf, size_t size)
533{
534 printk("[EM] Not Support Write Function\n");
535 return size;
536}
537
538static DEVICE_ATTR(AUXADC_Channel_7_Offset, 0664, show_AUXADC_Channel_7_Offset,
539 store_AUXADC_Channel_7_Offset);
540#endif
541
542
543#if ADC_CHANNEL_MAX>8
544static ssize_t show_AUXADC_Channel_8_Slope(struct device *dev, struct device_attribute *attr,
545 char *buf)
546{
547 int ret_value = 1;
548 ret_value = (*(auxadc_cali_slop + 8));
549 printk("[EM] AUXADC_Channel_8_Slope : %d\n", ret_value);
550 return sprintf(buf, "%u\n", ret_value);
551}
552
553static ssize_t store_AUXADC_Channel_8_Slope(struct device *dev, struct device_attribute *attr,
554 const char *buf, size_t size)
555{
556 printk("[EM] Not Support Write Function\n");
557 return size;
558}
559
560static DEVICE_ATTR(AUXADC_Channel_8_Slope, 0664, show_AUXADC_Channel_8_Slope,
561 store_AUXADC_Channel_8_Slope);
562static ssize_t show_AUXADC_Channel_8_Offset(struct device *dev, struct device_attribute *attr,
563 char *buf)
564{
565 int ret_value = 1;
566 ret_value = (*(auxadc_cali_offset + 8));
567 printk("[EM] AUXADC_Channel_8_Offset : %d\n", ret_value);
568 return sprintf(buf, "%u\n", ret_value);
569}
570
571static ssize_t store_AUXADC_Channel_8_Offset(struct device *dev, struct device_attribute *attr,
572 const char *buf, size_t size)
573{
574 printk("[EM] Not Support Write Function\n");
575 return size;
576}
577
578static DEVICE_ATTR(AUXADC_Channel_8_Offset, 0664, show_AUXADC_Channel_8_Offset,
579 store_AUXADC_Channel_8_Offset);
580#endif
581
582
583#if ADC_CHANNEL_MAX>9
584static ssize_t show_AUXADC_Channel_9_Slope(struct device *dev, struct device_attribute *attr,
585 char *buf)
586{
587 int ret_value = 1;
588 ret_value = (*(auxadc_cali_slop + 9));
589 printk("[EM] AUXADC_Channel_9_Slope : %d\n", ret_value);
590 return sprintf(buf, "%u\n", ret_value);
591}
592
593static ssize_t store_AUXADC_Channel_9_Slope(struct device *dev, struct device_attribute *attr,
594 const char *buf, size_t size)
595{
596 printk("[EM] Not Support Write Function\n");
597 return size;
598}
599
600static DEVICE_ATTR(AUXADC_Channel_9_Slope, 0664, show_AUXADC_Channel_9_Slope,
601 store_AUXADC_Channel_9_Slope);
602static ssize_t show_AUXADC_Channel_9_Offset(struct device *dev, struct device_attribute *attr,
603 char *buf)
604{
605 int ret_value = 1;
606 ret_value = (*(auxadc_cali_offset + 9));
607 printk("[EM] AUXADC_Channel_9_Offset : %d\n", ret_value);
608 return sprintf(buf, "%u\n", ret_value);
609}
610
611static ssize_t store_AUXADC_Channel_9_Offset(struct device *dev, struct device_attribute *attr,
612 const char *buf, size_t size)
613{
614 printk("[EM] Not Support Write Function\n");
615 return size;
616}
617
618static DEVICE_ATTR(AUXADC_Channel_9_Offset, 0664, show_AUXADC_Channel_9_Offset,
619 store_AUXADC_Channel_9_Offset);
620#endif
621
622
623#if ADC_CHANNEL_MAX>10
624static ssize_t show_AUXADC_Channel_10_Slope(struct device *dev, struct device_attribute *attr,
625 char *buf)
626{
627 int ret_value = 1;
628 ret_value = (*(auxadc_cali_slop + 10));
629 printk("[EM] AUXADC_Channel_10_Slope : %d\n", ret_value);
630 return sprintf(buf, "%u\n", ret_value);
631}
632
633static ssize_t store_AUXADC_Channel_10_Slope(struct device *dev, struct device_attribute *attr,
634 const char *buf, size_t size)
635{
636 printk("[EM] Not Support Write Function\n");
637 return size;
638}
639
640static DEVICE_ATTR(AUXADC_Channel_10_Slope, 0664, show_AUXADC_Channel_10_Slope,
641 store_AUXADC_Channel_10_Slope);
642static ssize_t show_AUXADC_Channel_10_Offset(struct device *dev, struct device_attribute *attr,
643 char *buf)
644{
645 int ret_value = 1;
646 ret_value = (*(auxadc_cali_offset + 10));
647 printk("[EM] AUXADC_Channel_10_Offset : %d\n", ret_value);
648 return sprintf(buf, "%u\n", ret_value);
649}
650
651static ssize_t store_AUXADC_Channel_10_Offset(struct device *dev, struct device_attribute *attr,
652 const char *buf, size_t size)
653{
654 printk("[EM] Not Support Write Function\n");
655 return size;
656}
657
658static DEVICE_ATTR(AUXADC_Channel_10_Offset, 0664, show_AUXADC_Channel_10_Offset,
659 store_AUXADC_Channel_10_Offset);
660#endif
661
662
663#if ADC_CHANNEL_MAX>11
664static ssize_t show_AUXADC_Channel_11_Slope(struct device *dev, struct device_attribute *attr,
665 char *buf)
666{
667 int ret_value = 1;
668 ret_value = (*(auxadc_cali_slop + 11));
669 printk("[EM] AUXADC_Channel_11_Slope : %d\n", ret_value);
670 return sprintf(buf, "%u\n", ret_value);
671}
672
673static ssize_t store_AUXADC_Channel_11_Slope(struct device *dev, struct device_attribute *attr,
674 const char *buf, size_t size)
675{
676 printk("[EM] Not Support Write Function\n");
677 return size;
678}
679
680static DEVICE_ATTR(AUXADC_Channel_11_Slope, 0664, show_AUXADC_Channel_11_Slope,
681 store_AUXADC_Channel_11_Slope);
682static ssize_t show_AUXADC_Channel_11_Offset(struct device *dev, struct device_attribute *attr,
683 char *buf)
684{
685 int ret_value = 1;
686 ret_value = (*(auxadc_cali_offset + 11));
687 printk("[EM] AUXADC_Channel_11_Offset : %d\n", ret_value);
688 return sprintf(buf, "%u\n", ret_value);
689}
690
691static ssize_t store_AUXADC_Channel_11_Offset(struct device *dev, struct device_attribute *attr,
692 const char *buf, size_t size)
693{
694 printk("[EM] Not Support Write Function\n");
695 return size;
696}
697
698static DEVICE_ATTR(AUXADC_Channel_11_Offset, 0664, show_AUXADC_Channel_11_Offset,
699 store_AUXADC_Channel_11_Offset);
700#endif
701
702
703#if ADC_CHANNEL_MAX>12
704static ssize_t show_AUXADC_Channel_12_Slope(struct device *dev, struct device_attribute *attr,
705 char *buf)
706{
707 int ret_value = 1;
708 ret_value = (*(auxadc_cali_slop + 12));
709 printk("[EM] AUXADC_Channel_12_Slope : %d\n", ret_value);
710 return sprintf(buf, "%u\n", ret_value);
711}
712
713static ssize_t store_AUXADC_Channel_12_Slope(struct device *dev, struct device_attribute *attr,
714 const char *buf, size_t size)
715{
716 printk("[EM] Not Support Write Function\n");
717 return size;
718}
719
720static DEVICE_ATTR(AUXADC_Channel_12_Slope, 0664, show_AUXADC_Channel_12_Slope,
721 store_AUXADC_Channel_12_Slope);
722static ssize_t show_AUXADC_Channel_12_Offset(struct device *dev, struct device_attribute *attr,
723 char *buf)
724{
725 int ret_value = 1;
726 ret_value = (*(auxadc_cali_offset + 12));
727 printk("[EM] AUXADC_Channel_12_Offset : %d\n", ret_value);
728 return sprintf(buf, "%u\n", ret_value);
729}
730
731static ssize_t store_AUXADC_Channel_12_Offset(struct device *dev, struct device_attribute *attr,
732 const char *buf, size_t size)
733{
734 printk("[EM] Not Support Write Function\n");
735 return size;
736}
737
738static DEVICE_ATTR(AUXADC_Channel_12_Offset, 0664, show_AUXADC_Channel_12_Offset,
739 store_AUXADC_Channel_12_Offset);
740#endif
741
742
743#if ADC_CHANNEL_MAX>13
744static ssize_t show_AUXADC_Channel_13_Slope(struct device *dev, struct device_attribute *attr,
745 char *buf)
746{
747 int ret_value = 1;
748 ret_value = (*(auxadc_cali_slop + 13));
749 printk("[EM] AUXADC_Channel_13_Slope : %d\n", ret_value);
750 return sprintf(buf, "%u\n", ret_value);
751}
752
753static ssize_t store_AUXADC_Channel_13_Slope(struct device *dev, struct device_attribute *attr,
754 const char *buf, size_t size)
755{
756 printk("[EM] Not Support Write Function\n");
757 return size;
758}
759
760static DEVICE_ATTR(AUXADC_Channel_13_Slope, 0664, show_AUXADC_Channel_13_Slope,
761 store_AUXADC_Channel_13_Slope);
762static ssize_t show_AUXADC_Channel_13_Offset(struct device *dev, struct device_attribute *attr,
763 char *buf)
764{
765 int ret_value = 1;
766 ret_value = (*(auxadc_cali_offset + 13));
767 printk("[EM] AUXADC_Channel_13_Offset : %d\n", ret_value);
768 return sprintf(buf, "%u\n", ret_value);
769}
770
771static ssize_t store_AUXADC_Channel_13_Offset(struct device *dev, struct device_attribute *attr,
772 const char *buf, size_t size)
773{
774 printk("[EM] Not Support Write Function\n");
775 return size;
776}
777
778static DEVICE_ATTR(AUXADC_Channel_13_Offset, 0664, show_AUXADC_Channel_13_Offset,
779 store_AUXADC_Channel_13_Offset);
780#endif
781
782
783#if ADC_CHANNEL_MAX>14
784static ssize_t show_AUXADC_Channel_14_Slope(struct device *dev, struct device_attribute *attr,
785 char *buf)
786{
787 int ret_value = 1;
788 ret_value = (*(auxadc_cali_slop + 14));
789 printk("[EM] AUXADC_Channel_14_Slope : %d\n", ret_value);
790 return sprintf(buf, "%u\n", ret_value);
791}
792
793static ssize_t store_AUXADC_Channel_14_Slope(struct device *dev, struct device_attribute *attr,
794 const char *buf, size_t size)
795{
796 printk("[EM] Not Support Write Function\n");
797 return size;
798}
799
800static DEVICE_ATTR(AUXADC_Channel_14_Slope, 0664, show_AUXADC_Channel_14_Slope,
801 store_AUXADC_Channel_14_Slope);
802static ssize_t show_AUXADC_Channel_14_Offset(struct device *dev, struct device_attribute *attr,
803 char *buf)
804{
805 int ret_value = 1;
806 ret_value = (*(auxadc_cali_offset + 14));
807 printk("[EM] AUXADC_Channel_14_Offset : %d\n", ret_value);
808 return sprintf(buf, "%u\n", ret_value);
809}
810
811static ssize_t store_AUXADC_Channel_14_Offset(struct device *dev, struct device_attribute *attr,
812 const char *buf, size_t size)
813{
814 printk("[EM] Not Support Write Function\n");
815 return size;
816}
817
818static DEVICE_ATTR(AUXADC_Channel_14_Offset, 0664, show_AUXADC_Channel_14_Offset,
819 store_AUXADC_Channel_14_Offset);
820#endif
821
822
823#if ADC_CHANNEL_MAX>15
824static ssize_t show_AUXADC_Channel_15_Slope(struct device *dev, struct device_attribute *attr,
825 char *buf)
826{
827 int ret_value = 1;
828 ret_value = (*(auxadc_cali_slop + 15));
829 printk("[EM] AUXADC_Channel_15_Slope : %d\n", ret_value);
830 return sprintf(buf, "%u\n", ret_value);
831}
832
833static ssize_t store_AUXADC_Channel_15_Slope(struct device *dev, struct device_attribute *attr,
834 const char *buf, size_t size)
835{
836 printk("[EM] Not Support Write Function\n");
837 return size;
838}
839
840static DEVICE_ATTR(AUXADC_Channel_15_Slope, 0664, show_AUXADC_Channel_15_Slope,
841 store_AUXADC_Channel_15_Slope);
842static ssize_t show_AUXADC_Channel_15_Offset(struct device *dev, struct device_attribute *attr,
843 char *buf)
844{
845 int ret_value = 1;
846 ret_value = (*(auxadc_cali_offset + 15));
847 printk("[EM] AUXADC_Channel_15_Offset : %d\n", ret_value);
848 return sprintf(buf, "%u\n", ret_value);
849}
850
851static ssize_t store_AUXADC_Channel_15_Offset(struct device *dev, struct device_attribute *attr,
852 const char *buf, size_t size)
853{
854 printk("[EM] Not Support Write Function\n");
855 return size;
856}
857
858static DEVICE_ATTR(AUXADC_Channel_15_Offset, 0664, show_AUXADC_Channel_15_Offset,
859 store_AUXADC_Channel_15_Offset);
860#endif
861
862/* ///////////////////////////////////////////////////////////////////////////////////////// */
863/* // Create File For EM : AUXADC_Channel_Is_Calibration */
864/* ///////////////////////////////////////////////////////////////////////////////////////// */
865static ssize_t show_AUXADC_Channel_Is_Calibration(struct device *dev, struct device_attribute *attr,
866 char *buf)
867{
868 int ret_value = 2;
869 ret_value = g_AUXADC_Cali;
870 printk("[EM] AUXADC_Channel_Is_Calibration : %d\n", ret_value);
871 return sprintf(buf, "%u\n", ret_value);
872}
873
874static ssize_t store_AUXADC_Channel_Is_Calibration(struct device *dev,
875 struct device_attribute *attr, const char *buf,
876 size_t size)
877{
878 printk("[EM] Not Support Write Function\n");
879 return size;
880}
881
882static DEVICE_ATTR(AUXADC_Channel_Is_Calibration, 0664, show_AUXADC_Channel_Is_Calibration,
883 store_AUXADC_Channel_Is_Calibration);
884
885static ssize_t show_AUXADC_register(struct device *dev,struct device_attribute *attr, char *buf)
886{
887 return mt_auxadc_dump_register(buf);
888}
889
890static ssize_t store_AUXADC_register(struct device *dev, struct device_attribute *attr,
891 const char *buf, size_t size)
892{
893 printk("[EM] Not Support store_AUXADC_register\n");
894 return size;
895}
896
897static DEVICE_ATTR(AUXADC_register, 0664, show_AUXADC_register, store_AUXADC_register);
898
899
900static ssize_t show_AUXADC_chanel(struct device *dev,struct device_attribute *attr, char *buf)
901{
902 /* read data */
903 int i = 0, data[4] = {0,0,0,0};
904 char buf_temp[960];
905 int res =0;
906 for (i = 0; i < 5; i++) {
907 res = IMM_auxadc_GetOneChannelValue(i,data,NULL);
908 if (res < 0) {
909 printk("[adc_driver]: get data error\n");
910 break;
911
912 } else {
913 printk("[adc_driver]: channel[%d]=%d.%d \n",i,data[0],data[1]);
914 sprintf(buf_temp,"channel[%d]=%d.%d \n",i,data[0],data[1]);
915 strcat(buf,buf_temp);
916 }
917
918 }
919 mt_auxadc_dump_register(buf_temp);
920 strcat(buf,buf_temp);
921
922 return strlen(buf);
923}
924
925static int dbug_thread(void *unused)
926{
927 int i = 0, data[4] = {0,0,0,0};
928 int res =0;
929 int rawdata=0;
930 int cali_voltage =0;
931
932 while (g_start_debug_thread) {
933 for (i = 0; i < ADC_CHANNEL_MAX; i++) {
934 res = IMM_auxadc_GetOneChannelValue(i,data,&rawdata);
935 if (res < 0) {
936 printk("[adc_driver]: get data error\n");
937 break;
938
939 } else {
940 printk("[adc_driver]: channel[%d]raw =%d\n",i,rawdata);
941 printk("[adc_driver]: channel[%d]=%d.%.02d\n", i, data[0],
942 data[1]);
943
944 }
945 res = IMM_auxadc_GetOneChannelValue_Cali(i,&cali_voltage );
946 if (res < 0) {
947 printk("[adc_driver]: get cali voltage error\n");
948 break;
949
950 } else {
951 printk("[adc_driver]: channel[%d] cali_voltage =%d\n", i,
952 cali_voltage);
953
954 }
955 msleep(500);
956
957 }
958 msleep(500);
959
960 }
961 return 0;
962}
963
964
965static ssize_t store_AUXADC_channel(struct device *dev, struct device_attribute *attr,
966 const char *buf, size_t size)
967{
968 unsigned int start_flag;
969 int error;
970
971 if (sscanf(buf, "%u", &start_flag) != 1) {
972 printk("[adc_driver]: Invalid values\n");
973 return -EINVAL;
974 }
975
976 printk("[adc_driver] start flag =%d \n",start_flag);
977 g_start_debug_thread = start_flag;
978 if (1 == start_flag) {
979 thread = kthread_run(dbug_thread, 0, "AUXADC");
980
981 if (IS_ERR(thread)) {
982 error = PTR_ERR(thread);
983 printk( "[adc_driver] failed to create kernel thread: %d\n", error);
984 }
985 }
986
987 return size;
988}
989
990static DEVICE_ATTR(AUXADC_read_channel, 0664, show_AUXADC_chanel, store_AUXADC_channel);
991
992static int mt_auxadc_create_device_attr(struct device *dev)
993{
994 int ret = 0;
995 /* For EM */
996 if ((ret = device_create_file(dev, &dev_attr_AUXADC_register)) != 0)
997 goto exit;
998 if ((ret = device_create_file(dev, &dev_attr_AUXADC_read_channel)) != 0)
999 goto exit;
1000#if ADC_CHANNEL_MAX>0
1001 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_0_Slope)) != 0)
1002 goto exit;
1003 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_0_Offset)) != 0)
1004 goto exit;
1005#endif
1006#if ADC_CHANNEL_MAX>1
1007 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_1_Slope)) != 0)
1008 goto exit;
1009 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_1_Offset)) != 0)
1010 goto exit;
1011#endif
1012#if ADC_CHANNEL_MAX>2
1013 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_2_Slope)) != 0)
1014 goto exit;
1015 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_2_Offset)) != 0)
1016 goto exit;
1017#endif
1018#if ADC_CHANNEL_MAX>3
1019 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_3_Slope)) != 0)
1020 goto exit;
1021 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_3_Offset)) != 0)
1022 goto exit;
1023#endif
1024#if ADC_CHANNEL_MAX>4
1025 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_4_Slope)) != 0)
1026 goto exit;
1027 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_4_Offset)) != 0)
1028 goto exit;
1029#endif
1030#if ADC_CHANNEL_MAX>5
1031 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_5_Slope)) != 0)
1032 goto exit;
1033 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_5_Offset)) != 0)
1034 goto exit;
1035#endif
1036#if ADC_CHANNEL_MAX>6
1037 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_6_Slope)) != 0)
1038 goto exit;
1039 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_6_Offset)) != 0)
1040 goto exit;
1041#endif
1042#if ADC_CHANNEL_MAX>7
1043 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_7_Slope)) != 0)
1044 goto exit;
1045 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_7_Offset)) != 0)
1046 goto exit;
1047#endif
1048#if ADC_CHANNEL_MAX>8
1049 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_8_Slope)) != 0)
1050 goto exit;
1051 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_8_Offset)) != 0)
1052 goto exit;
1053#endif
1054#if ADC_CHANNEL_MAX>9
1055 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_9_Slope)) != 0)
1056 goto exit;
1057 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_9_Offset)) != 0)
1058 goto exit;
1059#endif
1060#if ADC_CHANNEL_MAX>10
1061 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_10_Slope)) != 0)
1062 goto exit;
1063 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_10_Offset)) != 0)
1064 goto exit;
1065#endif
1066#if ADC_CHANNEL_MAX>11
1067 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_11_Slope)) != 0)
1068 goto exit;
1069 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_11_Offset)) != 0)
1070 goto exit;
1071#endif
1072#if ADC_CHANNEL_MAX>12
1073 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_12_Slope)) != 0)
1074 goto exit;
1075 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_12_Offset)) != 0)
1076 goto exit;
1077#endif
1078#if ADC_CHANNEL_MAX>13
1079 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_13_Slope)) != 0)
1080 goto exit;
1081 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_13_Offset)) != 0)
1082 goto exit;
1083#endif
1084#if ADC_CHANNEL_MAX>14
1085 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_14_Slope)) != 0)
1086 goto exit;
1087 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_14_Offset)) != 0)
1088 goto exit;
1089#endif
1090#if ADC_CHANNEL_MAX>15
1091 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_15_Slope)) != 0)
1092 goto exit;
1093 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_15_Offset)) != 0)
1094 goto exit;
1095#endif
1096 if ((ret = device_create_file(dev, &dev_attr_AUXADC_Channel_Is_Calibration)) != 0)
1097 goto exit;
1098
1099 return 0;
1100exit:
1101 return 1;
1102}
1103
1104
1105static int adc_channel_info_init(void)
1106{
1107 unsigned int used_channel_counter = 0;
1108 used_channel_counter = 0;
1109 #ifdef AUXADC_TEMPERATURE_CHANNEL
1110 /* ap_domain &= ~(1<<CUST_ADC_MD_CHANNEL); */
1111 sprintf(g_adc_info[used_channel_counter].channel_name, "ADC_RFTMP");
1112 g_adc_info[used_channel_counter].channel_number = AUXADC_TEMPERATURE_CHANNEL;
1113 printk("[ADC] channel_name = %s channel num=%d\n",
1114 g_adc_info[used_channel_counter].channel_name,
1115 g_adc_info[used_channel_counter].channel_number);
1116 used_channel_counter++;
1117 #endif
1118
1119 #ifdef AUXADC_TEMPERATURE1_CHANNEL
1120 sprintf(g_adc_info[used_channel_counter].channel_name, "ADC_APTMP");
1121 g_adc_info[used_channel_counter].channel_number = AUXADC_TEMPERATURE1_CHANNEL;
1122 printk("[ADC] channel_name = %s channel num=%d\n", g_adc_info[used_channel_counter].channel_name
1123 ,g_adc_info[used_channel_counter].channel_number);
1124 used_channel_counter++;
1125 #endif
1126
1127 #ifdef AUXADC_ADC_FDD_RF_PARAMS_DYNAMIC_CUSTOM_CH_CHANNEL
1128 sprintf(g_adc_info[used_channel_counter].channel_name, "ADC_FDD_Rf_Params_Dynamic_Custom");
1129 g_adc_info[used_channel_counter].channel_number =
1130 AUXADC_ADC_FDD_RF_PARAMS_DYNAMIC_CUSTOM_CH_CHANNEL;
1131 printk("[ADC] channel_name = %s channel num=%d\n",
1132 g_adc_info[used_channel_counter].channel_name,
1133 g_adc_info[used_channel_counter].channel_number);
1134 used_channel_counter++;
1135 #endif
1136
1137 #ifdef AUXADC_HF_MIC_CHANNEL
1138 sprintf(g_adc_info[used_channel_counter].channel_name, "ADC_MIC");
1139 g_adc_info[used_channel_counter].channel_number = AUXADC_HF_MIC_CHANNEL;
1140 printk("[ADC] channel_name = %s channel num=%d\n",
1141 g_adc_info[used_channel_counter].channel_name,
1142 g_adc_info[used_channel_counter].channel_number);
1143 used_channel_counter++;
1144 #endif
1145
1146 return 0;
1147
1148}
1149
1150/* platform_driver API */
1151static int mt_auxadc_probe(struct platform_device *dev)
1152{
1153 int ret = 0;
1154 struct device *adc_dev = NULL;
1155
1156 printk("******** MT AUXADC driver probe!! ********\n");
1157 adc_channel_info_init();
1158
1159 if (enable_clock(MT_PDN_PERI_AUXADC, "AUXADC"))
1160 printk("hwEnableClock AUXADC failed.");
1161
1162 /* Integrate with NVRAM */
1163 ret = alloc_chrdev_region(&auxadc_cali_devno, 0, 1, AUXADC_CALI_DEVNAME);
1164 if (ret)
1165 printk("Error: Can't Get Major number for auxadc_cali\n");
1166
1167 auxadc_cali_cdev = cdev_alloc();
1168 auxadc_cali_cdev->owner = THIS_MODULE;
1169 auxadc_cali_cdev->ops = &auxadc_cali_fops;
1170 ret = cdev_add(auxadc_cali_cdev, auxadc_cali_devno, 1);
1171 if(ret)
1172 printk("auxadc_cali Error: cdev_add\n");
1173
1174 auxadc_cali_major = MAJOR(auxadc_cali_devno);
1175 auxadc_cali_class = class_create(THIS_MODULE, AUXADC_CALI_DEVNAME);
1176 adc_dev = (struct device *)device_create(auxadc_cali_class,
1177 NULL, auxadc_cali_devno, NULL,
1178 AUXADC_CALI_DEVNAME);
1179 printk("[MT AUXADC_probe] NVRAM prepare : done !!\n");
1180
1181 if(mt_auxadc_create_device_attr(adc_dev))
1182 goto exit;
1183
1184 g_adc_init_flag =1;
1185 /* read calibration data from EFUSE */
1186 mt_auxadc_hal_init();
1187exit:
1188 return ret;
1189}
1190
1191static int mt_auxadc_remove(struct platform_device *dev)
1192{
1193 printk("******** MT auxadc driver remove!! ********\n" );
1194 return 0;
1195}
1196
1197static void mt_auxadc_shutdown(struct platform_device *dev)
1198{
1199 printk("******** MT auxadc driver shutdown!! ********\n" );
1200}
1201
1202static int mt_auxadc_suspend(struct platform_device *dev, pm_message_t state)
1203{
1204 /* printk("******** MT auxadc driver suspend!! ********\n" ); */
1205 /*
1206 if(disable_clock(MT_PDN_PERI_AUXADC,"AUXADC"))
1207 printk("hwEnableClock AUXADC failed.");
1208 */
1209 mt_auxadc_hal_suspend();
1210 return 0;
1211}
1212
1213static int mt_auxadc_resume(struct platform_device *dev)
1214{
1215 /* printk("******** MT auxadc driver resume!! ********\n" ); */
1216 /*
1217 if(enable_clock(MT_PDN_PERI_AUXADC,"AUXADC"))
1218 {
1219 printk("hwEnableClock AUXADC again!!!.");
1220 if(enable_clock(MT_PDN_PERI_AUXADC,"AUXADC"))
1221 {printk("hwEnableClock AUXADC failed.");}
1222
1223 }
1224 */
1225 mt_auxadc_hal_resume();
1226 return 0;
1227}
1228
1229#ifdef CONFIG_OF
1230static const struct of_device_id mt_auxadc_of_match[] = {
1231 { .compatible = "mediatek,AUXADC", },
1232 {},
1233};
1234#endif
1235
1236static struct platform_driver mt_auxadc_driver = {
1237 .probe = mt_auxadc_probe,
1238 .remove = mt_auxadc_remove,
1239 .shutdown = mt_auxadc_shutdown,
1240 #ifdef CONFIG_PM
1241 .suspend = mt_auxadc_suspend,
1242 .resume = mt_auxadc_resume,
1243 #endif
1244 .driver = {
1245 .name = "mt-auxadc",
1246 #ifdef CONFIG_OF
1247 .of_match_table = mt_auxadc_of_match,
1248 #endif
1249 },
1250};
1251
1252static int __init mt_auxadc_init(void)
1253{
1254 int ret;
1255
1256 ret = platform_driver_register(&mt_auxadc_driver);
1257 if (ret) {
1258 printk("****[mt_auxadc_driver] Unable to register driver (%d)\n", ret);
1259 return ret;
1260 }
1261 printk("****[mt_auxadc_driver] Initialization : DONE \n");
1262
1263#ifndef CONFIG_MTK_FPGA
1264 if(enable_clock(MT_PDN_PERI_AUXADC,"AUXADC"))
1265 printk("hwEnableClock AUXADC failed.");
1266#endif
1267 return 0;
1268}
1269
1270static void __exit mt_auxadc_exit (void)
1271{
1272}
1273
1274module_init(mt_auxadc_init);
1275module_exit(mt_auxadc_exit);
1276
1277MODULE_AUTHOR("MTK");
1278MODULE_DESCRIPTION("MTK AUXADC Device Driver");
1279MODULE_LICENSE("GPL");
1280
kernel source for telekom puls (alcatel/mediatek)