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mfd: Fix wm831x register range passing for recent ARM updates
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / mfd / wm831x-core.c
CommitLineData
d2bedfe7
MB		 1/*
2 * wm831x-core.c -- Device access for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
7e9f9fd4
MB		 17#include <linux/bcd.h>
18#include <linux/delay.h>
d2bedfe7 19#include <linux/mfd/core.h>
5a0e3ad6 20#include <linux/slab.h>
1df5981b 21#include <linux/err.h>
d2bedfe7
MB		 22
23#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/pdata.h>
7d4d0a3e 25#include <linux/mfd/wm831x/irq.h>
7e9f9fd4 26#include <linux/mfd/wm831x/auxadc.h>
6704e517 27#include <linux/mfd/wm831x/otp.h>
523d9cfb 28#include <linux/mfd/wm831x/pmu.h>
698659d5
MB		 29#include <linux/mfd/wm831x/regulator.h>
30
31/* Current settings - values are 2*2^(reg_val/4) microamps. These are
32 * exported since they are used by multiple drivers.
33 */
7716977b 34int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
698659d5
MB		 35 2,
36 2,
37 3,
38 3,
39 4,
40 5,
41 6,
42 7,
43 8,
44 10,
45 11,
46 13,
47 16,
48 19,
49 23,
50 27,
51 32,
52 38,
53 45,
54 54,
55 64,
56 76,
57 91,
58 108,
59 128,
60 152,
61 181,
62 215,
63 256,
64 304,
65 362,
66 431,
67 512,
68 609,
69 724,
70 861,
71 1024,
72 1218,
73 1448,
74 1722,
75 2048,
76 2435,
77 2896,
78 3444,
79 4096,
80 4871,
81 5793,
82 6889,
83 8192,
84 9742,
85 11585,
86 13777,
87 16384,
88 19484,
89 23170,
90 27554,
91};
92EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
d2bedfe7 93
d2bedfe7
MB		 94static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
95{
96 if (!wm831x->locked)
97 return 0;
98
99 switch (reg) {
100 case WM831X_WATCHDOG:
101 case WM831X_DC4_CONTROL:
102 case WM831X_ON_PIN_CONTROL:
103 case WM831X_BACKUP_CHARGER_CONTROL:
104 case WM831X_CHARGER_CONTROL_1:
105 case WM831X_CHARGER_CONTROL_2:
106 return 1;
107
108 default:
109 return 0;
110 }
111}
112
113/**
114 * wm831x_reg_unlock: Unlock user keyed registers
115 *
116 * The WM831x has a user key preventing writes to particularly
117 * critical registers. This function locks those registers,
118 * allowing writes to them.
119 */
120void wm831x_reg_lock(struct wm831x *wm831x)
121{
122 int ret;
123
124 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
125 if (ret == 0) {
126 dev_vdbg(wm831x->dev, "Registers locked\n");
127
128 mutex_lock(&wm831x->io_lock);
129 WARN_ON(wm831x->locked);
130 wm831x->locked = 1;
131 mutex_unlock(&wm831x->io_lock);
132 } else {
133 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
134 }
135
136}
137EXPORT_SYMBOL_GPL(wm831x_reg_lock);
138
139/**
140 * wm831x_reg_unlock: Unlock user keyed registers
141 *
142 * The WM831x has a user key preventing writes to particularly
143 * critical registers. This function locks those registers,
144 * preventing spurious writes.
145 */
146int wm831x_reg_unlock(struct wm831x *wm831x)
147{
148 int ret;
149
150 /* 0x9716 is the value required to unlock the registers */
151 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
152 if (ret == 0) {
153 dev_vdbg(wm831x->dev, "Registers unlocked\n");
154
155 mutex_lock(&wm831x->io_lock);
156 WARN_ON(!wm831x->locked);
157 wm831x->locked = 0;
158 mutex_unlock(&wm831x->io_lock);
159 }
160
161 return ret;
162}
163EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
164
2e47fff1
MB		 165static bool wm831x_reg_readable(struct device *dev, unsigned int reg)
166{
167 switch (reg) {
168 case WM831X_RESET_ID:
169 case WM831X_REVISION:
170 case WM831X_PARENT_ID:
171 case WM831X_SYSVDD_CONTROL:
172 case WM831X_THERMAL_MONITORING:
173 case WM831X_POWER_STATE:
174 case WM831X_WATCHDOG:
175 case WM831X_ON_PIN_CONTROL:
176 case WM831X_RESET_CONTROL:
177 case WM831X_CONTROL_INTERFACE:
178 case WM831X_SECURITY_KEY:
179 case WM831X_SOFTWARE_SCRATCH:
180 case WM831X_OTP_CONTROL:
181 case WM831X_GPIO_LEVEL:
182 case WM831X_SYSTEM_STATUS:
183 case WM831X_ON_SOURCE:
184 case WM831X_OFF_SOURCE:
185 case WM831X_SYSTEM_INTERRUPTS:
186 case WM831X_INTERRUPT_STATUS_1:
187 case WM831X_INTERRUPT_STATUS_2:
188 case WM831X_INTERRUPT_STATUS_3:
189 case WM831X_INTERRUPT_STATUS_4:
190 case WM831X_INTERRUPT_STATUS_5:
191 case WM831X_IRQ_CONFIG:
192 case WM831X_SYSTEM_INTERRUPTS_MASK:
193 case WM831X_INTERRUPT_STATUS_1_MASK:
194 case WM831X_INTERRUPT_STATUS_2_MASK:
195 case WM831X_INTERRUPT_STATUS_3_MASK:
196 case WM831X_INTERRUPT_STATUS_4_MASK:
197 case WM831X_INTERRUPT_STATUS_5_MASK:
198 case WM831X_RTC_WRITE_COUNTER:
199 case WM831X_RTC_TIME_1:
200 case WM831X_RTC_TIME_2:
201 case WM831X_RTC_ALARM_1:
202 case WM831X_RTC_ALARM_2:
203 case WM831X_RTC_CONTROL:
204 case WM831X_RTC_TRIM:
205 case WM831X_TOUCH_CONTROL_1:
206 case WM831X_TOUCH_CONTROL_2:
207 case WM831X_TOUCH_DATA_X:
208 case WM831X_TOUCH_DATA_Y:
209 case WM831X_TOUCH_DATA_Z:
210 case WM831X_AUXADC_DATA:
211 case WM831X_AUXADC_CONTROL:
212 case WM831X_AUXADC_SOURCE:
213 case WM831X_COMPARATOR_CONTROL:
214 case WM831X_COMPARATOR_1:
215 case WM831X_COMPARATOR_2:
216 case WM831X_COMPARATOR_3:
217 case WM831X_COMPARATOR_4:
218 case WM831X_GPIO1_CONTROL:
219 case WM831X_GPIO2_CONTROL:
220 case WM831X_GPIO3_CONTROL:
221 case WM831X_GPIO4_CONTROL:
222 case WM831X_GPIO5_CONTROL:
223 case WM831X_GPIO6_CONTROL:
224 case WM831X_GPIO7_CONTROL:
225 case WM831X_GPIO8_CONTROL:
226 case WM831X_GPIO9_CONTROL:
227 case WM831X_GPIO10_CONTROL:
228 case WM831X_GPIO11_CONTROL:
229 case WM831X_GPIO12_CONTROL:
230 case WM831X_GPIO13_CONTROL:
231 case WM831X_GPIO14_CONTROL:
232 case WM831X_GPIO15_CONTROL:
233 case WM831X_GPIO16_CONTROL:
234 case WM831X_CHARGER_CONTROL_1:
235 case WM831X_CHARGER_CONTROL_2:
236 case WM831X_CHARGER_STATUS:
237 case WM831X_BACKUP_CHARGER_CONTROL:
238 case WM831X_STATUS_LED_1:
239 case WM831X_STATUS_LED_2:
240 case WM831X_CURRENT_SINK_1:
241 case WM831X_CURRENT_SINK_2:
242 case WM831X_DCDC_ENABLE:
243 case WM831X_LDO_ENABLE:
244 case WM831X_DCDC_STATUS:
245 case WM831X_LDO_STATUS:
246 case WM831X_DCDC_UV_STATUS:
247 case WM831X_LDO_UV_STATUS:
248 case WM831X_DC1_CONTROL_1:
249 case WM831X_DC1_CONTROL_2:
250 case WM831X_DC1_ON_CONFIG:
251 case WM831X_DC1_SLEEP_CONTROL:
252 case WM831X_DC1_DVS_CONTROL:
253 case WM831X_DC2_CONTROL_1:
254 case WM831X_DC2_CONTROL_2:
255 case WM831X_DC2_ON_CONFIG:
256 case WM831X_DC2_SLEEP_CONTROL:
257 case WM831X_DC2_DVS_CONTROL:
258 case WM831X_DC3_CONTROL_1:
259 case WM831X_DC3_CONTROL_2:
260 case WM831X_DC3_ON_CONFIG:
261 case WM831X_DC3_SLEEP_CONTROL:
262 case WM831X_DC4_CONTROL:
263 case WM831X_DC4_SLEEP_CONTROL:
264 case WM831X_EPE1_CONTROL:
265 case WM831X_EPE2_CONTROL:
266 case WM831X_LDO1_CONTROL:
267 case WM831X_LDO1_ON_CONTROL:
268 case WM831X_LDO1_SLEEP_CONTROL:
269 case WM831X_LDO2_CONTROL:
270 case WM831X_LDO2_ON_CONTROL:
271 case WM831X_LDO2_SLEEP_CONTROL:
272 case WM831X_LDO3_CONTROL:
273 case WM831X_LDO3_ON_CONTROL:
274 case WM831X_LDO3_SLEEP_CONTROL:
275 case WM831X_LDO4_CONTROL:
276 case WM831X_LDO4_ON_CONTROL:
277 case WM831X_LDO4_SLEEP_CONTROL:
278 case WM831X_LDO5_CONTROL:
279 case WM831X_LDO5_ON_CONTROL:
280 case WM831X_LDO5_SLEEP_CONTROL:
281 case WM831X_LDO6_CONTROL:
282 case WM831X_LDO6_ON_CONTROL:
283 case WM831X_LDO6_SLEEP_CONTROL:
284 case WM831X_LDO7_CONTROL:
285 case WM831X_LDO7_ON_CONTROL:
286 case WM831X_LDO7_SLEEP_CONTROL:
287 case WM831X_LDO8_CONTROL:
288 case WM831X_LDO8_ON_CONTROL:
289 case WM831X_LDO8_SLEEP_CONTROL:
290 case WM831X_LDO9_CONTROL:
291 case WM831X_LDO9_ON_CONTROL:
292 case WM831X_LDO9_SLEEP_CONTROL:
293 case WM831X_LDO10_CONTROL:
294 case WM831X_LDO10_ON_CONTROL:
295 case WM831X_LDO10_SLEEP_CONTROL:
296 case WM831X_LDO11_ON_CONTROL:
297 case WM831X_LDO11_SLEEP_CONTROL:
298 case WM831X_POWER_GOOD_SOURCE_1:
299 case WM831X_POWER_GOOD_SOURCE_2:
300 case WM831X_CLOCK_CONTROL_1:
301 case WM831X_CLOCK_CONTROL_2:
302 case WM831X_FLL_CONTROL_1:
303 case WM831X_FLL_CONTROL_2:
304 case WM831X_FLL_CONTROL_3:
305 case WM831X_FLL_CONTROL_4:
306 case WM831X_FLL_CONTROL_5:
307 case WM831X_UNIQUE_ID_1:
308 case WM831X_UNIQUE_ID_2:
309 case WM831X_UNIQUE_ID_3:
310 case WM831X_UNIQUE_ID_4:
311 case WM831X_UNIQUE_ID_5:
312 case WM831X_UNIQUE_ID_6:
313 case WM831X_UNIQUE_ID_7:
314 case WM831X_UNIQUE_ID_8:
315 case WM831X_FACTORY_OTP_ID:
316 case WM831X_FACTORY_OTP_1:
317 case WM831X_FACTORY_OTP_2:
318 case WM831X_FACTORY_OTP_3:
319 case WM831X_FACTORY_OTP_4:
320 case WM831X_FACTORY_OTP_5:
321 case WM831X_CUSTOMER_OTP_ID:
322 case WM831X_DC1_OTP_CONTROL:
323 case WM831X_DC2_OTP_CONTROL:
324 case WM831X_DC3_OTP_CONTROL:
325 case WM831X_LDO1_2_OTP_CONTROL:
326 case WM831X_LDO3_4_OTP_CONTROL:
327 case WM831X_LDO5_6_OTP_CONTROL:
328 case WM831X_LDO7_8_OTP_CONTROL:
329 case WM831X_LDO9_10_OTP_CONTROL:
330 case WM831X_LDO11_EPE_CONTROL:
331 case WM831X_GPIO1_OTP_CONTROL:
332 case WM831X_GPIO2_OTP_CONTROL:
333 case WM831X_GPIO3_OTP_CONTROL:
334 case WM831X_GPIO4_OTP_CONTROL:
335 case WM831X_GPIO5_OTP_CONTROL:
336 case WM831X_GPIO6_OTP_CONTROL:
337 case WM831X_DBE_CHECK_DATA:
338 return true;
339 default:
340 return false;
341 }
342}
343
344static bool wm831x_reg_writeable(struct device *dev, unsigned int reg)
345{
346 struct wm831x *wm831x = dev_get_drvdata(dev);
347
348 if (wm831x_reg_locked(wm831x, reg))
349 return false;
350
351 switch (reg) {
352 case WM831X_SYSVDD_CONTROL:
353 case WM831X_THERMAL_MONITORING:
354 case WM831X_POWER_STATE:
355 case WM831X_WATCHDOG:
356 case WM831X_ON_PIN_CONTROL:
357 case WM831X_RESET_CONTROL:
358 case WM831X_CONTROL_INTERFACE:
359 case WM831X_SECURITY_KEY:
360 case WM831X_SOFTWARE_SCRATCH:
361 case WM831X_OTP_CONTROL:
362 case WM831X_GPIO_LEVEL:
363 case WM831X_INTERRUPT_STATUS_1:
364 case WM831X_INTERRUPT_STATUS_2:
365 case WM831X_INTERRUPT_STATUS_3:
366 case WM831X_INTERRUPT_STATUS_4:
367 case WM831X_INTERRUPT_STATUS_5:
368 case WM831X_IRQ_CONFIG:
369 case WM831X_SYSTEM_INTERRUPTS_MASK:
370 case WM831X_INTERRUPT_STATUS_1_MASK:
371 case WM831X_INTERRUPT_STATUS_2_MASK:
372 case WM831X_INTERRUPT_STATUS_3_MASK:
373 case WM831X_INTERRUPT_STATUS_4_MASK:
374 case WM831X_INTERRUPT_STATUS_5_MASK:
375 case WM831X_RTC_TIME_1:
376 case WM831X_RTC_TIME_2:
377 case WM831X_RTC_ALARM_1:
378 case WM831X_RTC_ALARM_2:
379 case WM831X_RTC_CONTROL:
380 case WM831X_RTC_TRIM:
381 case WM831X_TOUCH_CONTROL_1:
382 case WM831X_TOUCH_CONTROL_2:
383 case WM831X_AUXADC_CONTROL:
384 case WM831X_AUXADC_SOURCE:
385 case WM831X_COMPARATOR_CONTROL:
386 case WM831X_COMPARATOR_1:
387 case WM831X_COMPARATOR_2:
388 case WM831X_COMPARATOR_3:
389 case WM831X_COMPARATOR_4:
390 case WM831X_GPIO1_CONTROL:
391 case WM831X_GPIO2_CONTROL:
392 case WM831X_GPIO3_CONTROL:
393 case WM831X_GPIO4_CONTROL:
394 case WM831X_GPIO5_CONTROL:
395 case WM831X_GPIO6_CONTROL:
396 case WM831X_GPIO7_CONTROL:
397 case WM831X_GPIO8_CONTROL:
398 case WM831X_GPIO9_CONTROL:
399 case WM831X_GPIO10_CONTROL:
400 case WM831X_GPIO11_CONTROL:
401 case WM831X_GPIO12_CONTROL:
402 case WM831X_GPIO13_CONTROL:
403 case WM831X_GPIO14_CONTROL:
404 case WM831X_GPIO15_CONTROL:
405 case WM831X_GPIO16_CONTROL:
406 case WM831X_CHARGER_CONTROL_1:
407 case WM831X_CHARGER_CONTROL_2:
408 case WM831X_CHARGER_STATUS:
409 case WM831X_BACKUP_CHARGER_CONTROL:
410 case WM831X_STATUS_LED_1:
411 case WM831X_STATUS_LED_2:
412 case WM831X_CURRENT_SINK_1:
413 case WM831X_CURRENT_SINK_2:
414 case WM831X_DCDC_ENABLE:
415 case WM831X_LDO_ENABLE:
416 case WM831X_DC1_CONTROL_1:
417 case WM831X_DC1_CONTROL_2:
418 case WM831X_DC1_ON_CONFIG:
419 case WM831X_DC1_SLEEP_CONTROL:
420 case WM831X_DC1_DVS_CONTROL:
421 case WM831X_DC2_CONTROL_1:
422 case WM831X_DC2_CONTROL_2:
423 case WM831X_DC2_ON_CONFIG:
424 case WM831X_DC2_SLEEP_CONTROL:
425 case WM831X_DC2_DVS_CONTROL:
426 case WM831X_DC3_CONTROL_1:
427 case WM831X_DC3_CONTROL_2:
428 case WM831X_DC3_ON_CONFIG:
429 case WM831X_DC3_SLEEP_CONTROL:
430 case WM831X_DC4_CONTROL:
431 case WM831X_DC4_SLEEP_CONTROL:
432 case WM831X_EPE1_CONTROL:
433 case WM831X_EPE2_CONTROL:
434 case WM831X_LDO1_CONTROL:
435 case WM831X_LDO1_ON_CONTROL:
436 case WM831X_LDO1_SLEEP_CONTROL:
437 case WM831X_LDO2_CONTROL:
438 case WM831X_LDO2_ON_CONTROL:
439 case WM831X_LDO2_SLEEP_CONTROL:
440 case WM831X_LDO3_CONTROL:
441 case WM831X_LDO3_ON_CONTROL:
442 case WM831X_LDO3_SLEEP_CONTROL:
443 case WM831X_LDO4_CONTROL:
444 case WM831X_LDO4_ON_CONTROL:
445 case WM831X_LDO4_SLEEP_CONTROL:
446 case WM831X_LDO5_CONTROL:
447 case WM831X_LDO5_ON_CONTROL:
448 case WM831X_LDO5_SLEEP_CONTROL:
449 case WM831X_LDO6_CONTROL:
450 case WM831X_LDO6_ON_CONTROL:
451 case WM831X_LDO6_SLEEP_CONTROL:
452 case WM831X_LDO7_CONTROL:
453 case WM831X_LDO7_ON_CONTROL:
454 case WM831X_LDO7_SLEEP_CONTROL:
455 case WM831X_LDO8_CONTROL:
456 case WM831X_LDO8_ON_CONTROL:
457 case WM831X_LDO8_SLEEP_CONTROL:
458 case WM831X_LDO9_CONTROL:
459 case WM831X_LDO9_ON_CONTROL:
460 case WM831X_LDO9_SLEEP_CONTROL:
461 case WM831X_LDO10_CONTROL:
462 case WM831X_LDO10_ON_CONTROL:
463 case WM831X_LDO10_SLEEP_CONTROL:
464 case WM831X_LDO11_ON_CONTROL:
465 case WM831X_LDO11_SLEEP_CONTROL:
466 case WM831X_POWER_GOOD_SOURCE_1:
467 case WM831X_POWER_GOOD_SOURCE_2:
468 case WM831X_CLOCK_CONTROL_1:
469 case WM831X_CLOCK_CONTROL_2:
470 case WM831X_FLL_CONTROL_1:
471 case WM831X_FLL_CONTROL_2:
472 case WM831X_FLL_CONTROL_3:
473 case WM831X_FLL_CONTROL_4:
474 case WM831X_FLL_CONTROL_5:
475 return true;
476 default:
477 return false;
478 }
479}
480
481static bool wm831x_reg_volatile(struct device *dev, unsigned int reg)
482{
483 switch (reg) {
484 case WM831X_SYSTEM_STATUS:
485 case WM831X_ON_SOURCE:
486 case WM831X_OFF_SOURCE:
487 case WM831X_GPIO_LEVEL:
488 case WM831X_SYSTEM_INTERRUPTS:
489 case WM831X_INTERRUPT_STATUS_1:
490 case WM831X_INTERRUPT_STATUS_2:
491 case WM831X_INTERRUPT_STATUS_3:
492 case WM831X_INTERRUPT_STATUS_4:
493 case WM831X_INTERRUPT_STATUS_5:
494 case WM831X_RTC_TIME_1:
495 case WM831X_RTC_TIME_2:
496 case WM831X_TOUCH_DATA_X:
497 case WM831X_TOUCH_DATA_Y:
498 case WM831X_TOUCH_DATA_Z:
499 case WM831X_AUXADC_DATA:
500 case WM831X_CHARGER_STATUS:
501 case WM831X_DCDC_STATUS:
502 case WM831X_LDO_STATUS:
503 case WM831X_DCDC_UV_STATUS:
504 case WM831X_LDO_UV_STATUS:
505 return true;
506 default:
507 return false;
508 }
509}
510
d2bedfe7
MB		 511/**
512 * wm831x_reg_read: Read a single WM831x register.
513 *
514 * @wm831x: Device to read from.
515 * @reg: Register to read.
516 */
517int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
518{
1df5981b 519 unsigned int val;
d2bedfe7
MB		 520 int ret;
521
1df5981b 522 ret = regmap_read(wm831x->regmap, reg, &val);
d2bedfe7
MB		 523
524 if (ret < 0)
525 return ret;
526 else
527 return val;
528}
529EXPORT_SYMBOL_GPL(wm831x_reg_read);
530
531/**
532 * wm831x_bulk_read: Read multiple WM831x registers
533 *
534 * @wm831x: Device to read from
535 * @reg: First register
536 * @count: Number of registers
537 * @buf: Buffer to fill.
538 */
539int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
540 int count, u16 *buf)
541{
1df5981b 542 return regmap_bulk_read(wm831x->regmap, reg, buf, count);
d2bedfe7
MB		 543}
544EXPORT_SYMBOL_GPL(wm831x_bulk_read);
545
546static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
547 int bytes, void *src)
548{
549 u16 *buf = src;
1df5981b 550 int i, ret;
d2bedfe7
MB		 551
552 BUG_ON(bytes % 2);
553 BUG_ON(bytes <= 0);
554
555 for (i = 0; i < bytes / 2; i++) {
556 if (wm831x_reg_locked(wm831x, reg))
557 return -EPERM;
558
559 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
560 buf[i], reg + i, reg + i);
1df5981b 561 ret = regmap_write(wm831x->regmap, reg + i, buf[i]);
5391b5c6
MB		 562 if (ret != 0)
563 return ret;
d2bedfe7
MB		 564 }
565
1df5981b 566 return 0;
d2bedfe7
MB		 567}
568
569/**
570 * wm831x_reg_write: Write a single WM831x register.
571 *
572 * @wm831x: Device to write to.
573 * @reg: Register to write to.
574 * @val: Value to write.
575 */
576int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
577 unsigned short val)
578{
579 int ret;
580
581 mutex_lock(&wm831x->io_lock);
582
583 ret = wm831x_write(wm831x, reg, 2, &val);
584
585 mutex_unlock(&wm831x->io_lock);
586
587 return ret;
588}
589EXPORT_SYMBOL_GPL(wm831x_reg_write);
590
591/**
592 * wm831x_set_bits: Set the value of a bitfield in a WM831x register
593 *
594 * @wm831x: Device to write to.
595 * @reg: Register to write to.
596 * @mask: Mask of bits to set.
597 * @val: Value to set (unshifted)
598 */
599int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
600 unsigned short mask, unsigned short val)
601{
602 int ret;
d2bedfe7
MB		 603
604 mutex_lock(&wm831x->io_lock);
605
1df5981b
MB		 606 if (!wm831x_reg_locked(wm831x, reg))
607 ret = regmap_update_bits(wm831x->regmap, reg, mask, val);
608 else
609 ret = -EPERM;
d2bedfe7 610
d2bedfe7
MB		 611 mutex_unlock(&wm831x->io_lock);
612
613 return ret;
614}
615EXPORT_SYMBOL_GPL(wm831x_set_bits);
616
ce7e4e11
MB		 617static struct resource wm831x_io_parent = {
618 .start = 0,
619 .end = 0xffffffff,
620 .flags = IORESOURCE_IO,
621};
622
d2bedfe7
MB		 623static struct resource wm831x_dcdc1_resources[] = {
624 {
ce7e4e11 625 .parent = &wm831x_io_parent,
d2bedfe7
MB		 626 .start = WM831X_DC1_CONTROL_1,
627 .end = WM831X_DC1_DVS_CONTROL,
628 .flags = IORESOURCE_IO,
629 },
630 {
631 .name = "UV",
632 .start = WM831X_IRQ_UV_DC1,
633 .end = WM831X_IRQ_UV_DC1,
634 .flags = IORESOURCE_IRQ,
635 },
636 {
637 .name = "HC",
638 .start = WM831X_IRQ_HC_DC1,
639 .end = WM831X_IRQ_HC_DC1,
640 .flags = IORESOURCE_IRQ,
641 },
642};
643
644
645static struct resource wm831x_dcdc2_resources[] = {
646 {
ce7e4e11 647 .parent = &wm831x_io_parent,
d2bedfe7
MB		 648 .start = WM831X_DC2_CONTROL_1,
649 .end = WM831X_DC2_DVS_CONTROL,
650 .flags = IORESOURCE_IO,
651 },
652 {
653 .name = "UV",
654 .start = WM831X_IRQ_UV_DC2,
655 .end = WM831X_IRQ_UV_DC2,
656 .flags = IORESOURCE_IRQ,
657 },
658 {
659 .name = "HC",
660 .start = WM831X_IRQ_HC_DC2,
661 .end = WM831X_IRQ_HC_DC2,
662 .flags = IORESOURCE_IRQ,
663 },
664};
665
666static struct resource wm831x_dcdc3_resources[] = {
667 {
ce7e4e11 668 .parent = &wm831x_io_parent,
d2bedfe7
MB		 669 .start = WM831X_DC3_CONTROL_1,
670 .end = WM831X_DC3_SLEEP_CONTROL,
671 .flags = IORESOURCE_IO,
672 },
673 {
674 .name = "UV",
675 .start = WM831X_IRQ_UV_DC3,
676 .end = WM831X_IRQ_UV_DC3,
677 .flags = IORESOURCE_IRQ,
678 },
679};
680
681static struct resource wm831x_dcdc4_resources[] = {
682 {
ce7e4e11 683 .parent = &wm831x_io_parent,
d2bedfe7
MB		 684 .start = WM831X_DC4_CONTROL,
685 .end = WM831X_DC4_SLEEP_CONTROL,
686 .flags = IORESOURCE_IO,
687 },
688 {
689 .name = "UV",
690 .start = WM831X_IRQ_UV_DC4,
691 .end = WM831X_IRQ_UV_DC4,
692 .flags = IORESOURCE_IRQ,
693 },
694};
695
d4e0a89e
MB		 696static struct resource wm8320_dcdc4_buck_resources[] = {
697 {
ce7e4e11 698 .parent = &wm831x_io_parent,
d4e0a89e
MB		 699 .start = WM831X_DC4_CONTROL,
700 .end = WM832X_DC4_SLEEP_CONTROL,
701 .flags = IORESOURCE_IO,
702 },
703 {
704 .name = "UV",
705 .start = WM831X_IRQ_UV_DC4,
706 .end = WM831X_IRQ_UV_DC4,
707 .flags = IORESOURCE_IRQ,
708 },
709};
710
d2bedfe7
MB		 711static struct resource wm831x_gpio_resources[] = {
712 {
713 .start = WM831X_IRQ_GPIO_1,
714 .end = WM831X_IRQ_GPIO_16,
715 .flags = IORESOURCE_IRQ,
716 },
717};
718
719static struct resource wm831x_isink1_resources[] = {
720 {
ce7e4e11 721 .parent = &wm831x_io_parent,
d2bedfe7
MB		 722 .start = WM831X_CURRENT_SINK_1,
723 .end = WM831X_CURRENT_SINK_1,
724 .flags = IORESOURCE_IO,
725 },
726 {
727 .start = WM831X_IRQ_CS1,
728 .end = WM831X_IRQ_CS1,
729 .flags = IORESOURCE_IRQ,
730 },
731};
732
733static struct resource wm831x_isink2_resources[] = {
734 {
ce7e4e11 735 .parent = &wm831x_io_parent,
d2bedfe7
MB		 736 .start = WM831X_CURRENT_SINK_2,
737 .end = WM831X_CURRENT_SINK_2,
738 .flags = IORESOURCE_IO,
739 },
740 {
741 .start = WM831X_IRQ_CS2,
742 .end = WM831X_IRQ_CS2,
743 .flags = IORESOURCE_IRQ,
744 },
745};
746
747static struct resource wm831x_ldo1_resources[] = {
748 {
ce7e4e11 749 .parent = &wm831x_io_parent,
d2bedfe7
MB		 750 .start = WM831X_LDO1_CONTROL,
751 .end = WM831X_LDO1_SLEEP_CONTROL,
752 .flags = IORESOURCE_IO,
753 },
754 {
755 .name = "UV",
756 .start = WM831X_IRQ_UV_LDO1,
757 .end = WM831X_IRQ_UV_LDO1,
758 .flags = IORESOURCE_IRQ,
759 },
760};
761
762static struct resource wm831x_ldo2_resources[] = {
763 {
ce7e4e11 764 .parent = &wm831x_io_parent,
d2bedfe7
MB		 765 .start = WM831X_LDO2_CONTROL,
766 .end = WM831X_LDO2_SLEEP_CONTROL,
767 .flags = IORESOURCE_IO,
768 },
769 {
770 .name = "UV",
771 .start = WM831X_IRQ_UV_LDO2,
772 .end = WM831X_IRQ_UV_LDO2,
773 .flags = IORESOURCE_IRQ,
774 },
775};
776
777static struct resource wm831x_ldo3_resources[] = {
778 {
ce7e4e11 779 .parent = &wm831x_io_parent,
d2bedfe7
MB		 780 .start = WM831X_LDO3_CONTROL,
781 .end = WM831X_LDO3_SLEEP_CONTROL,
782 .flags = IORESOURCE_IO,
783 },
784 {
785 .name = "UV",
786 .start = WM831X_IRQ_UV_LDO3,
787 .end = WM831X_IRQ_UV_LDO3,
788 .flags = IORESOURCE_IRQ,
789 },
790};
791
792static struct resource wm831x_ldo4_resources[] = {
793 {
ce7e4e11 794 .parent = &wm831x_io_parent,
d2bedfe7
MB		 795 .start = WM831X_LDO4_CONTROL,
796 .end = WM831X_LDO4_SLEEP_CONTROL,
797 .flags = IORESOURCE_IO,
798 },
799 {
800 .name = "UV",
801 .start = WM831X_IRQ_UV_LDO4,
802 .end = WM831X_IRQ_UV_LDO4,
803 .flags = IORESOURCE_IRQ,
804 },
805};
806
807static struct resource wm831x_ldo5_resources[] = {
808 {
ce7e4e11 809 .parent = &wm831x_io_parent,
d2bedfe7
MB		 810 .start = WM831X_LDO5_CONTROL,
811 .end = WM831X_LDO5_SLEEP_CONTROL,
812 .flags = IORESOURCE_IO,
813 },
814 {
815 .name = "UV",
816 .start = WM831X_IRQ_UV_LDO5,
817 .end = WM831X_IRQ_UV_LDO5,
818 .flags = IORESOURCE_IRQ,
819 },
820};
821
822static struct resource wm831x_ldo6_resources[] = {
823 {
ce7e4e11 824 .parent = &wm831x_io_parent,
d2bedfe7
MB		 825 .start = WM831X_LDO6_CONTROL,
826 .end = WM831X_LDO6_SLEEP_CONTROL,
827 .flags = IORESOURCE_IO,
828 },
829 {
830 .name = "UV",
831 .start = WM831X_IRQ_UV_LDO6,
832 .end = WM831X_IRQ_UV_LDO6,
833 .flags = IORESOURCE_IRQ,
834 },
835};
836
837static struct resource wm831x_ldo7_resources[] = {
838 {
ce7e4e11 839 .parent = &wm831x_io_parent,
d2bedfe7
MB		 840 .start = WM831X_LDO7_CONTROL,
841 .end = WM831X_LDO7_SLEEP_CONTROL,
842 .flags = IORESOURCE_IO,
843 },
844 {
845 .name = "UV",
846 .start = WM831X_IRQ_UV_LDO7,
847 .end = WM831X_IRQ_UV_LDO7,
848 .flags = IORESOURCE_IRQ,
849 },
850};
851
852static struct resource wm831x_ldo8_resources[] = {
853 {
ce7e4e11 854 .parent = &wm831x_io_parent,
d2bedfe7
MB		 855 .start = WM831X_LDO8_CONTROL,
856 .end = WM831X_LDO8_SLEEP_CONTROL,
857 .flags = IORESOURCE_IO,
858 },
859 {
860 .name = "UV",
861 .start = WM831X_IRQ_UV_LDO8,
862 .end = WM831X_IRQ_UV_LDO8,
863 .flags = IORESOURCE_IRQ,
864 },
865};
866
867static struct resource wm831x_ldo9_resources[] = {
868 {
ce7e4e11 869 .parent = &wm831x_io_parent,
d2bedfe7
MB		 870 .start = WM831X_LDO9_CONTROL,
871 .end = WM831X_LDO9_SLEEP_CONTROL,
872 .flags = IORESOURCE_IO,
873 },
874 {
875 .name = "UV",
876 .start = WM831X_IRQ_UV_LDO9,
877 .end = WM831X_IRQ_UV_LDO9,
878 .flags = IORESOURCE_IRQ,
879 },
880};
881
882static struct resource wm831x_ldo10_resources[] = {
883 {
ce7e4e11 884 .parent = &wm831x_io_parent,
d2bedfe7
MB		 885 .start = WM831X_LDO10_CONTROL,
886 .end = WM831X_LDO10_SLEEP_CONTROL,
887 .flags = IORESOURCE_IO,
888 },
889 {
890 .name = "UV",
891 .start = WM831X_IRQ_UV_LDO10,
892 .end = WM831X_IRQ_UV_LDO10,
893 .flags = IORESOURCE_IRQ,
894 },
895};
896
897static struct resource wm831x_ldo11_resources[] = {
898 {
ce7e4e11 899 .parent = &wm831x_io_parent,
d2bedfe7
MB		 900 .start = WM831X_LDO11_ON_CONTROL,
901 .end = WM831X_LDO11_SLEEP_CONTROL,
902 .flags = IORESOURCE_IO,
903 },
904};
905
906static struct resource wm831x_on_resources[] = {
907 {
908 .start = WM831X_IRQ_ON,
909 .end = WM831X_IRQ_ON,
910 .flags = IORESOURCE_IRQ,
911 },
912};
913
914
915static struct resource wm831x_power_resources[] = {
916 {
917 .name = "SYSLO",
918 .start = WM831X_IRQ_PPM_SYSLO,
919 .end = WM831X_IRQ_PPM_SYSLO,
920 .flags = IORESOURCE_IRQ,
921 },
922 {
923 .name = "PWR SRC",
924 .start = WM831X_IRQ_PPM_PWR_SRC,
925 .end = WM831X_IRQ_PPM_PWR_SRC,
926 .flags = IORESOURCE_IRQ,
927 },
928 {
929 .name = "USB CURR",
930 .start = WM831X_IRQ_PPM_USB_CURR,
931 .end = WM831X_IRQ_PPM_USB_CURR,
932 .flags = IORESOURCE_IRQ,
933 },
934 {
935 .name = "BATT HOT",
936 .start = WM831X_IRQ_CHG_BATT_HOT,
937 .end = WM831X_IRQ_CHG_BATT_HOT,
938 .flags = IORESOURCE_IRQ,
939 },
940 {
941 .name = "BATT COLD",
942 .start = WM831X_IRQ_CHG_BATT_COLD,
943 .end = WM831X_IRQ_CHG_BATT_COLD,
944 .flags = IORESOURCE_IRQ,
945 },
946 {
947 .name = "BATT FAIL",
948 .start = WM831X_IRQ_CHG_BATT_FAIL,
949 .end = WM831X_IRQ_CHG_BATT_FAIL,
950 .flags = IORESOURCE_IRQ,
951 },
952 {
953 .name = "OV",
954 .start = WM831X_IRQ_CHG_OV,
955 .end = WM831X_IRQ_CHG_OV,
956 .flags = IORESOURCE_IRQ,
957 },
958 {
959 .name = "END",
960 .start = WM831X_IRQ_CHG_END,
961 .end = WM831X_IRQ_CHG_END,
962 .flags = IORESOURCE_IRQ,
963 },
964 {
965 .name = "TO",
966 .start = WM831X_IRQ_CHG_TO,
967 .end = WM831X_IRQ_CHG_TO,
968 .flags = IORESOURCE_IRQ,
969 },
970 {
971 .name = "MODE",
972 .start = WM831X_IRQ_CHG_MODE,
973 .end = WM831X_IRQ_CHG_MODE,
974 .flags = IORESOURCE_IRQ,
975 },
976 {
977 .name = "START",
978 .start = WM831X_IRQ_CHG_START,
979 .end = WM831X_IRQ_CHG_START,
980 .flags = IORESOURCE_IRQ,
981 },
982};
983
984static struct resource wm831x_rtc_resources[] = {
985 {
986 .name = "PER",
987 .start = WM831X_IRQ_RTC_PER,
988 .end = WM831X_IRQ_RTC_PER,
989 .flags = IORESOURCE_IRQ,
990 },
991 {
992 .name = "ALM",
993 .start = WM831X_IRQ_RTC_ALM,
994 .end = WM831X_IRQ_RTC_ALM,
995 .flags = IORESOURCE_IRQ,
996 },
997};
998
999static struct resource wm831x_status1_resources[] = {
1000 {
ce7e4e11 1001 .parent = &wm831x_io_parent,
d2bedfe7
MB		 1002 .start = WM831X_STATUS_LED_1,
1003 .end = WM831X_STATUS_LED_1,
1004 .flags = IORESOURCE_IO,
1005 },
1006};
1007
1008static struct resource wm831x_status2_resources[] = {
1009 {
ce7e4e11 1010 .parent = &wm831x_io_parent,
d2bedfe7
MB		 1011 .start = WM831X_STATUS_LED_2,
1012 .end = WM831X_STATUS_LED_2,
1013 .flags = IORESOURCE_IO,
1014 },
1015};
1016
1017static struct resource wm831x_touch_resources[] = {
1018 {
1019 .name = "TCHPD",
1020 .start = WM831X_IRQ_TCHPD,
1021 .end = WM831X_IRQ_TCHPD,
1022 .flags = IORESOURCE_IRQ,
1023 },
1024 {
1025 .name = "TCHDATA",
1026 .start = WM831X_IRQ_TCHDATA,
1027 .end = WM831X_IRQ_TCHDATA,
1028 .flags = IORESOURCE_IRQ,
1029 },
1030};
1031
1032static struct resource wm831x_wdt_resources[] = {
1033 {
1034 .start = WM831X_IRQ_WDOG_TO,
1035 .end = WM831X_IRQ_WDOG_TO,
1036 .flags = IORESOURCE_IRQ,
1037 },
1038};
1039
1040static struct mfd_cell wm8310_devs[] = {
c26964ea
MB		 1041 {
1042 .name = "wm831x-backup",
1043 },
d2bedfe7
MB		 1044 {
1045 .name = "wm831x-buckv",
1046 .id = 1,
1047 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1048 .resources = wm831x_dcdc1_resources,
1049 },
1050 {
1051 .name = "wm831x-buckv",
1052 .id = 2,
1053 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1054 .resources = wm831x_dcdc2_resources,
1055 },
1056 {
1057 .name = "wm831x-buckp",
1058 .id = 3,
1059 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1060 .resources = wm831x_dcdc3_resources,
1061 },
1062 {
1063 .name = "wm831x-boostp",
1064 .id = 4,
1065 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1066 .resources = wm831x_dcdc4_resources,
1067 },
a5e06781
MB		 1068 {
1069 .name = "wm831x-clk",
1070 },
d2bedfe7
MB		 1071 {
1072 .name = "wm831x-epe",
1073 .id = 1,
1074 },
1075 {
1076 .name = "wm831x-epe",
1077 .id = 2,
1078 },
1079 {
1080 .name = "wm831x-gpio",
1081 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1082 .resources = wm831x_gpio_resources,
1083 },
1084 {
1085 .name = "wm831x-hwmon",
1086 },
1087 {
1088 .name = "wm831x-isink",
1089 .id = 1,
1090 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1091 .resources = wm831x_isink1_resources,
1092 },
1093 {
1094 .name = "wm831x-isink",
1095 .id = 2,
1096 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1097 .resources = wm831x_isink2_resources,
1098 },
1099 {
1100 .name = "wm831x-ldo",
1101 .id = 1,
1102 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1103 .resources = wm831x_ldo1_resources,
1104 },
1105 {
1106 .name = "wm831x-ldo",
1107 .id = 2,
1108 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1109 .resources = wm831x_ldo2_resources,
1110 },
1111 {
1112 .name = "wm831x-ldo",
1113 .id = 3,
1114 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1115 .resources = wm831x_ldo3_resources,
1116 },
1117 {
1118 .name = "wm831x-ldo",
1119 .id = 4,
1120 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1121 .resources = wm831x_ldo4_resources,
1122 },
1123 {
1124 .name = "wm831x-ldo",
1125 .id = 5,
1126 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1127 .resources = wm831x_ldo5_resources,
1128 },
1129 {
1130 .name = "wm831x-ldo",
1131 .id = 6,
1132 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1133 .resources = wm831x_ldo6_resources,
1134 },
1135 {
1136 .name = "wm831x-aldo",
1137 .id = 7,
1138 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1139 .resources = wm831x_ldo7_resources,
1140 },
1141 {
1142 .name = "wm831x-aldo",
1143 .id = 8,
1144 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1145 .resources = wm831x_ldo8_resources,
1146 },
1147 {
1148 .name = "wm831x-aldo",
1149 .id = 9,
1150 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1151 .resources = wm831x_ldo9_resources,
1152 },
1153 {
1154 .name = "wm831x-aldo",
1155 .id = 10,
1156 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1157 .resources = wm831x_ldo10_resources,
1158 },
1159 {
1160 .name = "wm831x-alive-ldo",
1161 .id = 11,
1162 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1163 .resources = wm831x_ldo11_resources,
1164 },
1165 {
1166 .name = "wm831x-on",
1167 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1168 .resources = wm831x_on_resources,
1169 },
1170 {
1171 .name = "wm831x-power",
1172 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1173 .resources = wm831x_power_resources,
1174 },
d2bedfe7
MB		 1175 {
1176 .name = "wm831x-status",
1177 .id = 1,
1178 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1179 .resources = wm831x_status1_resources,
1180 },
1181 {
1182 .name = "wm831x-status",
1183 .id = 2,
1184 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1185 .resources = wm831x_status2_resources,
1186 },
1187 {
1188 .name = "wm831x-watchdog",
1189 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1190 .resources = wm831x_wdt_resources,
1191 },
1192};
1193
1194static struct mfd_cell wm8311_devs[] = {
c26964ea
MB		 1195 {
1196 .name = "wm831x-backup",
1197 },
d2bedfe7
MB		 1198 {
1199 .name = "wm831x-buckv",
1200 .id = 1,
1201 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1202 .resources = wm831x_dcdc1_resources,
1203 },
1204 {
1205 .name = "wm831x-buckv",
1206 .id = 2,
1207 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1208 .resources = wm831x_dcdc2_resources,
1209 },
1210 {
1211 .name = "wm831x-buckp",
1212 .id = 3,
1213 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1214 .resources = wm831x_dcdc3_resources,
1215 },
1216 {
1217 .name = "wm831x-boostp",
1218 .id = 4,
1219 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1220 .resources = wm831x_dcdc4_resources,
1221 },
a5e06781
MB		 1222 {
1223 .name = "wm831x-clk",
1224 },
d2bedfe7
MB		 1225 {
1226 .name = "wm831x-epe",
1227 .id = 1,
1228 },
1229 {
1230 .name = "wm831x-epe",
1231 .id = 2,
1232 },
1233 {
1234 .name = "wm831x-gpio",
1235 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1236 .resources = wm831x_gpio_resources,
1237 },
1238 {
1239 .name = "wm831x-hwmon",
1240 },
1241 {
1242 .name = "wm831x-isink",
1243 .id = 1,
1244 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1245 .resources = wm831x_isink1_resources,
1246 },
1247 {
1248 .name = "wm831x-isink",
1249 .id = 2,
1250 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1251 .resources = wm831x_isink2_resources,
1252 },
1253 {
1254 .name = "wm831x-ldo",
1255 .id = 1,
1256 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1257 .resources = wm831x_ldo1_resources,
1258 },
1259 {
1260 .name = "wm831x-ldo",
1261 .id = 2,
1262 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1263 .resources = wm831x_ldo2_resources,
1264 },
1265 {
1266 .name = "wm831x-ldo",
1267 .id = 3,
1268 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1269 .resources = wm831x_ldo3_resources,
1270 },
1271 {
1272 .name = "wm831x-ldo",
1273 .id = 4,
1274 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1275 .resources = wm831x_ldo4_resources,
1276 },
1277 {
1278 .name = "wm831x-ldo",
1279 .id = 5,
1280 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1281 .resources = wm831x_ldo5_resources,
1282 },
1283 {
1284 .name = "wm831x-aldo",
1285 .id = 7,
1286 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1287 .resources = wm831x_ldo7_resources,
1288 },
1289 {
1290 .name = "wm831x-alive-ldo",
1291 .id = 11,
1292 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1293 .resources = wm831x_ldo11_resources,
1294 },
1295 {
1296 .name = "wm831x-on",
1297 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1298 .resources = wm831x_on_resources,
1299 },
1300 {
1301 .name = "wm831x-power",
1302 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1303 .resources = wm831x_power_resources,
1304 },
d2bedfe7
MB		 1305 {
1306 .name = "wm831x-status",
1307 .id = 1,
1308 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1309 .resources = wm831x_status1_resources,
1310 },
1311 {
1312 .name = "wm831x-status",
1313 .id = 2,
1314 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1315 .resources = wm831x_status2_resources,
1316 },
d2bedfe7
MB		 1317 {
1318 .name = "wm831x-watchdog",
1319 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1320 .resources = wm831x_wdt_resources,
1321 },
1322};
1323
1324static struct mfd_cell wm8312_devs[] = {
c26964ea
MB		 1325 {
1326 .name = "wm831x-backup",
1327 },
d2bedfe7
MB		 1328 {
1329 .name = "wm831x-buckv",
1330 .id = 1,
1331 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1332 .resources = wm831x_dcdc1_resources,
1333 },
1334 {
1335 .name = "wm831x-buckv",
1336 .id = 2,
1337 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1338 .resources = wm831x_dcdc2_resources,
1339 },
1340 {
1341 .name = "wm831x-buckp",
1342 .id = 3,
1343 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1344 .resources = wm831x_dcdc3_resources,
1345 },
1346 {
1347 .name = "wm831x-boostp",
1348 .id = 4,
1349 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1350 .resources = wm831x_dcdc4_resources,
1351 },
a5e06781
MB		 1352 {
1353 .name = "wm831x-clk",
1354 },
d2bedfe7
MB		 1355 {
1356 .name = "wm831x-epe",
1357 .id = 1,
1358 },
1359 {
1360 .name = "wm831x-epe",
1361 .id = 2,
1362 },
1363 {
1364 .name = "wm831x-gpio",
1365 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1366 .resources = wm831x_gpio_resources,
1367 },
1368 {
1369 .name = "wm831x-hwmon",
1370 },
1371 {
1372 .name = "wm831x-isink",
1373 .id = 1,
1374 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1375 .resources = wm831x_isink1_resources,
1376 },
1377 {
1378 .name = "wm831x-isink",
1379 .id = 2,
1380 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1381 .resources = wm831x_isink2_resources,
1382 },
1383 {
1384 .name = "wm831x-ldo",
1385 .id = 1,
1386 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1387 .resources = wm831x_ldo1_resources,
1388 },
1389 {
1390 .name = "wm831x-ldo",
1391 .id = 2,
1392 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1393 .resources = wm831x_ldo2_resources,
1394 },
1395 {
1396 .name = "wm831x-ldo",
1397 .id = 3,
1398 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1399 .resources = wm831x_ldo3_resources,
1400 },
1401 {
1402 .name = "wm831x-ldo",
1403 .id = 4,
1404 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1405 .resources = wm831x_ldo4_resources,
1406 },
1407 {
1408 .name = "wm831x-ldo",
1409 .id = 5,
1410 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1411 .resources = wm831x_ldo5_resources,
1412 },
1413 {
1414 .name = "wm831x-ldo",
1415 .id = 6,
1416 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1417 .resources = wm831x_ldo6_resources,
1418 },
1419 {
1420 .name = "wm831x-aldo",
1421 .id = 7,
1422 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1423 .resources = wm831x_ldo7_resources,
1424 },
1425 {
1426 .name = "wm831x-aldo",
1427 .id = 8,
1428 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1429 .resources = wm831x_ldo8_resources,
1430 },
1431 {
1432 .name = "wm831x-aldo",
1433 .id = 9,
1434 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1435 .resources = wm831x_ldo9_resources,
1436 },
1437 {
1438 .name = "wm831x-aldo",
1439 .id = 10,
1440 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1441 .resources = wm831x_ldo10_resources,
1442 },
1443 {
1444 .name = "wm831x-alive-ldo",
1445 .id = 11,
1446 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1447 .resources = wm831x_ldo11_resources,
1448 },
1449 {
1450 .name = "wm831x-on",
1451 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1452 .resources = wm831x_on_resources,
1453 },
1454 {
1455 .name = "wm831x-power",
1456 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1457 .resources = wm831x_power_resources,
1458 },
d2bedfe7
MB		 1459 {
1460 .name = "wm831x-status",
1461 .id = 1,
1462 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1463 .resources = wm831x_status1_resources,
1464 },
1465 {
1466 .name = "wm831x-status",
1467 .id = 2,
1468 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1469 .resources = wm831x_status2_resources,
1470 },
d2bedfe7
MB		 1471 {
1472 .name = "wm831x-watchdog",
1473 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1474 .resources = wm831x_wdt_resources,
1475 },
1476};
1477
d4e0a89e
MB		 1478static struct mfd_cell wm8320_devs[] = {
1479 {
1480 .name = "wm831x-backup",
1481 },
1482 {
1483 .name = "wm831x-buckv",
1484 .id = 1,
1485 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1486 .resources = wm831x_dcdc1_resources,
1487 },
1488 {
1489 .name = "wm831x-buckv",
1490 .id = 2,
1491 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1492 .resources = wm831x_dcdc2_resources,
1493 },
1494 {
1495 .name = "wm831x-buckp",
1496 .id = 3,
1497 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1498 .resources = wm831x_dcdc3_resources,
1499 },
1500 {
1501 .name = "wm831x-buckp",
1502 .id = 4,
1503 .num_resources = ARRAY_SIZE(wm8320_dcdc4_buck_resources),
1504 .resources = wm8320_dcdc4_buck_resources,
1505 },
a5e06781
MB		 1506 {
1507 .name = "wm831x-clk",
1508 },
d4e0a89e
MB		 1509 {
1510 .name = "wm831x-gpio",
1511 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1512 .resources = wm831x_gpio_resources,
1513 },
1514 {
1515 .name = "wm831x-hwmon",
1516 },
1517 {
1518 .name = "wm831x-ldo",
1519 .id = 1,
1520 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1521 .resources = wm831x_ldo1_resources,
1522 },
1523 {
1524 .name = "wm831x-ldo",
1525 .id = 2,
1526 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1527 .resources = wm831x_ldo2_resources,
1528 },
1529 {
1530 .name = "wm831x-ldo",
1531 .id = 3,
1532 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1533 .resources = wm831x_ldo3_resources,
1534 },
1535 {
1536 .name = "wm831x-ldo",
1537 .id = 4,
1538 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1539 .resources = wm831x_ldo4_resources,
1540 },
1541 {
1542 .name = "wm831x-ldo",
1543 .id = 5,
1544 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1545 .resources = wm831x_ldo5_resources,
1546 },
1547 {
1548 .name = "wm831x-ldo",
1549 .id = 6,
1550 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1551 .resources = wm831x_ldo6_resources,
1552 },
1553 {
1554 .name = "wm831x-aldo",
1555 .id = 7,
1556 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1557 .resources = wm831x_ldo7_resources,
1558 },
1559 {
1560 .name = "wm831x-aldo",
1561 .id = 8,
1562 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1563 .resources = wm831x_ldo8_resources,
1564 },
1565 {
1566 .name = "wm831x-aldo",
1567 .id = 9,
1568 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1569 .resources = wm831x_ldo9_resources,
1570 },
1571 {
1572 .name = "wm831x-aldo",
1573 .id = 10,
1574 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1575 .resources = wm831x_ldo10_resources,
1576 },
1577 {
1578 .name = "wm831x-alive-ldo",
1579 .id = 11,
1580 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1581 .resources = wm831x_ldo11_resources,
1582 },
1583 {
1584 .name = "wm831x-on",
1585 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1586 .resources = wm831x_on_resources,
1587 },
d4e0a89e
MB		 1588 {
1589 .name = "wm831x-status",
1590 .id = 1,
1591 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1592 .resources = wm831x_status1_resources,
1593 },
1594 {
1595 .name = "wm831x-status",
1596 .id = 2,
1597 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1598 .resources = wm831x_status2_resources,
1599 },
1600 {
1601 .name = "wm831x-watchdog",
1602 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1603 .resources = wm831x_wdt_resources,
1604 },
1605};
1606
266a5e02
MB		 1607static struct mfd_cell touch_devs[] = {
1608 {
1609 .name = "wm831x-touch",
1610 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1611 .resources = wm831x_touch_resources,
1612 },
1613};
1614
b9d03d99
MB		 1615static struct mfd_cell rtc_devs[] = {
1616 {
1617 .name = "wm831x-rtc",
1618 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1619 .resources = wm831x_rtc_resources,
1620 },
1621};
266a5e02 1622
63aed85e
MB		 1623static struct mfd_cell backlight_devs[] = {
1624 {
1625 .name = "wm831x-backlight",
1626 },
1627};
1628
1df5981b
MB		 1629struct regmap_config wm831x_regmap_config = {
1630 .reg_bits = 16,
1631 .val_bits = 16,
2e47fff1 1632
7cccbdc8
MB		 1633 .cache_type = REGCACHE_RBTREE,
1634
2e47fff1
MB		 1635 .max_register = WM831X_DBE_CHECK_DATA,
1636 .readable_reg = wm831x_reg_readable,
1637 .writeable_reg = wm831x_reg_writeable,
1638 .volatile_reg = wm831x_reg_volatile,
1df5981b
MB		 1639};
1640EXPORT_SYMBOL_GPL(wm831x_regmap_config);
1641
d2bedfe7
MB		 1642/*
1643 * Instantiate the generic non-control parts of the device.
1644 */
e5b48684 1645int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
d2bedfe7
MB		 1646{
1647 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
eb503dc1 1648 int rev, wm831x_num;
d2bedfe7 1649 enum wm831x_parent parent;
0b14c22e 1650 int ret, i;
d2bedfe7
MB		 1651
1652 mutex_init(&wm831x->io_lock);
1653 mutex_init(&wm831x->key_lock);
1654 dev_set_drvdata(wm831x->dev, wm831x);
523d9cfb 1655 wm831x->soft_shutdown = pdata->soft_shutdown;
d2bedfe7
MB		 1656
1657 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1658 if (ret < 0) {
1659 dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
130a7032 1660 goto err;
d2bedfe7 1661 }
b93cef55
MB		 1662 switch (ret) {
1663 case 0x6204:
1664 case 0x6246:
1665 break;
1666 default:
d2bedfe7
MB		 1667 dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1668 ret = -EINVAL;
130a7032 1669 goto err;
d2bedfe7
MB		 1670 }
1671
1672 ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1673 if (ret < 0) {
1674 dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
130a7032 1675 goto err;
d2bedfe7
MB		 1676 }
1677 rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1678
1679 ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1680 if (ret < 0) {
1681 dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
130a7032 1682 goto err;
d2bedfe7
MB		 1683 }
1684
894362f5
MB		 1685 /* Some engineering samples do not have the ID set, rely on
1686 * the device being registered correctly.
1687 */
1688 if (ret == 0) {
1689 dev_info(wm831x->dev, "Device is an engineering sample\n");
1690 ret = id;
1691 }
1692
d2bedfe7 1693 switch (ret) {
894362f5 1694 case WM8310:
d2bedfe7 1695 parent = WM8310;
6f2ecaae 1696 wm831x->num_gpio = 16;
b03b4d7c 1697 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1698 if (rev > 0) {
1699 wm831x->has_gpio_ena = 1;
1700 wm831x->has_cs_sts = 1;
1701 }
1702
894362f5 1703 dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1704 break;
1705
894362f5 1706 case WM8311:
d2bedfe7 1707 parent = WM8311;
6f2ecaae 1708 wm831x->num_gpio = 16;
b03b4d7c 1709 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1710 if (rev > 0) {
1711 wm831x->has_gpio_ena = 1;
1712 wm831x->has_cs_sts = 1;
1713 }
1714
894362f5 1715 dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1716 break;
1717
894362f5 1718 case WM8312:
d2bedfe7 1719 parent = WM8312;
6f2ecaae 1720 wm831x->num_gpio = 16;
b03b4d7c 1721 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1722 if (rev > 0) {
1723 wm831x->has_gpio_ena = 1;
1724 wm831x->has_cs_sts = 1;
1725 }
1726
894362f5 1727 dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1728 break;
1729
d4e0a89e
MB		 1730 case WM8320:
1731 parent = WM8320;
1732 wm831x->num_gpio = 12;
1733 dev_info(wm831x->dev, "WM8320 revision %c\n", 'A' + rev);
1734 break;
1735
88913521
MB		 1736 case WM8321:
1737 parent = WM8321;
1738 wm831x->num_gpio = 12;
1739 dev_info(wm831x->dev, "WM8321 revision %c\n", 'A' + rev);
1740 break;
1741
0b315884
MB		 1742 case WM8325:
1743 parent = WM8325;
1744 wm831x->num_gpio = 12;
1745 dev_info(wm831x->dev, "WM8325 revision %c\n", 'A' + rev);
1746 break;
1747
412dc11d
MB		 1748 case WM8326:
1749 parent = WM8326;
1750 wm831x->num_gpio = 12;
1751 dev_info(wm831x->dev, "WM8326 revision %c\n", 'A' + rev);
1752 break;
1753
d2bedfe7
MB		 1754 default:
1755 dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1756 ret = -EINVAL;
130a7032 1757 goto err;
d2bedfe7
MB		 1758 }
1759
1760 /* This will need revisiting in future but is OK for all
1761 * current parts.
1762 */
1763 if (parent != id)
894362f5 1764 dev_warn(wm831x->dev, "Device was registered as a WM%lx\n",
d2bedfe7
MB		 1765 id);
1766
1767 /* Bootstrap the user key */
1768 ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1769 if (ret < 0) {
1770 dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
130a7032 1771 goto err;
d2bedfe7
MB		 1772 }
1773 if (ret != 0) {
1774 dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1775 ret);
1776 wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1777 }
1778 wm831x->locked = 1;
1779
1780 if (pdata && pdata->pre_init) {
1781 ret = pdata->pre_init(wm831x);
1782 if (ret != 0) {
1783 dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
130a7032 1784 goto err;
d2bedfe7
MB		 1785 }
1786 }
1787
0b14c22e
MB		 1788 if (pdata) {
1789 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
1790 if (!pdata->gpio_defaults[i])
1791 continue;
1792
1793 wm831x_reg_write(wm831x,
1794 WM831X_GPIO1_CONTROL + i,
1795 pdata->gpio_defaults[i] & 0xffff);
1796 }
1797 }
1798
eb503dc1
MB		 1799 /* Multiply by 10 as we have many subdevices of the same type */
1800 if (pdata && pdata->wm831x_num)
1801 wm831x_num = pdata->wm831x_num * 10;
1802 else
1803 wm831x_num = -1;
1804
7d4d0a3e
MB		 1805 ret = wm831x_irq_init(wm831x, irq);
1806 if (ret != 0)
130a7032 1807 goto err;
7d4d0a3e 1808
e69b6de1 1809 wm831x_auxadc_init(wm831x);
473fe736 1810
d2bedfe7
MB		 1811 /* The core device is up, instantiate the subdevices. */
1812 switch (parent) {
1813 case WM8310:
eb503dc1 1814 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1815 wm8310_devs, ARRAY_SIZE(wm8310_devs),
5fb4d38b 1816 NULL, wm831x->irq_base);
d2bedfe7
MB		 1817 break;
1818
1819 case WM8311:
eb503dc1 1820 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1821 wm8311_devs, ARRAY_SIZE(wm8311_devs),
5fb4d38b 1822 NULL, wm831x->irq_base);
266a5e02
MB		 1823 if (!pdata || !pdata->disable_touch)
1824 mfd_add_devices(wm831x->dev, wm831x_num,
1825 touch_devs, ARRAY_SIZE(touch_devs),
1826 NULL, wm831x->irq_base);
d2bedfe7
MB		 1827 break;
1828
1829 case WM8312:
eb503dc1 1830 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1831 wm8312_devs, ARRAY_SIZE(wm8312_devs),
5fb4d38b 1832 NULL, wm831x->irq_base);
266a5e02
MB		 1833 if (!pdata || !pdata->disable_touch)
1834 mfd_add_devices(wm831x->dev, wm831x_num,
1835 touch_devs, ARRAY_SIZE(touch_devs),
1836 NULL, wm831x->irq_base);
d2bedfe7
MB		 1837 break;
1838
d4e0a89e 1839 case WM8320:
88913521 1840 case WM8321:
0b315884 1841 case WM8325:
412dc11d 1842 case WM8326:
eb503dc1 1843 ret = mfd_add_devices(wm831x->dev, wm831x_num,
0b315884 1844 wm8320_devs, ARRAY_SIZE(wm8320_devs),
bd7c72ed 1845 NULL, wm831x->irq_base);
0b315884
MB		 1846 break;
1847
d2bedfe7
MB		 1848 default:
1849 /* If this happens the bus probe function is buggy */
1850 BUG();
1851 }
1852
1853 if (ret != 0) {
1854 dev_err(wm831x->dev, "Failed to add children\n");
7d4d0a3e 1855 goto err_irq;
d2bedfe7
MB		 1856 }
1857
b9d03d99
MB		 1858 /* The RTC can only be used if the 32.768kHz crystal is
1859 * enabled; this can't be controlled by software at runtime.
1860 */
1861 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1862 if (ret < 0) {
1863 dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1864 goto err_irq;
1865 }
1866
1867 if (ret & WM831X_XTAL_ENA) {
1868 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1869 rtc_devs, ARRAY_SIZE(rtc_devs),
1870 NULL, wm831x->irq_base);
1871 if (ret != 0) {
1872 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1873 goto err_irq;
1874 }
1875 } else {
1876 dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1877 }
1878
63aed85e
MB		 1879 if (pdata && pdata->backlight) {
1880 /* Treat errors as non-critical */
eb503dc1 1881 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
5fb4d38b
MB		 1882 ARRAY_SIZE(backlight_devs), NULL,
1883 wm831x->irq_base);
63aed85e
MB		 1884 if (ret < 0)
1885 dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1886 ret);
1887 }
1888
6704e517
MB		 1889 wm831x_otp_init(wm831x);
1890
d2bedfe7
MB		 1891 if (pdata && pdata->post_init) {
1892 ret = pdata->post_init(wm831x);
1893 if (ret != 0) {
1894 dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
7d4d0a3e 1895 goto err_irq;
d2bedfe7
MB		 1896 }
1897 }
1898
1899 return 0;
1900
7d4d0a3e
MB		 1901err_irq:
1902 wm831x_irq_exit(wm831x);
130a7032 1903err:
d2bedfe7 1904 mfd_remove_devices(wm831x->dev);
d2bedfe7
MB		 1905 return ret;
1906}
1907
e5b48684 1908void wm831x_device_exit(struct wm831x *wm831x)
d2bedfe7 1909{
6704e517 1910 wm831x_otp_exit(wm831x);
d2bedfe7 1911 mfd_remove_devices(wm831x->dev);
473fe736
MB		 1912 if (wm831x->irq_base)
1913 free_irq(wm831x->irq_base + WM831X_IRQ_AUXADC_DATA, wm831x);
7d4d0a3e 1914 wm831x_irq_exit(wm831x);
d2bedfe7
MB		 1915}
1916
e5b48684 1917int wm831x_device_suspend(struct wm831x *wm831x)
b03b4d7c
MB		 1918{
1919 int reg, mask;
1920
1921 /* If the charger IRQs are a wake source then make sure we ack
1922 * them even if they're not actively being used (eg, no power
1923 * driver or no IRQ line wired up) then acknowledge the
1924 * interrupts otherwise suspend won't last very long.
1925 */
1926 if (wm831x->charger_irq_wake) {
1927 reg = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_2_MASK);
1928
1929 mask = WM831X_CHG_BATT_HOT_EINT |
1930 WM831X_CHG_BATT_COLD_EINT |
1931 WM831X_CHG_BATT_FAIL_EINT |
1932 WM831X_CHG_OV_EINT | WM831X_CHG_END_EINT |
1933 WM831X_CHG_TO_EINT | WM831X_CHG_MODE_EINT |
1934 WM831X_CHG_START_EINT;
1935
1936 /* If any of the interrupts are masked read the statuses */
1937 if (reg & mask)
1938 reg = wm831x_reg_read(wm831x,
1939 WM831X_INTERRUPT_STATUS_2);
1940
1941 if (reg & mask) {
1942 dev_info(wm831x->dev,
1943 "Acknowledging masked charger IRQs: %x\n",
1944 reg & mask);
1945 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_2,
1946 reg & mask);
1947 }
1948 }
1949
1950 return 0;
1951}
1952
523d9cfb
MB		 1953void wm831x_device_shutdown(struct wm831x *wm831x)
1954{
1955 if (wm831x->soft_shutdown) {
1956 dev_info(wm831x->dev, "Initiating shutdown...\n");
1957 wm831x_set_bits(wm831x, WM831X_POWER_STATE, WM831X_CHIP_ON, 0);
1958 }
1959}
1960EXPORT_SYMBOL_GPL(wm831x_device_shutdown);
1961
e5b48684 1962MODULE_DESCRIPTION("Core support for the WM831X AudioPlus PMIC");
d2bedfe7
MB		 1963MODULE_LICENSE("GPL");
1964MODULE_AUTHOR("Mark Brown");
kernel source for telekom puls (alcatel/mediatek)