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mfd: Provide regmap register access info from wm831x driver
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / mfd / wm831x-core.c
CommitLineData
d2bedfe7
MB		 1/*
2 * wm831x-core.c -- Device access for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
7e9f9fd4
MB		 17#include <linux/bcd.h>
18#include <linux/delay.h>
d2bedfe7 19#include <linux/mfd/core.h>
5a0e3ad6 20#include <linux/slab.h>
1df5981b 21#include <linux/err.h>
d2bedfe7
MB		 22
23#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/pdata.h>
7d4d0a3e 25#include <linux/mfd/wm831x/irq.h>
7e9f9fd4 26#include <linux/mfd/wm831x/auxadc.h>
6704e517 27#include <linux/mfd/wm831x/otp.h>
698659d5
MB		 28#include <linux/mfd/wm831x/regulator.h>
29
30/* Current settings - values are 2*2^(reg_val/4) microamps. These are
31 * exported since they are used by multiple drivers.
32 */
7716977b 33int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
698659d5
MB		 34 2,
35 2,
36 3,
37 3,
38 4,
39 5,
40 6,
41 7,
42 8,
43 10,
44 11,
45 13,
46 16,
47 19,
48 23,
49 27,
50 32,
51 38,
52 45,
53 54,
54 64,
55 76,
56 91,
57 108,
58 128,
59 152,
60 181,
61 215,
62 256,
63 304,
64 362,
65 431,
66 512,
67 609,
68 724,
69 861,
70 1024,
71 1218,
72 1448,
73 1722,
74 2048,
75 2435,
76 2896,
77 3444,
78 4096,
79 4871,
80 5793,
81 6889,
82 8192,
83 9742,
84 11585,
85 13777,
86 16384,
87 19484,
88 23170,
89 27554,
90};
91EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
d2bedfe7 92
d2bedfe7
MB		 93static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
94{
95 if (!wm831x->locked)
96 return 0;
97
98 switch (reg) {
99 case WM831X_WATCHDOG:
100 case WM831X_DC4_CONTROL:
101 case WM831X_ON_PIN_CONTROL:
102 case WM831X_BACKUP_CHARGER_CONTROL:
103 case WM831X_CHARGER_CONTROL_1:
104 case WM831X_CHARGER_CONTROL_2:
105 return 1;
106
107 default:
108 return 0;
109 }
110}
111
112/**
113 * wm831x_reg_unlock: Unlock user keyed registers
114 *
115 * The WM831x has a user key preventing writes to particularly
116 * critical registers. This function locks those registers,
117 * allowing writes to them.
118 */
119void wm831x_reg_lock(struct wm831x *wm831x)
120{
121 int ret;
122
123 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
124 if (ret == 0) {
125 dev_vdbg(wm831x->dev, "Registers locked\n");
126
127 mutex_lock(&wm831x->io_lock);
128 WARN_ON(wm831x->locked);
129 wm831x->locked = 1;
130 mutex_unlock(&wm831x->io_lock);
131 } else {
132 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
133 }
134
135}
136EXPORT_SYMBOL_GPL(wm831x_reg_lock);
137
138/**
139 * wm831x_reg_unlock: Unlock user keyed registers
140 *
141 * The WM831x has a user key preventing writes to particularly
142 * critical registers. This function locks those registers,
143 * preventing spurious writes.
144 */
145int wm831x_reg_unlock(struct wm831x *wm831x)
146{
147 int ret;
148
149 /* 0x9716 is the value required to unlock the registers */
150 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
151 if (ret == 0) {
152 dev_vdbg(wm831x->dev, "Registers unlocked\n");
153
154 mutex_lock(&wm831x->io_lock);
155 WARN_ON(!wm831x->locked);
156 wm831x->locked = 0;
157 mutex_unlock(&wm831x->io_lock);
158 }
159
160 return ret;
161}
162EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
163
2e47fff1
MB		 164static bool wm831x_reg_readable(struct device *dev, unsigned int reg)
165{
166 switch (reg) {
167 case WM831X_RESET_ID:
168 case WM831X_REVISION:
169 case WM831X_PARENT_ID:
170 case WM831X_SYSVDD_CONTROL:
171 case WM831X_THERMAL_MONITORING:
172 case WM831X_POWER_STATE:
173 case WM831X_WATCHDOG:
174 case WM831X_ON_PIN_CONTROL:
175 case WM831X_RESET_CONTROL:
176 case WM831X_CONTROL_INTERFACE:
177 case WM831X_SECURITY_KEY:
178 case WM831X_SOFTWARE_SCRATCH:
179 case WM831X_OTP_CONTROL:
180 case WM831X_GPIO_LEVEL:
181 case WM831X_SYSTEM_STATUS:
182 case WM831X_ON_SOURCE:
183 case WM831X_OFF_SOURCE:
184 case WM831X_SYSTEM_INTERRUPTS:
185 case WM831X_INTERRUPT_STATUS_1:
186 case WM831X_INTERRUPT_STATUS_2:
187 case WM831X_INTERRUPT_STATUS_3:
188 case WM831X_INTERRUPT_STATUS_4:
189 case WM831X_INTERRUPT_STATUS_5:
190 case WM831X_IRQ_CONFIG:
191 case WM831X_SYSTEM_INTERRUPTS_MASK:
192 case WM831X_INTERRUPT_STATUS_1_MASK:
193 case WM831X_INTERRUPT_STATUS_2_MASK:
194 case WM831X_INTERRUPT_STATUS_3_MASK:
195 case WM831X_INTERRUPT_STATUS_4_MASK:
196 case WM831X_INTERRUPT_STATUS_5_MASK:
197 case WM831X_RTC_WRITE_COUNTER:
198 case WM831X_RTC_TIME_1:
199 case WM831X_RTC_TIME_2:
200 case WM831X_RTC_ALARM_1:
201 case WM831X_RTC_ALARM_2:
202 case WM831X_RTC_CONTROL:
203 case WM831X_RTC_TRIM:
204 case WM831X_TOUCH_CONTROL_1:
205 case WM831X_TOUCH_CONTROL_2:
206 case WM831X_TOUCH_DATA_X:
207 case WM831X_TOUCH_DATA_Y:
208 case WM831X_TOUCH_DATA_Z:
209 case WM831X_AUXADC_DATA:
210 case WM831X_AUXADC_CONTROL:
211 case WM831X_AUXADC_SOURCE:
212 case WM831X_COMPARATOR_CONTROL:
213 case WM831X_COMPARATOR_1:
214 case WM831X_COMPARATOR_2:
215 case WM831X_COMPARATOR_3:
216 case WM831X_COMPARATOR_4:
217 case WM831X_GPIO1_CONTROL:
218 case WM831X_GPIO2_CONTROL:
219 case WM831X_GPIO3_CONTROL:
220 case WM831X_GPIO4_CONTROL:
221 case WM831X_GPIO5_CONTROL:
222 case WM831X_GPIO6_CONTROL:
223 case WM831X_GPIO7_CONTROL:
224 case WM831X_GPIO8_CONTROL:
225 case WM831X_GPIO9_CONTROL:
226 case WM831X_GPIO10_CONTROL:
227 case WM831X_GPIO11_CONTROL:
228 case WM831X_GPIO12_CONTROL:
229 case WM831X_GPIO13_CONTROL:
230 case WM831X_GPIO14_CONTROL:
231 case WM831X_GPIO15_CONTROL:
232 case WM831X_GPIO16_CONTROL:
233 case WM831X_CHARGER_CONTROL_1:
234 case WM831X_CHARGER_CONTROL_2:
235 case WM831X_CHARGER_STATUS:
236 case WM831X_BACKUP_CHARGER_CONTROL:
237 case WM831X_STATUS_LED_1:
238 case WM831X_STATUS_LED_2:
239 case WM831X_CURRENT_SINK_1:
240 case WM831X_CURRENT_SINK_2:
241 case WM831X_DCDC_ENABLE:
242 case WM831X_LDO_ENABLE:
243 case WM831X_DCDC_STATUS:
244 case WM831X_LDO_STATUS:
245 case WM831X_DCDC_UV_STATUS:
246 case WM831X_LDO_UV_STATUS:
247 case WM831X_DC1_CONTROL_1:
248 case WM831X_DC1_CONTROL_2:
249 case WM831X_DC1_ON_CONFIG:
250 case WM831X_DC1_SLEEP_CONTROL:
251 case WM831X_DC1_DVS_CONTROL:
252 case WM831X_DC2_CONTROL_1:
253 case WM831X_DC2_CONTROL_2:
254 case WM831X_DC2_ON_CONFIG:
255 case WM831X_DC2_SLEEP_CONTROL:
256 case WM831X_DC2_DVS_CONTROL:
257 case WM831X_DC3_CONTROL_1:
258 case WM831X_DC3_CONTROL_2:
259 case WM831X_DC3_ON_CONFIG:
260 case WM831X_DC3_SLEEP_CONTROL:
261 case WM831X_DC4_CONTROL:
262 case WM831X_DC4_SLEEP_CONTROL:
263 case WM831X_EPE1_CONTROL:
264 case WM831X_EPE2_CONTROL:
265 case WM831X_LDO1_CONTROL:
266 case WM831X_LDO1_ON_CONTROL:
267 case WM831X_LDO1_SLEEP_CONTROL:
268 case WM831X_LDO2_CONTROL:
269 case WM831X_LDO2_ON_CONTROL:
270 case WM831X_LDO2_SLEEP_CONTROL:
271 case WM831X_LDO3_CONTROL:
272 case WM831X_LDO3_ON_CONTROL:
273 case WM831X_LDO3_SLEEP_CONTROL:
274 case WM831X_LDO4_CONTROL:
275 case WM831X_LDO4_ON_CONTROL:
276 case WM831X_LDO4_SLEEP_CONTROL:
277 case WM831X_LDO5_CONTROL:
278 case WM831X_LDO5_ON_CONTROL:
279 case WM831X_LDO5_SLEEP_CONTROL:
280 case WM831X_LDO6_CONTROL:
281 case WM831X_LDO6_ON_CONTROL:
282 case WM831X_LDO6_SLEEP_CONTROL:
283 case WM831X_LDO7_CONTROL:
284 case WM831X_LDO7_ON_CONTROL:
285 case WM831X_LDO7_SLEEP_CONTROL:
286 case WM831X_LDO8_CONTROL:
287 case WM831X_LDO8_ON_CONTROL:
288 case WM831X_LDO8_SLEEP_CONTROL:
289 case WM831X_LDO9_CONTROL:
290 case WM831X_LDO9_ON_CONTROL:
291 case WM831X_LDO9_SLEEP_CONTROL:
292 case WM831X_LDO10_CONTROL:
293 case WM831X_LDO10_ON_CONTROL:
294 case WM831X_LDO10_SLEEP_CONTROL:
295 case WM831X_LDO11_ON_CONTROL:
296 case WM831X_LDO11_SLEEP_CONTROL:
297 case WM831X_POWER_GOOD_SOURCE_1:
298 case WM831X_POWER_GOOD_SOURCE_2:
299 case WM831X_CLOCK_CONTROL_1:
300 case WM831X_CLOCK_CONTROL_2:
301 case WM831X_FLL_CONTROL_1:
302 case WM831X_FLL_CONTROL_2:
303 case WM831X_FLL_CONTROL_3:
304 case WM831X_FLL_CONTROL_4:
305 case WM831X_FLL_CONTROL_5:
306 case WM831X_UNIQUE_ID_1:
307 case WM831X_UNIQUE_ID_2:
308 case WM831X_UNIQUE_ID_3:
309 case WM831X_UNIQUE_ID_4:
310 case WM831X_UNIQUE_ID_5:
311 case WM831X_UNIQUE_ID_6:
312 case WM831X_UNIQUE_ID_7:
313 case WM831X_UNIQUE_ID_8:
314 case WM831X_FACTORY_OTP_ID:
315 case WM831X_FACTORY_OTP_1:
316 case WM831X_FACTORY_OTP_2:
317 case WM831X_FACTORY_OTP_3:
318 case WM831X_FACTORY_OTP_4:
319 case WM831X_FACTORY_OTP_5:
320 case WM831X_CUSTOMER_OTP_ID:
321 case WM831X_DC1_OTP_CONTROL:
322 case WM831X_DC2_OTP_CONTROL:
323 case WM831X_DC3_OTP_CONTROL:
324 case WM831X_LDO1_2_OTP_CONTROL:
325 case WM831X_LDO3_4_OTP_CONTROL:
326 case WM831X_LDO5_6_OTP_CONTROL:
327 case WM831X_LDO7_8_OTP_CONTROL:
328 case WM831X_LDO9_10_OTP_CONTROL:
329 case WM831X_LDO11_EPE_CONTROL:
330 case WM831X_GPIO1_OTP_CONTROL:
331 case WM831X_GPIO2_OTP_CONTROL:
332 case WM831X_GPIO3_OTP_CONTROL:
333 case WM831X_GPIO4_OTP_CONTROL:
334 case WM831X_GPIO5_OTP_CONTROL:
335 case WM831X_GPIO6_OTP_CONTROL:
336 case WM831X_DBE_CHECK_DATA:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static bool wm831x_reg_writeable(struct device *dev, unsigned int reg)
344{
345 struct wm831x *wm831x = dev_get_drvdata(dev);
346
347 if (wm831x_reg_locked(wm831x, reg))
348 return false;
349
350 switch (reg) {
351 case WM831X_SYSVDD_CONTROL:
352 case WM831X_THERMAL_MONITORING:
353 case WM831X_POWER_STATE:
354 case WM831X_WATCHDOG:
355 case WM831X_ON_PIN_CONTROL:
356 case WM831X_RESET_CONTROL:
357 case WM831X_CONTROL_INTERFACE:
358 case WM831X_SECURITY_KEY:
359 case WM831X_SOFTWARE_SCRATCH:
360 case WM831X_OTP_CONTROL:
361 case WM831X_GPIO_LEVEL:
362 case WM831X_INTERRUPT_STATUS_1:
363 case WM831X_INTERRUPT_STATUS_2:
364 case WM831X_INTERRUPT_STATUS_3:
365 case WM831X_INTERRUPT_STATUS_4:
366 case WM831X_INTERRUPT_STATUS_5:
367 case WM831X_IRQ_CONFIG:
368 case WM831X_SYSTEM_INTERRUPTS_MASK:
369 case WM831X_INTERRUPT_STATUS_1_MASK:
370 case WM831X_INTERRUPT_STATUS_2_MASK:
371 case WM831X_INTERRUPT_STATUS_3_MASK:
372 case WM831X_INTERRUPT_STATUS_4_MASK:
373 case WM831X_INTERRUPT_STATUS_5_MASK:
374 case WM831X_RTC_TIME_1:
375 case WM831X_RTC_TIME_2:
376 case WM831X_RTC_ALARM_1:
377 case WM831X_RTC_ALARM_2:
378 case WM831X_RTC_CONTROL:
379 case WM831X_RTC_TRIM:
380 case WM831X_TOUCH_CONTROL_1:
381 case WM831X_TOUCH_CONTROL_2:
382 case WM831X_AUXADC_CONTROL:
383 case WM831X_AUXADC_SOURCE:
384 case WM831X_COMPARATOR_CONTROL:
385 case WM831X_COMPARATOR_1:
386 case WM831X_COMPARATOR_2:
387 case WM831X_COMPARATOR_3:
388 case WM831X_COMPARATOR_4:
389 case WM831X_GPIO1_CONTROL:
390 case WM831X_GPIO2_CONTROL:
391 case WM831X_GPIO3_CONTROL:
392 case WM831X_GPIO4_CONTROL:
393 case WM831X_GPIO5_CONTROL:
394 case WM831X_GPIO6_CONTROL:
395 case WM831X_GPIO7_CONTROL:
396 case WM831X_GPIO8_CONTROL:
397 case WM831X_GPIO9_CONTROL:
398 case WM831X_GPIO10_CONTROL:
399 case WM831X_GPIO11_CONTROL:
400 case WM831X_GPIO12_CONTROL:
401 case WM831X_GPIO13_CONTROL:
402 case WM831X_GPIO14_CONTROL:
403 case WM831X_GPIO15_CONTROL:
404 case WM831X_GPIO16_CONTROL:
405 case WM831X_CHARGER_CONTROL_1:
406 case WM831X_CHARGER_CONTROL_2:
407 case WM831X_CHARGER_STATUS:
408 case WM831X_BACKUP_CHARGER_CONTROL:
409 case WM831X_STATUS_LED_1:
410 case WM831X_STATUS_LED_2:
411 case WM831X_CURRENT_SINK_1:
412 case WM831X_CURRENT_SINK_2:
413 case WM831X_DCDC_ENABLE:
414 case WM831X_LDO_ENABLE:
415 case WM831X_DC1_CONTROL_1:
416 case WM831X_DC1_CONTROL_2:
417 case WM831X_DC1_ON_CONFIG:
418 case WM831X_DC1_SLEEP_CONTROL:
419 case WM831X_DC1_DVS_CONTROL:
420 case WM831X_DC2_CONTROL_1:
421 case WM831X_DC2_CONTROL_2:
422 case WM831X_DC2_ON_CONFIG:
423 case WM831X_DC2_SLEEP_CONTROL:
424 case WM831X_DC2_DVS_CONTROL:
425 case WM831X_DC3_CONTROL_1:
426 case WM831X_DC3_CONTROL_2:
427 case WM831X_DC3_ON_CONFIG:
428 case WM831X_DC3_SLEEP_CONTROL:
429 case WM831X_DC4_CONTROL:
430 case WM831X_DC4_SLEEP_CONTROL:
431 case WM831X_EPE1_CONTROL:
432 case WM831X_EPE2_CONTROL:
433 case WM831X_LDO1_CONTROL:
434 case WM831X_LDO1_ON_CONTROL:
435 case WM831X_LDO1_SLEEP_CONTROL:
436 case WM831X_LDO2_CONTROL:
437 case WM831X_LDO2_ON_CONTROL:
438 case WM831X_LDO2_SLEEP_CONTROL:
439 case WM831X_LDO3_CONTROL:
440 case WM831X_LDO3_ON_CONTROL:
441 case WM831X_LDO3_SLEEP_CONTROL:
442 case WM831X_LDO4_CONTROL:
443 case WM831X_LDO4_ON_CONTROL:
444 case WM831X_LDO4_SLEEP_CONTROL:
445 case WM831X_LDO5_CONTROL:
446 case WM831X_LDO5_ON_CONTROL:
447 case WM831X_LDO5_SLEEP_CONTROL:
448 case WM831X_LDO6_CONTROL:
449 case WM831X_LDO6_ON_CONTROL:
450 case WM831X_LDO6_SLEEP_CONTROL:
451 case WM831X_LDO7_CONTROL:
452 case WM831X_LDO7_ON_CONTROL:
453 case WM831X_LDO7_SLEEP_CONTROL:
454 case WM831X_LDO8_CONTROL:
455 case WM831X_LDO8_ON_CONTROL:
456 case WM831X_LDO8_SLEEP_CONTROL:
457 case WM831X_LDO9_CONTROL:
458 case WM831X_LDO9_ON_CONTROL:
459 case WM831X_LDO9_SLEEP_CONTROL:
460 case WM831X_LDO10_CONTROL:
461 case WM831X_LDO10_ON_CONTROL:
462 case WM831X_LDO10_SLEEP_CONTROL:
463 case WM831X_LDO11_ON_CONTROL:
464 case WM831X_LDO11_SLEEP_CONTROL:
465 case WM831X_POWER_GOOD_SOURCE_1:
466 case WM831X_POWER_GOOD_SOURCE_2:
467 case WM831X_CLOCK_CONTROL_1:
468 case WM831X_CLOCK_CONTROL_2:
469 case WM831X_FLL_CONTROL_1:
470 case WM831X_FLL_CONTROL_2:
471 case WM831X_FLL_CONTROL_3:
472 case WM831X_FLL_CONTROL_4:
473 case WM831X_FLL_CONTROL_5:
474 return true;
475 default:
476 return false;
477 }
478}
479
480static bool wm831x_reg_volatile(struct device *dev, unsigned int reg)
481{
482 switch (reg) {
483 case WM831X_SYSTEM_STATUS:
484 case WM831X_ON_SOURCE:
485 case WM831X_OFF_SOURCE:
486 case WM831X_GPIO_LEVEL:
487 case WM831X_SYSTEM_INTERRUPTS:
488 case WM831X_INTERRUPT_STATUS_1:
489 case WM831X_INTERRUPT_STATUS_2:
490 case WM831X_INTERRUPT_STATUS_3:
491 case WM831X_INTERRUPT_STATUS_4:
492 case WM831X_INTERRUPT_STATUS_5:
493 case WM831X_RTC_TIME_1:
494 case WM831X_RTC_TIME_2:
495 case WM831X_TOUCH_DATA_X:
496 case WM831X_TOUCH_DATA_Y:
497 case WM831X_TOUCH_DATA_Z:
498 case WM831X_AUXADC_DATA:
499 case WM831X_CHARGER_STATUS:
500 case WM831X_DCDC_STATUS:
501 case WM831X_LDO_STATUS:
502 case WM831X_DCDC_UV_STATUS:
503 case WM831X_LDO_UV_STATUS:
504 return true;
505 default:
506 return false;
507 }
508}
509
d2bedfe7
MB		 510/**
511 * wm831x_reg_read: Read a single WM831x register.
512 *
513 * @wm831x: Device to read from.
514 * @reg: Register to read.
515 */
516int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
517{
1df5981b 518 unsigned int val;
d2bedfe7
MB		 519 int ret;
520
1df5981b 521 ret = regmap_read(wm831x->regmap, reg, &val);
d2bedfe7
MB		 522
523 if (ret < 0)
524 return ret;
525 else
526 return val;
527}
528EXPORT_SYMBOL_GPL(wm831x_reg_read);
529
530/**
531 * wm831x_bulk_read: Read multiple WM831x registers
532 *
533 * @wm831x: Device to read from
534 * @reg: First register
535 * @count: Number of registers
536 * @buf: Buffer to fill.
537 */
538int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
539 int count, u16 *buf)
540{
1df5981b 541 return regmap_bulk_read(wm831x->regmap, reg, buf, count);
d2bedfe7
MB		 542}
543EXPORT_SYMBOL_GPL(wm831x_bulk_read);
544
545static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
546 int bytes, void *src)
547{
548 u16 *buf = src;
1df5981b 549 int i, ret;
d2bedfe7
MB		 550
551 BUG_ON(bytes % 2);
552 BUG_ON(bytes <= 0);
553
554 for (i = 0; i < bytes / 2; i++) {
555 if (wm831x_reg_locked(wm831x, reg))
556 return -EPERM;
557
558 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
559 buf[i], reg + i, reg + i);
1df5981b 560 ret = regmap_write(wm831x->regmap, reg + i, buf[i]);
d2bedfe7
MB		 561 }
562
1df5981b 563 return 0;
d2bedfe7
MB		 564}
565
566/**
567 * wm831x_reg_write: Write a single WM831x register.
568 *
569 * @wm831x: Device to write to.
570 * @reg: Register to write to.
571 * @val: Value to write.
572 */
573int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
574 unsigned short val)
575{
576 int ret;
577
578 mutex_lock(&wm831x->io_lock);
579
580 ret = wm831x_write(wm831x, reg, 2, &val);
581
582 mutex_unlock(&wm831x->io_lock);
583
584 return ret;
585}
586EXPORT_SYMBOL_GPL(wm831x_reg_write);
587
588/**
589 * wm831x_set_bits: Set the value of a bitfield in a WM831x register
590 *
591 * @wm831x: Device to write to.
592 * @reg: Register to write to.
593 * @mask: Mask of bits to set.
594 * @val: Value to set (unshifted)
595 */
596int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
597 unsigned short mask, unsigned short val)
598{
599 int ret;
d2bedfe7
MB		 600
601 mutex_lock(&wm831x->io_lock);
602
1df5981b
MB		 603 if (!wm831x_reg_locked(wm831x, reg))
604 ret = regmap_update_bits(wm831x->regmap, reg, mask, val);
605 else
606 ret = -EPERM;
d2bedfe7 607
d2bedfe7
MB		 608 mutex_unlock(&wm831x->io_lock);
609
610 return ret;
611}
612EXPORT_SYMBOL_GPL(wm831x_set_bits);
613
614static struct resource wm831x_dcdc1_resources[] = {
615 {
616 .start = WM831X_DC1_CONTROL_1,
617 .end = WM831X_DC1_DVS_CONTROL,
618 .flags = IORESOURCE_IO,
619 },
620 {
621 .name = "UV",
622 .start = WM831X_IRQ_UV_DC1,
623 .end = WM831X_IRQ_UV_DC1,
624 .flags = IORESOURCE_IRQ,
625 },
626 {
627 .name = "HC",
628 .start = WM831X_IRQ_HC_DC1,
629 .end = WM831X_IRQ_HC_DC1,
630 .flags = IORESOURCE_IRQ,
631 },
632};
633
634
635static struct resource wm831x_dcdc2_resources[] = {
636 {
637 .start = WM831X_DC2_CONTROL_1,
638 .end = WM831X_DC2_DVS_CONTROL,
639 .flags = IORESOURCE_IO,
640 },
641 {
642 .name = "UV",
643 .start = WM831X_IRQ_UV_DC2,
644 .end = WM831X_IRQ_UV_DC2,
645 .flags = IORESOURCE_IRQ,
646 },
647 {
648 .name = "HC",
649 .start = WM831X_IRQ_HC_DC2,
650 .end = WM831X_IRQ_HC_DC2,
651 .flags = IORESOURCE_IRQ,
652 },
653};
654
655static struct resource wm831x_dcdc3_resources[] = {
656 {
657 .start = WM831X_DC3_CONTROL_1,
658 .end = WM831X_DC3_SLEEP_CONTROL,
659 .flags = IORESOURCE_IO,
660 },
661 {
662 .name = "UV",
663 .start = WM831X_IRQ_UV_DC3,
664 .end = WM831X_IRQ_UV_DC3,
665 .flags = IORESOURCE_IRQ,
666 },
667};
668
669static struct resource wm831x_dcdc4_resources[] = {
670 {
671 .start = WM831X_DC4_CONTROL,
672 .end = WM831X_DC4_SLEEP_CONTROL,
673 .flags = IORESOURCE_IO,
674 },
675 {
676 .name = "UV",
677 .start = WM831X_IRQ_UV_DC4,
678 .end = WM831X_IRQ_UV_DC4,
679 .flags = IORESOURCE_IRQ,
680 },
681};
682
d4e0a89e
MB		 683static struct resource wm8320_dcdc4_buck_resources[] = {
684 {
685 .start = WM831X_DC4_CONTROL,
686 .end = WM832X_DC4_SLEEP_CONTROL,
687 .flags = IORESOURCE_IO,
688 },
689 {
690 .name = "UV",
691 .start = WM831X_IRQ_UV_DC4,
692 .end = WM831X_IRQ_UV_DC4,
693 .flags = IORESOURCE_IRQ,
694 },
695};
696
d2bedfe7
MB		 697static struct resource wm831x_gpio_resources[] = {
698 {
699 .start = WM831X_IRQ_GPIO_1,
700 .end = WM831X_IRQ_GPIO_16,
701 .flags = IORESOURCE_IRQ,
702 },
703};
704
705static struct resource wm831x_isink1_resources[] = {
706 {
707 .start = WM831X_CURRENT_SINK_1,
708 .end = WM831X_CURRENT_SINK_1,
709 .flags = IORESOURCE_IO,
710 },
711 {
712 .start = WM831X_IRQ_CS1,
713 .end = WM831X_IRQ_CS1,
714 .flags = IORESOURCE_IRQ,
715 },
716};
717
718static struct resource wm831x_isink2_resources[] = {
719 {
720 .start = WM831X_CURRENT_SINK_2,
721 .end = WM831X_CURRENT_SINK_2,
722 .flags = IORESOURCE_IO,
723 },
724 {
725 .start = WM831X_IRQ_CS2,
726 .end = WM831X_IRQ_CS2,
727 .flags = IORESOURCE_IRQ,
728 },
729};
730
731static struct resource wm831x_ldo1_resources[] = {
732 {
733 .start = WM831X_LDO1_CONTROL,
734 .end = WM831X_LDO1_SLEEP_CONTROL,
735 .flags = IORESOURCE_IO,
736 },
737 {
738 .name = "UV",
739 .start = WM831X_IRQ_UV_LDO1,
740 .end = WM831X_IRQ_UV_LDO1,
741 .flags = IORESOURCE_IRQ,
742 },
743};
744
745static struct resource wm831x_ldo2_resources[] = {
746 {
747 .start = WM831X_LDO2_CONTROL,
748 .end = WM831X_LDO2_SLEEP_CONTROL,
749 .flags = IORESOURCE_IO,
750 },
751 {
752 .name = "UV",
753 .start = WM831X_IRQ_UV_LDO2,
754 .end = WM831X_IRQ_UV_LDO2,
755 .flags = IORESOURCE_IRQ,
756 },
757};
758
759static struct resource wm831x_ldo3_resources[] = {
760 {
761 .start = WM831X_LDO3_CONTROL,
762 .end = WM831X_LDO3_SLEEP_CONTROL,
763 .flags = IORESOURCE_IO,
764 },
765 {
766 .name = "UV",
767 .start = WM831X_IRQ_UV_LDO3,
768 .end = WM831X_IRQ_UV_LDO3,
769 .flags = IORESOURCE_IRQ,
770 },
771};
772
773static struct resource wm831x_ldo4_resources[] = {
774 {
775 .start = WM831X_LDO4_CONTROL,
776 .end = WM831X_LDO4_SLEEP_CONTROL,
777 .flags = IORESOURCE_IO,
778 },
779 {
780 .name = "UV",
781 .start = WM831X_IRQ_UV_LDO4,
782 .end = WM831X_IRQ_UV_LDO4,
783 .flags = IORESOURCE_IRQ,
784 },
785};
786
787static struct resource wm831x_ldo5_resources[] = {
788 {
789 .start = WM831X_LDO5_CONTROL,
790 .end = WM831X_LDO5_SLEEP_CONTROL,
791 .flags = IORESOURCE_IO,
792 },
793 {
794 .name = "UV",
795 .start = WM831X_IRQ_UV_LDO5,
796 .end = WM831X_IRQ_UV_LDO5,
797 .flags = IORESOURCE_IRQ,
798 },
799};
800
801static struct resource wm831x_ldo6_resources[] = {
802 {
803 .start = WM831X_LDO6_CONTROL,
804 .end = WM831X_LDO6_SLEEP_CONTROL,
805 .flags = IORESOURCE_IO,
806 },
807 {
808 .name = "UV",
809 .start = WM831X_IRQ_UV_LDO6,
810 .end = WM831X_IRQ_UV_LDO6,
811 .flags = IORESOURCE_IRQ,
812 },
813};
814
815static struct resource wm831x_ldo7_resources[] = {
816 {
817 .start = WM831X_LDO7_CONTROL,
818 .end = WM831X_LDO7_SLEEP_CONTROL,
819 .flags = IORESOURCE_IO,
820 },
821 {
822 .name = "UV",
823 .start = WM831X_IRQ_UV_LDO7,
824 .end = WM831X_IRQ_UV_LDO7,
825 .flags = IORESOURCE_IRQ,
826 },
827};
828
829static struct resource wm831x_ldo8_resources[] = {
830 {
831 .start = WM831X_LDO8_CONTROL,
832 .end = WM831X_LDO8_SLEEP_CONTROL,
833 .flags = IORESOURCE_IO,
834 },
835 {
836 .name = "UV",
837 .start = WM831X_IRQ_UV_LDO8,
838 .end = WM831X_IRQ_UV_LDO8,
839 .flags = IORESOURCE_IRQ,
840 },
841};
842
843static struct resource wm831x_ldo9_resources[] = {
844 {
845 .start = WM831X_LDO9_CONTROL,
846 .end = WM831X_LDO9_SLEEP_CONTROL,
847 .flags = IORESOURCE_IO,
848 },
849 {
850 .name = "UV",
851 .start = WM831X_IRQ_UV_LDO9,
852 .end = WM831X_IRQ_UV_LDO9,
853 .flags = IORESOURCE_IRQ,
854 },
855};
856
857static struct resource wm831x_ldo10_resources[] = {
858 {
859 .start = WM831X_LDO10_CONTROL,
860 .end = WM831X_LDO10_SLEEP_CONTROL,
861 .flags = IORESOURCE_IO,
862 },
863 {
864 .name = "UV",
865 .start = WM831X_IRQ_UV_LDO10,
866 .end = WM831X_IRQ_UV_LDO10,
867 .flags = IORESOURCE_IRQ,
868 },
869};
870
871static struct resource wm831x_ldo11_resources[] = {
872 {
873 .start = WM831X_LDO11_ON_CONTROL,
874 .end = WM831X_LDO11_SLEEP_CONTROL,
875 .flags = IORESOURCE_IO,
876 },
877};
878
879static struct resource wm831x_on_resources[] = {
880 {
881 .start = WM831X_IRQ_ON,
882 .end = WM831X_IRQ_ON,
883 .flags = IORESOURCE_IRQ,
884 },
885};
886
887
888static struct resource wm831x_power_resources[] = {
889 {
890 .name = "SYSLO",
891 .start = WM831X_IRQ_PPM_SYSLO,
892 .end = WM831X_IRQ_PPM_SYSLO,
893 .flags = IORESOURCE_IRQ,
894 },
895 {
896 .name = "PWR SRC",
897 .start = WM831X_IRQ_PPM_PWR_SRC,
898 .end = WM831X_IRQ_PPM_PWR_SRC,
899 .flags = IORESOURCE_IRQ,
900 },
901 {
902 .name = "USB CURR",
903 .start = WM831X_IRQ_PPM_USB_CURR,
904 .end = WM831X_IRQ_PPM_USB_CURR,
905 .flags = IORESOURCE_IRQ,
906 },
907 {
908 .name = "BATT HOT",
909 .start = WM831X_IRQ_CHG_BATT_HOT,
910 .end = WM831X_IRQ_CHG_BATT_HOT,
911 .flags = IORESOURCE_IRQ,
912 },
913 {
914 .name = "BATT COLD",
915 .start = WM831X_IRQ_CHG_BATT_COLD,
916 .end = WM831X_IRQ_CHG_BATT_COLD,
917 .flags = IORESOURCE_IRQ,
918 },
919 {
920 .name = "BATT FAIL",
921 .start = WM831X_IRQ_CHG_BATT_FAIL,
922 .end = WM831X_IRQ_CHG_BATT_FAIL,
923 .flags = IORESOURCE_IRQ,
924 },
925 {
926 .name = "OV",
927 .start = WM831X_IRQ_CHG_OV,
928 .end = WM831X_IRQ_CHG_OV,
929 .flags = IORESOURCE_IRQ,
930 },
931 {
932 .name = "END",
933 .start = WM831X_IRQ_CHG_END,
934 .end = WM831X_IRQ_CHG_END,
935 .flags = IORESOURCE_IRQ,
936 },
937 {
938 .name = "TO",
939 .start = WM831X_IRQ_CHG_TO,
940 .end = WM831X_IRQ_CHG_TO,
941 .flags = IORESOURCE_IRQ,
942 },
943 {
944 .name = "MODE",
945 .start = WM831X_IRQ_CHG_MODE,
946 .end = WM831X_IRQ_CHG_MODE,
947 .flags = IORESOURCE_IRQ,
948 },
949 {
950 .name = "START",
951 .start = WM831X_IRQ_CHG_START,
952 .end = WM831X_IRQ_CHG_START,
953 .flags = IORESOURCE_IRQ,
954 },
955};
956
957static struct resource wm831x_rtc_resources[] = {
958 {
959 .name = "PER",
960 .start = WM831X_IRQ_RTC_PER,
961 .end = WM831X_IRQ_RTC_PER,
962 .flags = IORESOURCE_IRQ,
963 },
964 {
965 .name = "ALM",
966 .start = WM831X_IRQ_RTC_ALM,
967 .end = WM831X_IRQ_RTC_ALM,
968 .flags = IORESOURCE_IRQ,
969 },
970};
971
972static struct resource wm831x_status1_resources[] = {
973 {
974 .start = WM831X_STATUS_LED_1,
975 .end = WM831X_STATUS_LED_1,
976 .flags = IORESOURCE_IO,
977 },
978};
979
980static struct resource wm831x_status2_resources[] = {
981 {
982 .start = WM831X_STATUS_LED_2,
983 .end = WM831X_STATUS_LED_2,
984 .flags = IORESOURCE_IO,
985 },
986};
987
988static struct resource wm831x_touch_resources[] = {
989 {
990 .name = "TCHPD",
991 .start = WM831X_IRQ_TCHPD,
992 .end = WM831X_IRQ_TCHPD,
993 .flags = IORESOURCE_IRQ,
994 },
995 {
996 .name = "TCHDATA",
997 .start = WM831X_IRQ_TCHDATA,
998 .end = WM831X_IRQ_TCHDATA,
999 .flags = IORESOURCE_IRQ,
1000 },
1001};
1002
1003static struct resource wm831x_wdt_resources[] = {
1004 {
1005 .start = WM831X_IRQ_WDOG_TO,
1006 .end = WM831X_IRQ_WDOG_TO,
1007 .flags = IORESOURCE_IRQ,
1008 },
1009};
1010
1011static struct mfd_cell wm8310_devs[] = {
c26964ea
MB		 1012 {
1013 .name = "wm831x-backup",
1014 },
d2bedfe7
MB		 1015 {
1016 .name = "wm831x-buckv",
1017 .id = 1,
1018 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1019 .resources = wm831x_dcdc1_resources,
1020 },
1021 {
1022 .name = "wm831x-buckv",
1023 .id = 2,
1024 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1025 .resources = wm831x_dcdc2_resources,
1026 },
1027 {
1028 .name = "wm831x-buckp",
1029 .id = 3,
1030 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1031 .resources = wm831x_dcdc3_resources,
1032 },
1033 {
1034 .name = "wm831x-boostp",
1035 .id = 4,
1036 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1037 .resources = wm831x_dcdc4_resources,
1038 },
a5e06781
MB		 1039 {
1040 .name = "wm831x-clk",
1041 },
d2bedfe7
MB		 1042 {
1043 .name = "wm831x-epe",
1044 .id = 1,
1045 },
1046 {
1047 .name = "wm831x-epe",
1048 .id = 2,
1049 },
1050 {
1051 .name = "wm831x-gpio",
1052 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1053 .resources = wm831x_gpio_resources,
1054 },
1055 {
1056 .name = "wm831x-hwmon",
1057 },
1058 {
1059 .name = "wm831x-isink",
1060 .id = 1,
1061 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1062 .resources = wm831x_isink1_resources,
1063 },
1064 {
1065 .name = "wm831x-isink",
1066 .id = 2,
1067 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1068 .resources = wm831x_isink2_resources,
1069 },
1070 {
1071 .name = "wm831x-ldo",
1072 .id = 1,
1073 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1074 .resources = wm831x_ldo1_resources,
1075 },
1076 {
1077 .name = "wm831x-ldo",
1078 .id = 2,
1079 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1080 .resources = wm831x_ldo2_resources,
1081 },
1082 {
1083 .name = "wm831x-ldo",
1084 .id = 3,
1085 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1086 .resources = wm831x_ldo3_resources,
1087 },
1088 {
1089 .name = "wm831x-ldo",
1090 .id = 4,
1091 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1092 .resources = wm831x_ldo4_resources,
1093 },
1094 {
1095 .name = "wm831x-ldo",
1096 .id = 5,
1097 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1098 .resources = wm831x_ldo5_resources,
1099 },
1100 {
1101 .name = "wm831x-ldo",
1102 .id = 6,
1103 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1104 .resources = wm831x_ldo6_resources,
1105 },
1106 {
1107 .name = "wm831x-aldo",
1108 .id = 7,
1109 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1110 .resources = wm831x_ldo7_resources,
1111 },
1112 {
1113 .name = "wm831x-aldo",
1114 .id = 8,
1115 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1116 .resources = wm831x_ldo8_resources,
1117 },
1118 {
1119 .name = "wm831x-aldo",
1120 .id = 9,
1121 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1122 .resources = wm831x_ldo9_resources,
1123 },
1124 {
1125 .name = "wm831x-aldo",
1126 .id = 10,
1127 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1128 .resources = wm831x_ldo10_resources,
1129 },
1130 {
1131 .name = "wm831x-alive-ldo",
1132 .id = 11,
1133 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1134 .resources = wm831x_ldo11_resources,
1135 },
1136 {
1137 .name = "wm831x-on",
1138 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1139 .resources = wm831x_on_resources,
1140 },
1141 {
1142 .name = "wm831x-power",
1143 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1144 .resources = wm831x_power_resources,
1145 },
d2bedfe7
MB		 1146 {
1147 .name = "wm831x-status",
1148 .id = 1,
1149 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1150 .resources = wm831x_status1_resources,
1151 },
1152 {
1153 .name = "wm831x-status",
1154 .id = 2,
1155 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1156 .resources = wm831x_status2_resources,
1157 },
1158 {
1159 .name = "wm831x-watchdog",
1160 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1161 .resources = wm831x_wdt_resources,
1162 },
1163};
1164
1165static struct mfd_cell wm8311_devs[] = {
c26964ea
MB		 1166 {
1167 .name = "wm831x-backup",
1168 },
d2bedfe7
MB		 1169 {
1170 .name = "wm831x-buckv",
1171 .id = 1,
1172 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1173 .resources = wm831x_dcdc1_resources,
1174 },
1175 {
1176 .name = "wm831x-buckv",
1177 .id = 2,
1178 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1179 .resources = wm831x_dcdc2_resources,
1180 },
1181 {
1182 .name = "wm831x-buckp",
1183 .id = 3,
1184 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1185 .resources = wm831x_dcdc3_resources,
1186 },
1187 {
1188 .name = "wm831x-boostp",
1189 .id = 4,
1190 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1191 .resources = wm831x_dcdc4_resources,
1192 },
a5e06781
MB		 1193 {
1194 .name = "wm831x-clk",
1195 },
d2bedfe7
MB		 1196 {
1197 .name = "wm831x-epe",
1198 .id = 1,
1199 },
1200 {
1201 .name = "wm831x-epe",
1202 .id = 2,
1203 },
1204 {
1205 .name = "wm831x-gpio",
1206 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1207 .resources = wm831x_gpio_resources,
1208 },
1209 {
1210 .name = "wm831x-hwmon",
1211 },
1212 {
1213 .name = "wm831x-isink",
1214 .id = 1,
1215 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1216 .resources = wm831x_isink1_resources,
1217 },
1218 {
1219 .name = "wm831x-isink",
1220 .id = 2,
1221 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1222 .resources = wm831x_isink2_resources,
1223 },
1224 {
1225 .name = "wm831x-ldo",
1226 .id = 1,
1227 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1228 .resources = wm831x_ldo1_resources,
1229 },
1230 {
1231 .name = "wm831x-ldo",
1232 .id = 2,
1233 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1234 .resources = wm831x_ldo2_resources,
1235 },
1236 {
1237 .name = "wm831x-ldo",
1238 .id = 3,
1239 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1240 .resources = wm831x_ldo3_resources,
1241 },
1242 {
1243 .name = "wm831x-ldo",
1244 .id = 4,
1245 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1246 .resources = wm831x_ldo4_resources,
1247 },
1248 {
1249 .name = "wm831x-ldo",
1250 .id = 5,
1251 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1252 .resources = wm831x_ldo5_resources,
1253 },
1254 {
1255 .name = "wm831x-aldo",
1256 .id = 7,
1257 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1258 .resources = wm831x_ldo7_resources,
1259 },
1260 {
1261 .name = "wm831x-alive-ldo",
1262 .id = 11,
1263 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1264 .resources = wm831x_ldo11_resources,
1265 },
1266 {
1267 .name = "wm831x-on",
1268 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1269 .resources = wm831x_on_resources,
1270 },
1271 {
1272 .name = "wm831x-power",
1273 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1274 .resources = wm831x_power_resources,
1275 },
d2bedfe7
MB		 1276 {
1277 .name = "wm831x-status",
1278 .id = 1,
1279 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1280 .resources = wm831x_status1_resources,
1281 },
1282 {
1283 .name = "wm831x-status",
1284 .id = 2,
1285 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1286 .resources = wm831x_status2_resources,
1287 },
d2bedfe7
MB		 1288 {
1289 .name = "wm831x-watchdog",
1290 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1291 .resources = wm831x_wdt_resources,
1292 },
1293};
1294
1295static struct mfd_cell wm8312_devs[] = {
c26964ea
MB		 1296 {
1297 .name = "wm831x-backup",
1298 },
d2bedfe7
MB		 1299 {
1300 .name = "wm831x-buckv",
1301 .id = 1,
1302 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1303 .resources = wm831x_dcdc1_resources,
1304 },
1305 {
1306 .name = "wm831x-buckv",
1307 .id = 2,
1308 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1309 .resources = wm831x_dcdc2_resources,
1310 },
1311 {
1312 .name = "wm831x-buckp",
1313 .id = 3,
1314 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1315 .resources = wm831x_dcdc3_resources,
1316 },
1317 {
1318 .name = "wm831x-boostp",
1319 .id = 4,
1320 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1321 .resources = wm831x_dcdc4_resources,
1322 },
a5e06781
MB		 1323 {
1324 .name = "wm831x-clk",
1325 },
d2bedfe7
MB		 1326 {
1327 .name = "wm831x-epe",
1328 .id = 1,
1329 },
1330 {
1331 .name = "wm831x-epe",
1332 .id = 2,
1333 },
1334 {
1335 .name = "wm831x-gpio",
1336 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1337 .resources = wm831x_gpio_resources,
1338 },
1339 {
1340 .name = "wm831x-hwmon",
1341 },
1342 {
1343 .name = "wm831x-isink",
1344 .id = 1,
1345 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1346 .resources = wm831x_isink1_resources,
1347 },
1348 {
1349 .name = "wm831x-isink",
1350 .id = 2,
1351 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1352 .resources = wm831x_isink2_resources,
1353 },
1354 {
1355 .name = "wm831x-ldo",
1356 .id = 1,
1357 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1358 .resources = wm831x_ldo1_resources,
1359 },
1360 {
1361 .name = "wm831x-ldo",
1362 .id = 2,
1363 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1364 .resources = wm831x_ldo2_resources,
1365 },
1366 {
1367 .name = "wm831x-ldo",
1368 .id = 3,
1369 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1370 .resources = wm831x_ldo3_resources,
1371 },
1372 {
1373 .name = "wm831x-ldo",
1374 .id = 4,
1375 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1376 .resources = wm831x_ldo4_resources,
1377 },
1378 {
1379 .name = "wm831x-ldo",
1380 .id = 5,
1381 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1382 .resources = wm831x_ldo5_resources,
1383 },
1384 {
1385 .name = "wm831x-ldo",
1386 .id = 6,
1387 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1388 .resources = wm831x_ldo6_resources,
1389 },
1390 {
1391 .name = "wm831x-aldo",
1392 .id = 7,
1393 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1394 .resources = wm831x_ldo7_resources,
1395 },
1396 {
1397 .name = "wm831x-aldo",
1398 .id = 8,
1399 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1400 .resources = wm831x_ldo8_resources,
1401 },
1402 {
1403 .name = "wm831x-aldo",
1404 .id = 9,
1405 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1406 .resources = wm831x_ldo9_resources,
1407 },
1408 {
1409 .name = "wm831x-aldo",
1410 .id = 10,
1411 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1412 .resources = wm831x_ldo10_resources,
1413 },
1414 {
1415 .name = "wm831x-alive-ldo",
1416 .id = 11,
1417 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1418 .resources = wm831x_ldo11_resources,
1419 },
1420 {
1421 .name = "wm831x-on",
1422 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1423 .resources = wm831x_on_resources,
1424 },
1425 {
1426 .name = "wm831x-power",
1427 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1428 .resources = wm831x_power_resources,
1429 },
d2bedfe7
MB		 1430 {
1431 .name = "wm831x-status",
1432 .id = 1,
1433 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1434 .resources = wm831x_status1_resources,
1435 },
1436 {
1437 .name = "wm831x-status",
1438 .id = 2,
1439 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1440 .resources = wm831x_status2_resources,
1441 },
d2bedfe7
MB		 1442 {
1443 .name = "wm831x-watchdog",
1444 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1445 .resources = wm831x_wdt_resources,
1446 },
1447};
1448
d4e0a89e
MB		 1449static struct mfd_cell wm8320_devs[] = {
1450 {
1451 .name = "wm831x-backup",
1452 },
1453 {
1454 .name = "wm831x-buckv",
1455 .id = 1,
1456 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1457 .resources = wm831x_dcdc1_resources,
1458 },
1459 {
1460 .name = "wm831x-buckv",
1461 .id = 2,
1462 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1463 .resources = wm831x_dcdc2_resources,
1464 },
1465 {
1466 .name = "wm831x-buckp",
1467 .id = 3,
1468 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1469 .resources = wm831x_dcdc3_resources,
1470 },
1471 {
1472 .name = "wm831x-buckp",
1473 .id = 4,
1474 .num_resources = ARRAY_SIZE(wm8320_dcdc4_buck_resources),
1475 .resources = wm8320_dcdc4_buck_resources,
1476 },
a5e06781
MB		 1477 {
1478 .name = "wm831x-clk",
1479 },
d4e0a89e
MB		 1480 {
1481 .name = "wm831x-gpio",
1482 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1483 .resources = wm831x_gpio_resources,
1484 },
1485 {
1486 .name = "wm831x-hwmon",
1487 },
1488 {
1489 .name = "wm831x-ldo",
1490 .id = 1,
1491 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1492 .resources = wm831x_ldo1_resources,
1493 },
1494 {
1495 .name = "wm831x-ldo",
1496 .id = 2,
1497 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1498 .resources = wm831x_ldo2_resources,
1499 },
1500 {
1501 .name = "wm831x-ldo",
1502 .id = 3,
1503 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1504 .resources = wm831x_ldo3_resources,
1505 },
1506 {
1507 .name = "wm831x-ldo",
1508 .id = 4,
1509 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1510 .resources = wm831x_ldo4_resources,
1511 },
1512 {
1513 .name = "wm831x-ldo",
1514 .id = 5,
1515 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1516 .resources = wm831x_ldo5_resources,
1517 },
1518 {
1519 .name = "wm831x-ldo",
1520 .id = 6,
1521 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1522 .resources = wm831x_ldo6_resources,
1523 },
1524 {
1525 .name = "wm831x-aldo",
1526 .id = 7,
1527 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1528 .resources = wm831x_ldo7_resources,
1529 },
1530 {
1531 .name = "wm831x-aldo",
1532 .id = 8,
1533 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1534 .resources = wm831x_ldo8_resources,
1535 },
1536 {
1537 .name = "wm831x-aldo",
1538 .id = 9,
1539 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1540 .resources = wm831x_ldo9_resources,
1541 },
1542 {
1543 .name = "wm831x-aldo",
1544 .id = 10,
1545 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1546 .resources = wm831x_ldo10_resources,
1547 },
1548 {
1549 .name = "wm831x-alive-ldo",
1550 .id = 11,
1551 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1552 .resources = wm831x_ldo11_resources,
1553 },
1554 {
1555 .name = "wm831x-on",
1556 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1557 .resources = wm831x_on_resources,
1558 },
d4e0a89e
MB		 1559 {
1560 .name = "wm831x-status",
1561 .id = 1,
1562 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1563 .resources = wm831x_status1_resources,
1564 },
1565 {
1566 .name = "wm831x-status",
1567 .id = 2,
1568 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1569 .resources = wm831x_status2_resources,
1570 },
1571 {
1572 .name = "wm831x-watchdog",
1573 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1574 .resources = wm831x_wdt_resources,
1575 },
1576};
1577
266a5e02
MB		 1578static struct mfd_cell touch_devs[] = {
1579 {
1580 .name = "wm831x-touch",
1581 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1582 .resources = wm831x_touch_resources,
1583 },
1584};
1585
b9d03d99
MB		 1586static struct mfd_cell rtc_devs[] = {
1587 {
1588 .name = "wm831x-rtc",
1589 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1590 .resources = wm831x_rtc_resources,
1591 },
1592};
266a5e02 1593
63aed85e
MB		 1594static struct mfd_cell backlight_devs[] = {
1595 {
1596 .name = "wm831x-backlight",
1597 },
1598};
1599
1df5981b
MB		 1600struct regmap_config wm831x_regmap_config = {
1601 .reg_bits = 16,
1602 .val_bits = 16,
2e47fff1
MB		 1603
1604 .max_register = WM831X_DBE_CHECK_DATA,
1605 .readable_reg = wm831x_reg_readable,
1606 .writeable_reg = wm831x_reg_writeable,
1607 .volatile_reg = wm831x_reg_volatile,
1df5981b
MB		 1608};
1609EXPORT_SYMBOL_GPL(wm831x_regmap_config);
1610
d2bedfe7
MB		 1611/*
1612 * Instantiate the generic non-control parts of the device.
1613 */
e5b48684 1614int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
d2bedfe7
MB		 1615{
1616 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
eb503dc1 1617 int rev, wm831x_num;
d2bedfe7 1618 enum wm831x_parent parent;
0b14c22e 1619 int ret, i;
d2bedfe7
MB		 1620
1621 mutex_init(&wm831x->io_lock);
1622 mutex_init(&wm831x->key_lock);
1623 dev_set_drvdata(wm831x->dev, wm831x);
1624
1625 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1626 if (ret < 0) {
1627 dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
1df5981b 1628 goto err_regmap;
d2bedfe7 1629 }
b93cef55
MB		 1630 switch (ret) {
1631 case 0x6204:
1632 case 0x6246:
1633 break;
1634 default:
d2bedfe7
MB		 1635 dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1636 ret = -EINVAL;
1df5981b 1637 goto err_regmap;
d2bedfe7
MB		 1638 }
1639
1640 ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1641 if (ret < 0) {
1642 dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
1df5981b 1643 goto err_regmap;
d2bedfe7
MB		 1644 }
1645 rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1646
1647 ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1648 if (ret < 0) {
1649 dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
1df5981b 1650 goto err_regmap;
d2bedfe7
MB		 1651 }
1652
894362f5
MB		 1653 /* Some engineering samples do not have the ID set, rely on
1654 * the device being registered correctly.
1655 */
1656 if (ret == 0) {
1657 dev_info(wm831x->dev, "Device is an engineering sample\n");
1658 ret = id;
1659 }
1660
d2bedfe7 1661 switch (ret) {
894362f5 1662 case WM8310:
d2bedfe7 1663 parent = WM8310;
6f2ecaae 1664 wm831x->num_gpio = 16;
b03b4d7c 1665 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1666 if (rev > 0) {
1667 wm831x->has_gpio_ena = 1;
1668 wm831x->has_cs_sts = 1;
1669 }
1670
894362f5 1671 dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1672 break;
1673
894362f5 1674 case WM8311:
d2bedfe7 1675 parent = WM8311;
6f2ecaae 1676 wm831x->num_gpio = 16;
b03b4d7c 1677 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1678 if (rev > 0) {
1679 wm831x->has_gpio_ena = 1;
1680 wm831x->has_cs_sts = 1;
1681 }
1682
894362f5 1683 dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1684 break;
1685
894362f5 1686 case WM8312:
d2bedfe7 1687 parent = WM8312;
6f2ecaae 1688 wm831x->num_gpio = 16;
b03b4d7c 1689 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1690 if (rev > 0) {
1691 wm831x->has_gpio_ena = 1;
1692 wm831x->has_cs_sts = 1;
1693 }
1694
894362f5 1695 dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1696 break;
1697
d4e0a89e
MB		 1698 case WM8320:
1699 parent = WM8320;
1700 wm831x->num_gpio = 12;
1701 dev_info(wm831x->dev, "WM8320 revision %c\n", 'A' + rev);
1702 break;
1703
88913521
MB		 1704 case WM8321:
1705 parent = WM8321;
1706 wm831x->num_gpio = 12;
1707 dev_info(wm831x->dev, "WM8321 revision %c\n", 'A' + rev);
1708 break;
1709
0b315884
MB		 1710 case WM8325:
1711 parent = WM8325;
1712 wm831x->num_gpio = 12;
1713 dev_info(wm831x->dev, "WM8325 revision %c\n", 'A' + rev);
1714 break;
1715
412dc11d
MB		 1716 case WM8326:
1717 parent = WM8326;
1718 wm831x->num_gpio = 12;
1719 dev_info(wm831x->dev, "WM8326 revision %c\n", 'A' + rev);
1720 break;
1721
d2bedfe7
MB		 1722 default:
1723 dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1724 ret = -EINVAL;
1df5981b 1725 goto err_regmap;
d2bedfe7
MB		 1726 }
1727
1728 /* This will need revisiting in future but is OK for all
1729 * current parts.
1730 */
1731 if (parent != id)
894362f5 1732 dev_warn(wm831x->dev, "Device was registered as a WM%lx\n",
d2bedfe7
MB		 1733 id);
1734
1735 /* Bootstrap the user key */
1736 ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1737 if (ret < 0) {
1738 dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
1df5981b 1739 goto err_regmap;
d2bedfe7
MB		 1740 }
1741 if (ret != 0) {
1742 dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1743 ret);
1744 wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1745 }
1746 wm831x->locked = 1;
1747
1748 if (pdata && pdata->pre_init) {
1749 ret = pdata->pre_init(wm831x);
1750 if (ret != 0) {
1751 dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
1df5981b 1752 goto err_regmap;
d2bedfe7
MB		 1753 }
1754 }
1755
0b14c22e
MB		 1756 if (pdata) {
1757 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
1758 if (!pdata->gpio_defaults[i])
1759 continue;
1760
1761 wm831x_reg_write(wm831x,
1762 WM831X_GPIO1_CONTROL + i,
1763 pdata->gpio_defaults[i] & 0xffff);
1764 }
1765 }
1766
eb503dc1
MB		 1767 /* Multiply by 10 as we have many subdevices of the same type */
1768 if (pdata && pdata->wm831x_num)
1769 wm831x_num = pdata->wm831x_num * 10;
1770 else
1771 wm831x_num = -1;
1772
7d4d0a3e
MB		 1773 ret = wm831x_irq_init(wm831x, irq);
1774 if (ret != 0)
1df5981b 1775 goto err_regmap;
7d4d0a3e 1776
e69b6de1 1777 wm831x_auxadc_init(wm831x);
473fe736 1778
d2bedfe7
MB		 1779 /* The core device is up, instantiate the subdevices. */
1780 switch (parent) {
1781 case WM8310:
eb503dc1 1782 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1783 wm8310_devs, ARRAY_SIZE(wm8310_devs),
5fb4d38b 1784 NULL, wm831x->irq_base);
d2bedfe7
MB		 1785 break;
1786
1787 case WM8311:
eb503dc1 1788 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1789 wm8311_devs, ARRAY_SIZE(wm8311_devs),
5fb4d38b 1790 NULL, wm831x->irq_base);
266a5e02
MB		 1791 if (!pdata || !pdata->disable_touch)
1792 mfd_add_devices(wm831x->dev, wm831x_num,
1793 touch_devs, ARRAY_SIZE(touch_devs),
1794 NULL, wm831x->irq_base);
d2bedfe7
MB		 1795 break;
1796
1797 case WM8312:
eb503dc1 1798 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1799 wm8312_devs, ARRAY_SIZE(wm8312_devs),
5fb4d38b 1800 NULL, wm831x->irq_base);
266a5e02
MB		 1801 if (!pdata || !pdata->disable_touch)
1802 mfd_add_devices(wm831x->dev, wm831x_num,
1803 touch_devs, ARRAY_SIZE(touch_devs),
1804 NULL, wm831x->irq_base);
d2bedfe7
MB		 1805 break;
1806
d4e0a89e 1807 case WM8320:
88913521 1808 case WM8321:
0b315884 1809 case WM8325:
412dc11d 1810 case WM8326:
eb503dc1 1811 ret = mfd_add_devices(wm831x->dev, wm831x_num,
0b315884 1812 wm8320_devs, ARRAY_SIZE(wm8320_devs),
bd7c72ed 1813 NULL, wm831x->irq_base);
0b315884
MB		 1814 break;
1815
d2bedfe7
MB		 1816 default:
1817 /* If this happens the bus probe function is buggy */
1818 BUG();
1819 }
1820
1821 if (ret != 0) {
1822 dev_err(wm831x->dev, "Failed to add children\n");
7d4d0a3e 1823 goto err_irq;
d2bedfe7
MB		 1824 }
1825
b9d03d99
MB		 1826 /* The RTC can only be used if the 32.768kHz crystal is
1827 * enabled; this can't be controlled by software at runtime.
1828 */
1829 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1830 if (ret < 0) {
1831 dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1832 goto err_irq;
1833 }
1834
1835 if (ret & WM831X_XTAL_ENA) {
1836 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1837 rtc_devs, ARRAY_SIZE(rtc_devs),
1838 NULL, wm831x->irq_base);
1839 if (ret != 0) {
1840 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1841 goto err_irq;
1842 }
1843 } else {
1844 dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1845 }
1846
63aed85e
MB		 1847 if (pdata && pdata->backlight) {
1848 /* Treat errors as non-critical */
eb503dc1 1849 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
5fb4d38b
MB		 1850 ARRAY_SIZE(backlight_devs), NULL,
1851 wm831x->irq_base);
63aed85e
MB		 1852 if (ret < 0)
1853 dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1854 ret);
1855 }
1856
6704e517
MB		 1857 wm831x_otp_init(wm831x);
1858
d2bedfe7
MB		 1859 if (pdata && pdata->post_init) {
1860 ret = pdata->post_init(wm831x);
1861 if (ret != 0) {
1862 dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
7d4d0a3e 1863 goto err_irq;
d2bedfe7
MB		 1864 }
1865 }
1866
1867 return 0;
1868
7d4d0a3e
MB		 1869err_irq:
1870 wm831x_irq_exit(wm831x);
1df5981b 1871err_regmap:
d2bedfe7 1872 mfd_remove_devices(wm831x->dev);
1df5981b 1873 regmap_exit(wm831x->regmap);
d2bedfe7
MB		 1874 kfree(wm831x);
1875 return ret;
1876}
1877
e5b48684 1878void wm831x_device_exit(struct wm831x *wm831x)
d2bedfe7 1879{
6704e517 1880 wm831x_otp_exit(wm831x);
d2bedfe7 1881 mfd_remove_devices(wm831x->dev);
473fe736
MB		 1882 if (wm831x->irq_base)
1883 free_irq(wm831x->irq_base + WM831X_IRQ_AUXADC_DATA, wm831x);
7d4d0a3e 1884 wm831x_irq_exit(wm831x);
1df5981b 1885 regmap_exit(wm831x->regmap);
d2bedfe7
MB		 1886 kfree(wm831x);
1887}
1888
e5b48684 1889int wm831x_device_suspend(struct wm831x *wm831x)
b03b4d7c
MB		 1890{
1891 int reg, mask;
1892
1893 /* If the charger IRQs are a wake source then make sure we ack
1894 * them even if they're not actively being used (eg, no power
1895 * driver or no IRQ line wired up) then acknowledge the
1896 * interrupts otherwise suspend won't last very long.
1897 */
1898 if (wm831x->charger_irq_wake) {
1899 reg = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_2_MASK);
1900
1901 mask = WM831X_CHG_BATT_HOT_EINT |
1902 WM831X_CHG_BATT_COLD_EINT |
1903 WM831X_CHG_BATT_FAIL_EINT |
1904 WM831X_CHG_OV_EINT | WM831X_CHG_END_EINT |
1905 WM831X_CHG_TO_EINT | WM831X_CHG_MODE_EINT |
1906 WM831X_CHG_START_EINT;
1907
1908 /* If any of the interrupts are masked read the statuses */
1909 if (reg & mask)
1910 reg = wm831x_reg_read(wm831x,
1911 WM831X_INTERRUPT_STATUS_2);
1912
1913 if (reg & mask) {
1914 dev_info(wm831x->dev,
1915 "Acknowledging masked charger IRQs: %x\n",
1916 reg & mask);
1917 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_2,
1918 reg & mask);
1919 }
1920 }
1921
1922 return 0;
1923}
1924
e5b48684 1925MODULE_DESCRIPTION("Core support for the WM831X AudioPlus PMIC");
d2bedfe7
MB		 1926MODULE_LICENSE("GPL");
1927MODULE_AUTHOR("Mark Brown");
kernel source for telekom puls (alcatel/mediatek)