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(CR):[Kane]kernel: match micbias ext-cap name
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / mfd / madera-core.c
CommitLineData
3a00c11b
RF		 1/*
2 * Core MFD support for Cirrus Logic Madera codecs
3 *
4 * Copyright 2015-2017 Cirrus Logic
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/device.h>
12#include <linux/delay.h>
13#include <linux/err.h>
14#include <linux/gpio.h>
15#include <linux/mfd/core.h>
16#include <linux/module.h>
17#include <linux/notifier.h>
18#include <linux/of.h>
19#include <linux/of_device.h>
20#include <linux/of_gpio.h>
d15fa31d 21#include <linux/pinctrl/consumer.h>
3a00c11b
RF		 22#include <linux/platform_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/regmap.h>
25#include <linux/regulator/consumer.h>
26#include <linux/regulator/driver.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/of_regulator.h>
29
30#include <linux/mfd/madera/core.h>
31#include <linux/mfd/madera/registers.h>
32
33#include "madera.h"
34
b17c6fa2 35#define CS47L15_SILICON_ID 0x6370
3a00c11b
RF		 36#define CS47L35_SILICON_ID 0x6360
37#define CS47L85_SILICON_ID 0x6338
38#define CS47L90_SILICON_ID 0x6364
336a6bbf 39#define CS47L92_SILICON_ID 0x6371
3a00c11b
RF		 40
41#define MADERA_32KZ_MCLK2 1
42
43static const char * const madera_core_supplies[] = {
44 "AVDD",
45 "DBVDD1",
46};
47
48static const struct mfd_cell madera_ldo1_devs[] = {
49 { .name = "madera-ldo1" },
50};
51
d15fa31d 52static const struct mfd_cell madera_pinctrl_dev[] = {
22c09a6f
RF		 53 {
54 .name = "madera-pinctrl",
55 .of_compatible = "cirrus,madera-pinctrl",
56 },
d15fa31d
RF		 57};
58
b17c6fa2
RF		 59static const char * const cs47l15_supplies[] = {
60 "MICVDD",
61 "CPVDD1",
62 "SPKVDD",
63};
64
65static const struct mfd_cell cs47l15_devs[] = {
b17c6fa2
RF		 66 { .name = "madera-irq" },
67 { .name = "madera-gpio" },
68 {
69 .name = "madera-extcon",
70 .parent_supplies = cs47l15_supplies,
71 .num_parent_supplies = 1, /* We only need MICVDD */
72 },
73 {
74 .name = "cs47l15-codec",
75 .parent_supplies = cs47l15_supplies,
76 .num_parent_supplies = ARRAY_SIZE(cs47l15_supplies),
77 },
78};
79
3a00c11b
RF		 80static const char * const cs47l35_supplies[] = {
81 "MICVDD",
82 "DBVDD2",
83 "CPVDD1",
84 "CPVDD2",
85 "SPKVDD",
86};
87
88static const struct mfd_cell cs47l35_devs[] = {
3a00c11b
RF		 89 { .name = "madera-irq", },
90 { .name = "madera-micsupp" },
91 { .name = "madera-gpio", },
7ca6f33a
CK		 92 {
93 .name = "madera-extcon",
94 .parent_supplies = cs47l35_supplies,
95 .num_parent_supplies = 1, /* We only need MICVDD */
96 },
3a00c11b
RF		 97 {
98 .name = "cs47l35-codec",
99 .parent_supplies = cs47l35_supplies,
100 .num_parent_supplies = ARRAY_SIZE(cs47l35_supplies),
101 },
102};
103
104static const char * const cs47l85_supplies[] = {
105 "MICVDD",
106 "DBVDD2",
107 "DBVDD3",
108 "DBVDD4",
109 "CPVDD1",
110 "CPVDD2",
111 "SPKVDDL",
112 "SPKVDDR",
113};
114
115static const struct mfd_cell cs47l85_devs[] = {
3a00c11b
RF		 116 { .name = "madera-irq", },
117 { .name = "madera-micsupp", },
118 { .name = "madera-gpio", },
7ca6f33a
CK		 119 {
120 .name = "madera-extcon",
121 .parent_supplies = cs47l85_supplies,
122 .num_parent_supplies = 1, /* We only need MICVDD */
123 },
3a00c11b
RF		 124 {
125 .name = "cs47l85-codec",
126 .parent_supplies = cs47l85_supplies,
127 .num_parent_supplies = ARRAY_SIZE(cs47l85_supplies),
128 },
129};
130
131static const char * const cs47l90_supplies[] = {
132 "MICVDD",
133 "DBVDD2",
134 "DBVDD3",
135 "DBVDD4",
136 "CPVDD1",
137 "CPVDD2",
138};
139
140static const struct mfd_cell cs47l90_devs[] = {
3a00c11b
RF		 141 { .name = "madera-irq", },
142 { .name = "madera-micsupp", },
143 { .name = "madera-gpio", },
7ca6f33a
CK		 144 {
145 .name = "madera-extcon",
146 .parent_supplies = cs47l90_supplies,
147 .num_parent_supplies = 1, /* We only need MICVDD */
148 },
3a00c11b
RF		 149 {
150 .name = "cs47l90-codec",
151 .parent_supplies = cs47l90_supplies,
152 .num_parent_supplies = ARRAY_SIZE(cs47l90_supplies),
153 },
154};
155
336a6bbf
SH		 156static const char * const cs47l92_supplies[] = {
157 "MICVDD",
158 "CPVDD1",
159 "CPVDD2",
160};
161
162static const struct mfd_cell cs47l92_devs[] = {
336a6bbf
SH		 163 { .name = "madera-irq", },
164 { .name = "madera-micsupp", },
165 { .name = "madera-gpio" },
7ca6f33a
CK		 166 {
167 .name = "madera-extcon",
168 .parent_supplies = cs47l92_supplies,
169 .num_parent_supplies = 1, /* We only need MICVDD */
170 },
336a6bbf
SH		 171 {
172 .name = "cs47l92-codec",
173 .parent_supplies = cs47l92_supplies,
174 .num_parent_supplies = ARRAY_SIZE(cs47l92_supplies),
175 },
176};
177
178
3a00c11b
RF		 179const char *madera_name_from_type(enum madera_type type)
180{
181 switch (type) {
b17c6fa2
RF		 182 case CS47L15:
183 return "CS47L15";
3a00c11b
RF		 184 case CS47L35:
185 return "CS47L35";
186 case CS47L85:
187 return "CS47L85";
188 case CS47L90:
189 return "CS47L90";
190 case CS47L91:
191 return "CS47L91";
336a6bbf
SH		 192 case CS47L92:
193 return "CS47L92";
194 case CS47L93:
195 return "CS47L93";
3a00c11b
RF		 196 case WM1840:
197 return "WM1840";
198 default:
199 return "Unknown";
200 }
201}
202EXPORT_SYMBOL_GPL(madera_name_from_type);
203
204#define MADERA_BOOT_POLL_MAX_INTERVAL_US 5000
205#define MADERA_BOOT_POLL_TIMEOUT_US 25000
206
207static int madera_wait_for_boot(struct madera *madera)
208{
209 unsigned int val;
210 int ret;
211
212 /*
213 * We can't use an interrupt as we need to runtime resume to do so,
214 * so we poll the status bit. This won't race with the interrupt
215 * handler because it will be blocked on runtime resume.
216 */
217 ret = regmap_read_poll_timeout(madera->regmap,
218 MADERA_IRQ1_RAW_STATUS_1,
219 val,
220 (val & MADERA_BOOT_DONE_STS1),
221 MADERA_BOOT_POLL_MAX_INTERVAL_US,
222 MADERA_BOOT_POLL_TIMEOUT_US);
223
224 if (ret)
225 dev_err(madera->dev, "Polling BOOT_DONE_STS failed: %d\n", ret);
226
227 /*
228 * BOOT_DONE defaults to unmasked on boot so we must ack it.
229 * Do this unconditionally to avoid interrupt storms
230 */
231 regmap_write(madera->regmap, MADERA_IRQ1_STATUS_1,
232 MADERA_BOOT_DONE_EINT1);
233
234 if (ret)
235 dev_err(madera->dev, "Polling BOOT_DONE_STS failed: %d\n", ret);
236
237 pm_runtime_mark_last_busy(madera->dev);
238
239 return ret;
240}
241
242static int madera_soft_reset(struct madera *madera)
243{
244 int ret;
245
246 ret = regmap_write(madera->regmap, MADERA_SOFTWARE_RESET, 0);
247 if (ret != 0) {
248 dev_err(madera->dev, "Failed to soft reset device: %d\n", ret);
249 return ret;
250 }
251
252 /* Allow time for internal clocks to startup after reset */
253 usleep_range(1000, 2000);
254
255 return 0;
256}
257
258static void madera_enable_hard_reset(struct madera *madera)
259{
260 if (madera->reset_gpio)
261 gpiod_set_value_cansleep(madera->reset_gpio, 0);
262}
263
264static void madera_disable_hard_reset(struct madera *madera)
265{
266 if (madera->reset_gpio) {
267 gpiod_set_value_cansleep(madera->reset_gpio, 1);
268 usleep_range(1000, 2000);
269 }
270}
271
272#ifdef CONFIG_PM
273static int madera_runtime_resume(struct device *dev)
274{
275 struct madera *madera = dev_get_drvdata(dev);
276 int ret;
277
278 dev_dbg(dev, "Leaving sleep mode\n");
279
280 ret = regulator_enable(madera->dcvdd);
281 if (ret) {
282 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
283 return ret;
284 }
285
49fbb646
GL		 286 if (IS_ENABLED(CONFIG_REGULATOR_S2MPU09))
287 msleep(10);
288
3a00c11b
RF		 289 regcache_cache_only(madera->regmap, false);
290 regcache_cache_only(madera->regmap_32bit, false);
291
292 ret = madera_wait_for_boot(madera);
293 if (ret)
294 goto err;
295
296 ret = regcache_sync(madera->regmap);
297 if (ret) {
298 dev_err(dev, "Failed to restore 16-bit register cache\n");
299 goto err;
300 }
301
302 ret = regcache_sync(madera->regmap_32bit);
303 if (ret) {
304 dev_err(dev, "Failed to restore 32-bit register cache\n");
305 goto err;
306 }
307
308 return 0;
309
310err:
311 regcache_cache_only(madera->regmap_32bit, true);
312 regcache_cache_only(madera->regmap, true);
313 regulator_disable(madera->dcvdd);
314
315 return ret;
316}
317
318static int madera_runtime_suspend(struct device *dev)
319{
320 struct madera *madera = dev_get_drvdata(dev);
321
322 dev_dbg(madera->dev, "Entering sleep mode\n");
323
324 regcache_cache_only(madera->regmap, true);
325 regcache_mark_dirty(madera->regmap);
326 regcache_cache_only(madera->regmap_32bit, true);
327 regcache_mark_dirty(madera->regmap_32bit);
328
329 regulator_disable(madera->dcvdd);
330
331 return 0;
332}
333#endif
334
335const struct dev_pm_ops madera_pm_ops = {
336 SET_RUNTIME_PM_OPS(madera_runtime_suspend,
337 madera_runtime_resume,
338 NULL)
339};
340EXPORT_SYMBOL_GPL(madera_pm_ops);
341
342unsigned int madera_get_num_micbias(struct madera *madera)
343{
344
345 switch (madera->type) {
b17c6fa2
RF		 346 case CS47L15:
347 return 1;
3a00c11b
RF		 348 case CS47L35:
349 return 2;
350 case CS47L85:
351 case WM1840:
352 return 4;
353 case CS47L90:
354 case CS47L91:
336a6bbf
SH		 355 case CS47L92:
356 case CS47L93:
3a00c11b
RF		 357 return 2;
358 default:
359 dev_warn(madera->dev, "No micbias known for codec %s\n",
360 madera_name_from_type(madera->type));
361 return 0;
362 }
363}
364EXPORT_SYMBOL_GPL(madera_get_num_micbias);
365
366unsigned int madera_get_num_childbias(struct madera *madera,
367 unsigned int micbias)
368{
369 /*
370 * micbias argument reserved for future codecs that don't
371 * have the same number of children on each micbias
372 */
373
374 switch (madera->type) {
b17c6fa2
RF		 375 case CS47L15:
376 return 3;
3a00c11b
RF		 377 case CS47L35:
378 return 2;
379 case CS47L85:
380 case WM1840:
381 return 0;
382 case CS47L90:
383 case CS47L91:
384 return 4;
336a6bbf
SH		 385 case CS47L92:
386 case CS47L93:
387 switch (micbias) {
388 case 1:
389 return 4;
390 case 2:
391 return 2;
392 default:
393 dev_warn(madera->dev,
394 "No child micbias for codec %s, micbias %u\n",
395 madera_name_from_type(madera->type),
396 micbias);
397 return 0;
398 }
3a00c11b
RF		 399 default:
400 dev_warn(madera->dev, "No child micbias known for codec %s\n",
401 madera_name_from_type(madera->type));
402 return 0;
403 }
404}
405EXPORT_SYMBOL_GPL(madera_get_num_childbias);
406
407#ifdef CONFIG_OF
408const struct of_device_id madera_of_match[] = {
b17c6fa2 409 { .compatible = "cirrus,cs47l15", .data = (void *)CS47L15 },
3a00c11b
RF		 410 { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 },
411 { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 },
412 { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 },
413 { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 },
336a6bbf
SH		 414 { .compatible = "cirrus,cs47l92", .data = (void *)CS47L92 },
415 { .compatible = "cirrus,cs47l93", .data = (void *)CS47L93 },
3a00c11b
RF		 416 { .compatible = "cirrus,wm1840", .data = (void *)WM1840 },
417 {},
418};
419EXPORT_SYMBOL_GPL(madera_of_match);
420
421unsigned long madera_get_type_from_of(struct device *dev)
422{
423 const struct of_device_id *id = of_match_device(madera_of_match, dev);
424
425 if (id)
426 return (unsigned long)id->data;
427 else
428 return 0;
429}
430EXPORT_SYMBOL_GPL(madera_get_type_from_of);
431#endif
432
433static int madera_get_reset_gpio(struct madera *madera)
434{
435 int ret;
436
437 /* We use 0 in pdata to indicate a GPIO has not been set */
438 if (dev_get_platdata(madera->dev) && (madera->pdata.reset > 0)) {
439 /* Start out with /RESET asserted */
440 ret = devm_gpio_request_one(madera->dev,
441 madera->pdata.reset,
442 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
443 "madera reset");
444 if (!ret)
445 madera->reset_gpio = gpio_to_desc(madera->pdata.reset);
446 } else {
447 madera->reset_gpio = devm_gpiod_get_optional(madera->dev,
448 "reset",
449 GPIOD_OUT_LOW);
450 if (IS_ERR(madera->reset_gpio))
451 ret = PTR_ERR(madera->reset_gpio);
452 else
453 ret = 0;
454 }
455
598cd94f
GL		 456 /* Ensure period of reset asserted before we apply the supplies */
457 msleep(20);
458
3a00c11b
RF		 459 if (ret == -EPROBE_DEFER)
460 return ret;
461
462 if (ret) {
463 dev_err(madera->dev, "Failed to request /RESET: %d\n", ret);
464 return ret;
465 }
466
467 if (!madera->reset_gpio)
468 dev_warn(madera->dev,
469 "Running without reset GPIO is not recommended\n");
470
471 return 0;
472}
473
474static void madera_prop_get_micbias_child(struct madera *madera,
475 const char *name,
476 struct madera_micbias_pin_pdata *pdata)
477{
478 struct device_node *np;
479 struct regulator_desc desc = { };
480
481 np = of_get_child_by_name(madera->dev->of_node, name);
482 if (!np)
483 return;
484
485 desc.name = name;
486 pdata->init_data = of_get_regulator_init_data(madera->dev, np, &desc);
487 of_property_read_u32(np, "regulator-active-discharge",
488 &pdata->active_discharge);
489}
490
491static void madera_prop_get_micbias_gen(struct madera *madera,
492 const char *name,
493 struct madera_micbias_pdata *pdata)
494{
495 struct device_node *np;
496 struct regulator_desc desc = { };
497
498 np = of_get_child_by_name(madera->dev->of_node, name);
499 if (!np)
500 return;
501
502 desc.name = name;
503 pdata->init_data = of_get_regulator_init_data(madera->dev, np, &desc);
e7c514d8 504 pdata->ext_cap = of_property_read_bool(np, "cirrus,ext-cap");
3a00c11b
RF		 505 of_property_read_u32(np, "regulator-active-discharge",
506 &pdata->active_discharge);
507}
508
509static void madera_prop_get_micbias(struct madera *madera)
510{
511 struct madera_micbias_pdata *pdata;
512 char name[10];
513 int i, child;
514
515 for (i = madera_get_num_micbias(madera) - 1; i >= 0; --i) {
516 pdata = &madera->pdata.micbias[i];
517
518 snprintf(name, sizeof(name), "MICBIAS%d", i + 1);
519 madera_prop_get_micbias_gen(madera, name, pdata);
520
521 child = madera_get_num_childbias(madera, i + 1) - 1;
522 for (; child >= 0; --child) {
523 snprintf(name, sizeof(name), "MICBIAS%d%c",
524 i + 1, 'A' + child);
525 madera_prop_get_micbias_child(madera, name,
526 &pdata->pin[child]);
527 }
528 }
529}
530
531static void madera_configure_micbias(struct madera *madera)
532{
533 unsigned int num_micbias = madera_get_num_micbias(madera);
534 struct madera_micbias_pdata *pdata;
535 struct regulator_init_data *init_data;
536 unsigned int num_child_micbias;
537 unsigned int val, mask, reg;
538 int i, child, ret;
539
540 for (i = 0; i < num_micbias; ++i) {
541 pdata = &madera->pdata.micbias[i];
542
543 /* Configure the child micbias pins */
544 val = 0;
545 mask = 0;
546 num_child_micbias = madera_get_num_childbias(madera, i + 1);
547 for (child = 0; child < num_child_micbias; ++child) {
548 if (!pdata->pin[child].init_data)
549 continue;
550
551 mask |= MADERA_MICB1A_DISCH << (child * 4);
552 if (pdata->pin[child].active_discharge)
553 val |= MADERA_MICB1A_DISCH << (child * 4);
554 }
555
556 if (mask) {
dc951541 557 reg = MADERA_MIC_BIAS_CTRL_5 + (i * 2);
3a00c11b
RF		 558 ret = regmap_update_bits(madera->regmap, reg, mask, val);
559 if (ret)
560 dev_warn(madera->dev,
561 "Failed to write 0x%x (%d)\n",
562 reg, ret);
563
564 dev_dbg(madera->dev,
565 "Set MICBIAS_CTRL%d mask=0x%x val=0x%x\n",
566 i + 5, mask, val);
567 }
568
569 /* configure the parent */
570 init_data = pdata->init_data;
571 if (!init_data)
572 continue;
573
574 mask = MADERA_MICB1_LVL_MASK | MADERA_MICB1_EXT_CAP |
575 MADERA_MICB1_BYPASS | MADERA_MICB1_RATE;
576
577 if (!init_data->constraints.max_uV)
dc951541 578 init_data->constraints.max_uV = 2800000;
3a00c11b
RF		 579
580 val = (init_data->constraints.max_uV - 1500000) / 100000;
581 val <<= MADERA_MICB1_LVL_SHIFT;
582
583 if (pdata->ext_cap)
584 val |= MADERA_MICB1_EXT_CAP;
585
586 /* if no child biases the discharge is set in the parent */
587 if (num_child_micbias == 0) {
588 mask |= MADERA_MICB1_DISCH;
589
590 if (pdata->active_discharge)
591 val |= MADERA_MICB1_DISCH;
592 }
593
594 if (init_data->constraints.soft_start)
595 val |= MADERA_MICB1_RATE;
596
597 if (init_data->constraints.valid_ops_mask &
598 REGULATOR_CHANGE_BYPASS)
599 val |= MADERA_MICB1_BYPASS;
600
dc951541 601 reg = MADERA_MIC_BIAS_CTRL_1 + i;
3a00c11b
RF		 602 ret = regmap_update_bits(madera->regmap, reg, mask, val);
603 if (ret)
604 dev_warn(madera->dev, "Failed to write 0x%x (%d)\n",
605 reg, ret);
606
607 dev_dbg(madera->dev, "Set MICBIAS_CTRL%d mask=0x%x val=0x%x\n",
608 i + 1, mask, val);
609 }
610}
611
d15fa31d
RF		 612static int madera_dev_select_pinctrl(struct madera *madera,
613 struct pinctrl *pinctrl,
614 const char *name)
615{
616 struct pinctrl_state *pinctrl_state;
617 int ret;
618
619 pinctrl_state = pinctrl_lookup_state(pinctrl, name);
620
621 /* it's ok if it doesn't exist */
622 if (!IS_ERR(pinctrl_state)) {
623 dev_dbg(madera->dev, "Applying pinctrl %s state\n", name);
624 ret = pinctrl_select_state(pinctrl, pinctrl_state);
625 if (ret) {
626 dev_err(madera->dev,
627 "Failed to select pinctrl %s state: %d\n",
628 name, ret);
629 return ret;
630 }
631 }
632
633 return 0;
634}
635
3a00c11b
RF		 636int madera_dev_init(struct madera *madera)
637{
638 struct device *dev = madera->dev;
639 const char *name;
640 unsigned int hwid;
641 int (*patch_fn)(struct madera *) = NULL;
642 const struct mfd_cell *mfd_devs;
d15fa31d 643 struct pinctrl *pinctrl;
3a00c11b
RF		 644 int n_devs = 0;
645 int i, ret;
646
647 dev_set_drvdata(madera->dev, madera);
d15fa31d
RF		 648
649 /*
650 * Pinctrl subsystem only configures pinctrls if all referenced pins
651 * are registered. Create our pinctrl child now so that its pins exist
652 * otherwise external pinctrl dependencies will fail
653 * Note: Can't devm_ because it is cleaned up after children are already
654 * destroyed
655 */
656 ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
657 madera_pinctrl_dev, 1, NULL, 0, NULL);
658 if (ret) {
659 dev_err(madera->dev, "Failed to add pinctrl child: %d\n", ret);
660 return ret;
661 }
662
663 pinctrl = pinctrl_get(dev);
664 if (IS_ERR(pinctrl)) {
665 ret = PTR_ERR(pinctrl);
666 dev_err(madera->dev, "Failed to get pinctrl: %d\n", ret);
667 goto err_devs;
668 }
669
670 /* Use (optional) minimal config with only external pin bindings */
671 ret = madera_dev_select_pinctrl(madera, pinctrl, "probe");
672 if (ret)
673 goto err_pinctrl;
674
c405c9a7 675 mutex_init(&madera->reg_setting_lock);
676
3a00c11b
RF		 677 BLOCKING_INIT_NOTIFIER_HEAD(&madera->notifier);
678
679 if (dev_get_platdata(madera->dev)) {
680 memcpy(&madera->pdata, dev_get_platdata(madera->dev),
681 sizeof(madera->pdata));
682 }
683
684 ret = madera_get_reset_gpio(madera);
685 if (ret)
d15fa31d 686 goto err_pinctrl;
3a00c11b
RF		 687
688 madera_prop_get_micbias(madera);
689
690 regcache_cache_only(madera->regmap, true);
691 regcache_cache_only(madera->regmap_32bit, true);
692
693 for (i = 0; i < ARRAY_SIZE(madera_core_supplies); i++)
694 madera->core_supplies[i].supply = madera_core_supplies[i];
695
696 madera->num_core_supplies = ARRAY_SIZE(madera_core_supplies);
697
698 switch (madera->type) {
b17c6fa2 699 case CS47L15:
3a00c11b
RF		 700 case CS47L35:
701 case CS47L90:
702 case CS47L91:
336a6bbf
SH		 703 case CS47L92:
704 case CS47L93:
3a00c11b
RF		 705 break;
706 case CS47L85:
707 case WM1840:
708 /* On these DCVDD could be supplied from the onboard LDO1 */
709 ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
710 madera_ldo1_devs,
711 ARRAY_SIZE(madera_ldo1_devs),
712 NULL, 0, NULL);
713 if (ret) {
714 dev_err(dev, "Failed to add LDO1 child: %d\n", ret);
d15fa31d 715 goto err_pinctrl;
3a00c11b
RF		 716 }
717 break;
718 default:
719 dev_err(madera->dev, "Unknown device type %d\n", madera->type);
d15fa31d
RF		 720 ret = -ENODEV;
721 goto err_pinctrl;
3a00c11b
RF		 722 }
723
724 ret = devm_regulator_bulk_get(dev, madera->num_core_supplies,
725 madera->core_supplies);
726 if (ret) {
727 dev_err(dev, "Failed to request core supplies: %d\n", ret);
d15fa31d 728 goto err_pinctrl;
3a00c11b
RF		 729 }
730
731 /*
732 * Don't use devres here because the only device we have to get
733 * against is the MFD device and DCVDD will likely be supplied by
734 * one of its children. Meaning that the regulator will be
735 * destroyed by the time devres calls regulator put.
736 */
1e73363a 737 madera->dcvdd = regulator_get(madera->dev, "DCVDD");
3a00c11b
RF		 738 if (IS_ERR(madera->dcvdd)) {
739 ret = PTR_ERR(madera->dcvdd);
740 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
d15fa31d 741 goto err_pinctrl;
3a00c11b
RF		 742 }
743
744 ret = regulator_bulk_enable(madera->num_core_supplies,
745 madera->core_supplies);
746 if (ret) {
747 dev_err(dev, "Failed to enable core supplies: %d\n", ret);
748 goto err_dcvdd;
749 }
750
751 ret = regulator_enable(madera->dcvdd);
752 if (ret) {
753 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
754 goto err_enable;
755 }
756
93e30105
GL		 757 if (IS_ENABLED(CONFIG_REGULATOR_S2MPU09))
758 msleep(10);
759
3a00c11b
RF		 760 madera_disable_hard_reset(madera);
761
762 regcache_cache_only(madera->regmap, false);
763 regcache_cache_only(madera->regmap_32bit, false);
764
765 /*
766 * Verify that this is a chip we know about before we
767 * starting doing any writes to its registers
768 */
769 ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &hwid);
770 if (ret) {
771 dev_err(dev, "Failed to read ID register: %d\n", ret);
772 goto err_reset;
773 }
774
775 switch (hwid) {
b17c6fa2 776 case CS47L15_SILICON_ID:
3a00c11b
RF		 777 case CS47L35_SILICON_ID:
778 case CS47L85_SILICON_ID:
779 case CS47L90_SILICON_ID:
336a6bbf 780 case CS47L92_SILICON_ID:
3a00c11b
RF		 781 break;
782 default:
783 dev_err(madera->dev, "Unknown device ID: %x\n", hwid);
784 ret = -EINVAL;
785 goto err_reset;
786 }
787
788 /* If we don't have a reset GPIO use a soft reset */
789 if (!madera->reset_gpio) {
790 ret = madera_soft_reset(madera);
791 if (ret)
792 goto err_reset;
793 }
794
795 ret = madera_wait_for_boot(madera);
796 if (ret) {
797 dev_err(madera->dev, "Device failed initial boot: %d\n", ret);
798 goto err_reset;
799 }
800
801 ret = regmap_read(madera->regmap, MADERA_HARDWARE_REVISION,
802 &madera->rev);
803 if (ret) {
804 dev_err(dev, "Failed to read revision register: %d\n", ret);
805 goto err_reset;
806 }
807 madera->rev &= MADERA_HW_REVISION_MASK;
808
809 name = madera_name_from_type(madera->type);
810
811 switch (hwid) {
b17c6fa2
RF		 812 case CS47L15_SILICON_ID:
813 if (IS_ENABLED(CONFIG_MFD_CS47L15)) {
814 switch (madera->type) {
815 case CS47L15:
816 patch_fn = cs47l15_patch;
817 mfd_devs = cs47l15_devs;
818 n_devs = ARRAY_SIZE(cs47l15_devs);
819 break;
820 default:
821 break;
822 }
823 }
824 break;
3a00c11b
RF		 825 case CS47L35_SILICON_ID:
826 if (IS_ENABLED(CONFIG_MFD_CS47L35)) {
827 switch (madera->type) {
828 case CS47L35:
829 patch_fn = cs47l35_patch;
830 mfd_devs = cs47l35_devs;
831 n_devs = ARRAY_SIZE(cs47l35_devs);
832 break;
833 default:
834 break;
835 }
836 }
837 break;
838 case CS47L85_SILICON_ID:
839 if (IS_ENABLED(CONFIG_MFD_CS47L85)) {
840 switch (madera->type) {
841 case CS47L85:
842 case WM1840:
843 patch_fn = cs47l85_patch;
844 mfd_devs = cs47l85_devs;
845 n_devs = ARRAY_SIZE(cs47l85_devs);
846 break;
847 default:
848 break;
849 }
850 }
851 break;
852 case CS47L90_SILICON_ID:
853 if (IS_ENABLED(CONFIG_MFD_CS47L90)) {
854 switch (madera->type) {
855 case CS47L90:
856 case CS47L91:
857 patch_fn = cs47l90_patch;
858 mfd_devs = cs47l90_devs;
859 n_devs = ARRAY_SIZE(cs47l90_devs);
860 break;
861 default:
862 break;
863 }
864 }
865 break;
336a6bbf
SH		 866 case CS47L92_SILICON_ID:
867 if (IS_ENABLED(CONFIG_MFD_CS47L92)) {
868 switch (madera->type) {
869 case CS47L92:
870 case CS47L93:
871 patch_fn = cs47l92_patch;
872 mfd_devs = cs47l92_devs;
873 n_devs = ARRAY_SIZE(cs47l92_devs);
874 break;
875 default:
876 break;
877 }
878 }
879 break;
3a00c11b
RF		 880 default:
881 break;
882 }
883
884 if (!n_devs) {
885 dev_err(madera->dev, "Device ID 0x%x not a %s\n", hwid, name);
886 ret = -ENODEV;
887 goto err_reset;
888 }
889
890 dev_info(dev, "%s silicon revision %d\n", name, madera->rev);
891
892 /* Apply hardware patch */
893 if (patch_fn) {
894 ret = patch_fn(madera);
895 if (ret) {
896 dev_err(madera->dev, "Failed to apply patch %d\n", ret);
897 goto err_reset;
898 }
899 }
900
d15fa31d
RF		 901 /* Apply (optional) main pinctrl config, this will configure our pins */
902 ret = madera_dev_select_pinctrl(madera, pinctrl, "active");
903 if (ret)
904 goto err_reset;
905
3a00c11b
RF		 906 /* Init 32k clock sourced from MCLK2 */
907 ret = regmap_update_bits(madera->regmap,
908 MADERA_CLOCK_32K_1,
909 MADERA_CLK_32K_ENA_MASK | MADERA_CLK_32K_SRC_MASK,
910 MADERA_CLK_32K_ENA | MADERA_32KZ_MCLK2);
911 if (ret) {
912 dev_err(madera->dev, "Failed to init 32k clock: %d\n", ret);
913 goto err_reset;
914 }
915
916 madera_configure_micbias(madera);
917
918 pm_runtime_set_active(madera->dev);
919 pm_runtime_enable(madera->dev);
920 pm_runtime_set_autosuspend_delay(madera->dev, 100);
921 pm_runtime_use_autosuspend(madera->dev);
922
923 ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
924 mfd_devs, n_devs,
925 NULL, 0, NULL);
926 if (ret) {
927 dev_err(madera->dev, "Failed to add subdevices: %d\n", ret);
928 goto err_pm_runtime;
929 }
930
d15fa31d
RF		 931 pinctrl_put(pinctrl);
932
3a00c11b
RF		 933 return 0;
934
935err_pm_runtime:
936 pm_runtime_disable(madera->dev);
937err_reset:
938 madera_enable_hard_reset(madera);
939 regulator_disable(madera->dcvdd);
940err_enable:
941 regulator_bulk_disable(madera->num_core_supplies,
942 madera->core_supplies);
943err_dcvdd:
944 regulator_put(madera->dcvdd);
d15fa31d
RF		 945err_pinctrl:
946 pinctrl_put(pinctrl);
3a00c11b
RF		 947err_devs:
948 mfd_remove_devices(dev);
949
950 return ret;
951}
952EXPORT_SYMBOL_GPL(madera_dev_init);
953
954int madera_dev_exit(struct madera *madera)
955{
956 /* Prevent any IRQs being serviced while we clean up */
957 disable_irq(madera->irq);
958
959 /*
960 * DCVDD could be supplied by a child node, we must disable it before
961 * removing the children, and prevent PM runtime from turning it back on
962 */
963 pm_runtime_disable(madera->dev);
964
965 regulator_disable(madera->dcvdd);
966 regulator_put(madera->dcvdd);
967
968 mfd_remove_devices(madera->dev);
969 madera_enable_hard_reset(madera);
970
971 regulator_bulk_disable(madera->num_core_supplies,
972 madera->core_supplies);
973 return 0;
974}
975EXPORT_SYMBOL_GPL(madera_dev_exit);