i2c: Convert to DEFINE_PCI_DEVICE_TABLE
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / i2c / busses / scx200_acb.c
CommitLineData
99c3adb4 1/*
1da177e4
LT
2 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
3
4 National Semiconductor SCx200 ACCESS.bus support
16ffc5c9 5 Also supports the AMD CS5535 and AMD CS5536
99c3adb4 6
1da177e4
LT
7 Based on i2c-keywest.c which is:
8 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
9 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
99c3adb4 10
1da177e4
LT
11 This program is free software; you can redistribute it and/or
12 modify it under the terms of the GNU General Public License as
13 published by the Free Software Foundation; either version 2 of the
14 License, or (at your option) any later version.
99c3adb4 15
1da177e4
LT
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 General Public License for more details.
99c3adb4 20
1da177e4
LT
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4
LT
24*/
25
1da177e4
LT
26#include <linux/module.h>
27#include <linux/errno.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/i2c.h>
1da177e4 31#include <linux/pci.h>
de8255cc 32#include <linux/platform_device.h>
1da177e4 33#include <linux/delay.h>
3fb9a655 34#include <linux/mutex.h>
5a0e3ad6 35#include <linux/slab.h>
21782180 36#include <linux/io.h>
1da177e4
LT
37
38#include <linux/scx200.h>
39
40#define NAME "scx200_acb"
41
42MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
43MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
de8255cc 44MODULE_ALIAS("platform:cs5535-smb");
1da177e4
LT
45MODULE_LICENSE("GPL");
46
47#define MAX_DEVICES 4
48static int base[MAX_DEVICES] = { 0x820, 0x840 };
49module_param_array(base, int, NULL, 0);
50MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
51
f933ff50 52#define POLL_TIMEOUT (HZ/5)
1da177e4
LT
53
54enum scx200_acb_state {
55 state_idle,
56 state_address,
57 state_command,
58 state_repeat_start,
59 state_quick,
60 state_read,
61 state_write,
62};
63
64static const char *scx200_acb_state_name[] = {
65 "idle",
66 "address",
67 "command",
68 "repeat_start",
69 "quick",
70 "read",
71 "write",
72};
73
74/* Physical interface */
99c3adb4 75struct scx200_acb_iface {
1da177e4
LT
76 struct scx200_acb_iface *next;
77 struct i2c_adapter adapter;
78 unsigned base;
3fb9a655 79 struct mutex mutex;
1da177e4
LT
80
81 /* State machine data */
82 enum scx200_acb_state state;
83 int result;
84 u8 address_byte;
85 u8 command;
86 u8 *ptr;
87 char needs_reset;
88 unsigned len;
89};
90
91/* Register Definitions */
92#define ACBSDA (iface->base + 0)
93#define ACBST (iface->base + 1)
94#define ACBST_SDAST 0x40 /* SDA Status */
99c3adb4 95#define ACBST_BER 0x20
1da177e4
LT
96#define ACBST_NEGACK 0x10 /* Negative Acknowledge */
97#define ACBST_STASTR 0x08 /* Stall After Start */
98#define ACBST_MASTER 0x02
99#define ACBCST (iface->base + 2)
100#define ACBCST_BB 0x02
101#define ACBCTL1 (iface->base + 3)
102#define ACBCTL1_STASTRE 0x80
103#define ACBCTL1_NMINTE 0x40
99c3adb4
BG
104#define ACBCTL1_ACK 0x10
105#define ACBCTL1_STOP 0x02
106#define ACBCTL1_START 0x01
1da177e4
LT
107#define ACBADDR (iface->base + 4)
108#define ACBCTL2 (iface->base + 5)
109#define ACBCTL2_ENABLE 0x01
110
111/************************************************************************/
112
113static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
114{
115 const char *errmsg;
116
ef4d9275
BG
117 dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
118 scx200_acb_state_name[iface->state], status);
1da177e4
LT
119
120 if (status & ACBST_BER) {
121 errmsg = "bus error";
122 goto error;
123 }
124 if (!(status & ACBST_MASTER)) {
125 errmsg = "not master";
126 goto error;
127 }
9b7b6d3b
BG
128 if (status & ACBST_NEGACK) {
129 dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
130 scx200_acb_state_name[iface->state]);
131
132 iface->state = state_idle;
133 iface->result = -ENXIO;
134
135 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
136 outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
95563d34
JC
137
138 /* Reset the status register */
139 outb(0, ACBST);
9b7b6d3b
BG
140 return;
141 }
1da177e4
LT
142
143 switch (iface->state) {
144 case state_idle:
145 dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
146 break;
147
148 case state_address:
149 /* Do a pointer write first */
150 outb(iface->address_byte & ~1, ACBSDA);
151
152 iface->state = state_command;
153 break;
154
155 case state_command:
156 outb(iface->command, ACBSDA);
157
158 if (iface->address_byte & 1)
159 iface->state = state_repeat_start;
160 else
161 iface->state = state_write;
162 break;
163
164 case state_repeat_start:
165 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
166 /* fallthrough */
99c3adb4 167
1da177e4
LT
168 case state_quick:
169 if (iface->address_byte & 1) {
99c3adb4 170 if (iface->len == 1)
1da177e4
LT
171 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
172 else
173 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
174 outb(iface->address_byte, ACBSDA);
175
176 iface->state = state_read;
177 } else {
178 outb(iface->address_byte, ACBSDA);
179
180 iface->state = state_write;
181 }
182 break;
183
184 case state_read:
fd627a01
TA
185 /* Set ACK if _next_ byte will be the last one */
186 if (iface->len == 2)
1da177e4
LT
187 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
188 else
189 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
190
fd627a01 191 if (iface->len == 1) {
1da177e4
LT
192 iface->result = 0;
193 iface->state = state_idle;
194 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
195 }
196
fd627a01
TA
197 *iface->ptr++ = inb(ACBSDA);
198 --iface->len;
199
1da177e4
LT
200 break;
201
202 case state_write:
203 if (iface->len == 0) {
204 iface->result = 0;
205 iface->state = state_idle;
206 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
207 break;
208 }
99c3adb4 209
1da177e4
LT
210 outb(*iface->ptr++, ACBSDA);
211 --iface->len;
99c3adb4 212
1da177e4
LT
213 break;
214 }
215
216 return;
217
1da177e4 218 error:
fce96f3e
WT
219 dev_err(&iface->adapter.dev,
220 "%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg,
221 scx200_acb_state_name[iface->state], iface->address_byte,
222 iface->len, status);
1da177e4
LT
223
224 iface->state = state_idle;
225 iface->result = -EIO;
226 iface->needs_reset = 1;
227}
228
1da177e4
LT
229static void scx200_acb_poll(struct scx200_acb_iface *iface)
230{
9b7b6d3b 231 u8 status;
1da177e4
LT
232 unsigned long timeout;
233
234 timeout = jiffies + POLL_TIMEOUT;
3e3183ba 235 while (1) {
1da177e4 236 status = inb(ACBST);
95563d34
JC
237
238 /* Reset the status register to avoid the hang */
239 outb(0, ACBST);
240
1da177e4
LT
241 if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
242 scx200_acb_machine(iface, status);
243 return;
244 }
3e3183ba
DW
245 if (time_after(jiffies, timeout))
246 break;
247 cpu_relax();
248 cond_resched();
1da177e4
LT
249 }
250
9b7b6d3b
BG
251 dev_err(&iface->adapter.dev, "timeout in state %s\n",
252 scx200_acb_state_name[iface->state]);
253
254 iface->state = state_idle;
255 iface->result = -EIO;
256 iface->needs_reset = 1;
1da177e4 257}
1da177e4
LT
258
259static void scx200_acb_reset(struct scx200_acb_iface *iface)
260{
261 /* Disable the ACCESS.bus device and Configure the SCL
99c3adb4 262 frequency: 16 clock cycles */
1da177e4
LT
263 outb(0x70, ACBCTL2);
264 /* Polling mode */
265 outb(0, ACBCTL1);
266 /* Disable slave address */
267 outb(0, ACBADDR);
268 /* Enable the ACCESS.bus device */
269 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
270 /* Free STALL after START */
271 outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
272 /* Send a STOP */
273 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
274 /* Clear BER, NEGACK and STASTR bits */
275 outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
276 /* Clear BB bit */
277 outb(inb(ACBCST) | ACBCST_BB, ACBCST);
278}
279
280static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
99c3adb4
BG
281 u16 address, unsigned short flags,
282 char rw, u8 command, int size,
283 union i2c_smbus_data *data)
1da177e4
LT
284{
285 struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
286 int len;
287 u8 *buffer;
288 u16 cur_word;
289 int rc;
290
291 switch (size) {
292 case I2C_SMBUS_QUICK:
99c3adb4
BG
293 len = 0;
294 buffer = NULL;
295 break;
296
1da177e4 297 case I2C_SMBUS_BYTE:
9b7b6d3b
BG
298 len = 1;
299 buffer = rw ? &data->byte : &command;
99c3adb4
BG
300 break;
301
1da177e4 302 case I2C_SMBUS_BYTE_DATA:
99c3adb4
BG
303 len = 1;
304 buffer = &data->byte;
305 break;
306
1da177e4
LT
307 case I2C_SMBUS_WORD_DATA:
308 len = 2;
99c3adb4
BG
309 cur_word = cpu_to_le16(data->word);
310 buffer = (u8 *)&cur_word;
1da177e4 311 break;
99c3adb4 312
c3efacaa 313 case I2C_SMBUS_I2C_BLOCK_DATA:
99c3adb4 314 len = data->block[0];
c3efacaa
JD
315 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
316 return -EINVAL;
99c3adb4 317 buffer = &data->block[1];
1da177e4 318 break;
99c3adb4 319
1da177e4 320 default:
99c3adb4 321 return -EINVAL;
1da177e4
LT
322 }
323
ef4d9275
BG
324 dev_dbg(&adapter->dev,
325 "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
326 size, address, command, len, rw);
1da177e4
LT
327
328 if (!len && rw == I2C_SMBUS_READ) {
ef4d9275 329 dev_dbg(&adapter->dev, "zero length read\n");
1da177e4
LT
330 return -EINVAL;
331 }
332
3fb9a655 333 mutex_lock(&iface->mutex);
1da177e4 334
9b7b6d3b 335 iface->address_byte = (address << 1) | rw;
1da177e4
LT
336 iface->command = command;
337 iface->ptr = buffer;
338 iface->len = len;
339 iface->result = -EINVAL;
340 iface->needs_reset = 0;
341
342 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
343
344 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
345 iface->state = state_quick;
346 else
347 iface->state = state_address;
348
1da177e4
LT
349 while (iface->state != state_idle)
350 scx200_acb_poll(iface);
1da177e4
LT
351
352 if (iface->needs_reset)
353 scx200_acb_reset(iface);
354
355 rc = iface->result;
356
3fb9a655 357 mutex_unlock(&iface->mutex);
1da177e4
LT
358
359 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
99c3adb4 360 data->word = le16_to_cpu(cur_word);
1da177e4
LT
361
362#ifdef DEBUG
ef4d9275 363 dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
1da177e4
LT
364 if (buffer) {
365 int i;
366 printk(" data:");
367 for (i = 0; i < len; ++i)
368 printk(" %02x", buffer[i]);
369 }
370 printk("\n");
371#endif
372
373 return rc;
374}
375
376static u32 scx200_acb_func(struct i2c_adapter *adapter)
377{
378 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
379 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
c3efacaa 380 I2C_FUNC_SMBUS_I2C_BLOCK;
1da177e4
LT
381}
382
383/* For now, we only handle combined mode (smbus) */
8f9082c5 384static const struct i2c_algorithm scx200_acb_algorithm = {
1da177e4
LT
385 .smbus_xfer = scx200_acb_smbus_xfer,
386 .functionality = scx200_acb_func,
387};
388
389static struct scx200_acb_iface *scx200_acb_list;
9d9c01ce 390static DEFINE_MUTEX(scx200_acb_list_mutex);
1da177e4 391
de8255cc 392static __devinit int scx200_acb_probe(struct scx200_acb_iface *iface)
1da177e4
LT
393{
394 u8 val;
395
396 /* Disable the ACCESS.bus device and Configure the SCL
99c3adb4 397 frequency: 16 clock cycles */
1da177e4
LT
398 outb(0x70, ACBCTL2);
399
400 if (inb(ACBCTL2) != 0x70) {
ef4d9275 401 pr_debug(NAME ": ACBCTL2 readback failed\n");
1da177e4
LT
402 return -ENXIO;
403 }
404
405 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
406
407 val = inb(ACBCTL1);
408 if (val) {
ef4d9275
BG
409 pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
410 val);
1da177e4
LT
411 return -ENXIO;
412 }
413
414 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
415
416 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
417
418 val = inb(ACBCTL1);
419 if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
ef4d9275
BG
420 pr_debug(NAME ": enabled, but NMINTE won't be set, "
421 "ACBCTL1=0x%02x\n", val);
1da177e4
LT
422 return -ENXIO;
423 }
424
425 return 0;
426}
427
de8255cc 428static __devinit struct scx200_acb_iface *scx200_create_iface(const char *text,
12a917f6 429 struct device *dev, int index)
1da177e4
LT
430{
431 struct scx200_acb_iface *iface;
432 struct i2c_adapter *adapter;
1da177e4 433
5263ebb5 434 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
1da177e4
LT
435 if (!iface) {
436 printk(KERN_ERR NAME ": can't allocate memory\n");
80cd3a87 437 return NULL;
1da177e4
LT
438 }
439
1da177e4
LT
440 adapter = &iface->adapter;
441 i2c_set_adapdata(adapter, iface);
2096b956 442 snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index);
1da177e4 443 adapter->owner = THIS_MODULE;
1da177e4 444 adapter->algo = &scx200_acb_algorithm;
3401b2ff 445 adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
12a917f6 446 adapter->dev.parent = dev;
1da177e4 447
3fb9a655 448 mutex_init(&iface->mutex);
1da177e4 449
80cd3a87
JC
450 return iface;
451}
452
de8255cc 453static int __devinit scx200_acb_create(struct scx200_acb_iface *iface)
80cd3a87
JC
454{
455 struct i2c_adapter *adapter;
456 int rc;
457
458 adapter = &iface->adapter;
1da177e4
LT
459
460 rc = scx200_acb_probe(iface);
461 if (rc) {
ef4d9275 462 printk(KERN_WARNING NAME ": probe failed\n");
80cd3a87 463 return rc;
1da177e4
LT
464 }
465
466 scx200_acb_reset(iface);
467
468 if (i2c_add_adapter(adapter) < 0) {
ef4d9275 469 printk(KERN_ERR NAME ": failed to register\n");
80cd3a87 470 return -ENODEV;
1da177e4
LT
471 }
472
de8255cc
AS
473 if (!adapter->dev.parent) {
474 /* If there's no dev, we're tracking (ISA) ifaces manually */
475 mutex_lock(&scx200_acb_list_mutex);
476 iface->next = scx200_acb_list;
477 scx200_acb_list = iface;
478 mutex_unlock(&scx200_acb_list_mutex);
479 }
1da177e4
LT
480
481 return 0;
80cd3a87 482}
1da177e4 483
de8255cc
AS
484static struct scx200_acb_iface * __devinit scx200_create_dev(const char *text,
485 unsigned long base, int index, struct device *dev)
80cd3a87
JC
486{
487 struct scx200_acb_iface *iface;
488 int rc;
489
de8255cc 490 iface = scx200_create_iface(text, dev, index);
80cd3a87
JC
491
492 if (iface == NULL)
de8255cc 493 return NULL;
80cd3a87 494
de8255cc
AS
495 if (!request_region(base, 8, iface->adapter.name)) {
496 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
497 base, base + 8 - 1);
80cd3a87
JC
498 goto errout_free;
499 }
500
de8255cc 501 iface->base = base;
80cd3a87
JC
502 rc = scx200_acb_create(iface);
503
504 if (rc == 0)
de8255cc 505 return iface;
80cd3a87 506
de8255cc 507 release_region(base, 8);
9b7b6d3b
BG
508 errout_free:
509 kfree(iface);
de8255cc 510 return NULL;
1da177e4
LT
511}
512
de8255cc 513static int __devinit scx200_probe(struct platform_device *pdev)
80cd3a87
JC
514{
515 struct scx200_acb_iface *iface;
de8255cc 516 struct resource *res;
80cd3a87 517
de8255cc
AS
518 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
519 if (!res) {
520 dev_err(&pdev->dev, "can't fetch device resource info\n");
521 return -ENODEV;
80cd3a87
JC
522 }
523
de8255cc
AS
524 iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
525 if (!iface)
526 return -EIO;
80cd3a87 527
de8255cc
AS
528 dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
529 iface->adapter.name);
530 platform_set_drvdata(pdev, iface);
1da177e4 531
de8255cc 532 return 0;
80cd3a87
JC
533}
534
de8255cc
AS
535static void __devexit scx200_cleanup_iface(struct scx200_acb_iface *iface)
536{
537 i2c_del_adapter(&iface->adapter);
538 release_region(iface->base, 8);
539 kfree(iface);
540}
16ffc5c9 541
de8255cc 542static int __devexit scx200_remove(struct platform_device *pdev)
16ffc5c9 543{
de8255cc 544 struct scx200_acb_iface *iface;
80cd3a87 545
de8255cc
AS
546 iface = platform_get_drvdata(pdev);
547 platform_set_drvdata(pdev, NULL);
548 scx200_cleanup_iface(iface);
80cd3a87 549
de8255cc
AS
550 return 0;
551}
80cd3a87 552
6fcf84a2 553static struct platform_driver scx200_pci_driver = {
de8255cc
AS
554 .driver = {
555 .name = "cs5535-smb",
556 .owner = THIS_MODULE,
557 },
558 .probe = scx200_probe,
559 .remove = __devexit_p(scx200_remove),
560};
80cd3a87 561
3527bd50 562static DEFINE_PCI_DEVICE_TABLE(scx200_isa) = {
de8255cc
AS
563 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
564 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
565 { 0, }
566};
80cd3a87 567
de8255cc
AS
568static __init void scx200_scan_isa(void)
569{
570 int i;
80cd3a87 571
de8255cc
AS
572 if (!pci_dev_present(scx200_isa))
573 return;
80cd3a87 574
de8255cc
AS
575 for (i = 0; i < MAX_DEVICES; ++i) {
576 if (base[i] == 0)
577 continue;
16ffc5c9 578
de8255cc
AS
579 /* XXX: should we care about failures? */
580 scx200_create_dev("SCx200", base[i], i, NULL);
16ffc5c9 581 }
16ffc5c9
BG
582}
583
1da177e4
LT
584static int __init scx200_acb_init(void)
585{
1da177e4
LT
586 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
587
de8255cc
AS
588 /* First scan for ISA-based devices */
589 scx200_scan_isa(); /* XXX: should we care about errors? */
1da177e4 590
6f9c2963
JD
591 /* If at least one bus was created, init must succeed */
592 if (scx200_acb_list)
593 return 0;
de8255cc
AS
594
595 /* No ISA devices; register the platform driver for PCI-based devices */
6fcf84a2 596 return platform_driver_register(&scx200_pci_driver);
1da177e4
LT
597}
598
599static void __exit scx200_acb_cleanup(void)
600{
601 struct scx200_acb_iface *iface;
99c3adb4 602
6fcf84a2 603 platform_driver_unregister(&scx200_pci_driver);
de8255cc 604
9d9c01ce 605 mutex_lock(&scx200_acb_list_mutex);
1da177e4
LT
606 while ((iface = scx200_acb_list) != NULL) {
607 scx200_acb_list = iface->next;
9d9c01ce 608 mutex_unlock(&scx200_acb_list_mutex);
1da177e4 609
de8255cc 610 scx200_cleanup_iface(iface);
80cd3a87 611
9d9c01ce 612 mutex_lock(&scx200_acb_list_mutex);
1da177e4 613 }
9d9c01ce 614 mutex_unlock(&scx200_acb_list_mutex);
1da177e4
LT
615}
616
617module_init(scx200_acb_init);
618module_exit(scx200_acb_cleanup);