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UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB		 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
25e341cf 27#include <linux/dmi.h>
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH		 29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945
JB		 31#include "i915_drv.h"
32#include "intel_bios.h"
33
9b9d172d 34#define SLAVE_ADDR1 0x70
35#define SLAVE_ADDR2 0x72
79e53945 36
500a8cc4
ZW		 37static int panel_type;
38
79e53945
JB		 39static void *
40find_section(struct bdb_header *bdb, int section_id)
41{
42 u8 *base = (u8 *)bdb;
43 int index = 0;
44 u16 total, current_size;
45 u8 current_id;
46
47 /* skip to first section */
48 index += bdb->header_size;
49 total = bdb->bdb_size;
50
51 /* walk the sections looking for section_id */
52 while (index < total) {
53 current_id = *(base + index);
54 index++;
55 current_size = *((u16 *)(base + index));
56 index += 2;
57 if (current_id == section_id)
58 return base + index;
59 index += current_size;
60 }
61
62 return NULL;
63}
64
db545019
DMEA		 65static u16
66get_blocksize(void *p)
67{
68 u16 *block_ptr, block_size;
69
70 block_ptr = (u16 *)((char *)p - 2);
71 block_size = *block_ptr;
72 return block_size;
73}
74
79e53945 75static void
88631706 76fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 77 const struct lvds_dvo_timing *dvo_timing)
88631706
ML		 78{
79 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
80 dvo_timing->hactive_lo;
81 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
82 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
83 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
84 dvo_timing->hsync_pulse_width;
85 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
86 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
87
88 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
89 dvo_timing->vactive_lo;
90 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
91 dvo_timing->vsync_off;
92 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
93 dvo_timing->vsync_pulse_width;
94 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
95 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
96 panel_fixed_mode->clock = dvo_timing->clock * 10;
97 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
98
9bc35499
AJ		 99 if (dvo_timing->hsync_positive)
100 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
101 else
102 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
103
104 if (dvo_timing->vsync_positive)
105 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
106 else
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
108
88631706
ML		 109 /* Some VBTs have bogus h/vtotal values */
110 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
111 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
112 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
113 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
114
115 drm_mode_set_name(panel_fixed_mode);
116}
117
99834ea4
CW		 118static bool
119lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
120 const struct lvds_dvo_timing *b)
121{
122 if (a->hactive_hi != b->hactive_hi ||
123 a->hactive_lo != b->hactive_lo)
124 return false;
125
126 if (a->hsync_off_hi != b->hsync_off_hi ||
127 a->hsync_off_lo != b->hsync_off_lo)
128 return false;
129
130 if (a->hsync_pulse_width != b->hsync_pulse_width)
131 return false;
132
133 if (a->hblank_hi != b->hblank_hi ||
134 a->hblank_lo != b->hblank_lo)
135 return false;
136
137 if (a->vactive_hi != b->vactive_hi ||
138 a->vactive_lo != b->vactive_lo)
139 return false;
140
141 if (a->vsync_off != b->vsync_off)
142 return false;
143
144 if (a->vsync_pulse_width != b->vsync_pulse_width)
145 return false;
146
147 if (a->vblank_hi != b->vblank_hi ||
148 a->vblank_lo != b->vblank_lo)
149 return false;
150
151 return true;
152}
153
154static const struct lvds_dvo_timing *
155get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
156 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
157 int index)
158{
159 /*
160 * the size of fp_timing varies on the different platform.
161 * So calculate the DVO timing relative offset in LVDS data
162 * entry to get the DVO timing entry
163 */
164
165 int lfp_data_size =
166 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
168 int dvo_timing_offset =
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
170 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
171 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
172
173 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
174}
175
b0354385
TI		 176/* get lvds_fp_timing entry
177 * this function may return NULL if the corresponding entry is invalid
178 */
179static const struct lvds_fp_timing *
180get_lvds_fp_timing(const struct bdb_header *bdb,
181 const struct bdb_lvds_lfp_data *data,
182 const struct bdb_lvds_lfp_data_ptrs *ptrs,
183 int index)
184{
185 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
186 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
187 size_t ofs;
188
189 if (index >= ARRAY_SIZE(ptrs->ptr))
190 return NULL;
191 ofs = ptrs->ptr[index].fp_timing_offset;
192 if (ofs < data_ofs ||
193 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
194 return NULL;
195 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
196}
197
88631706
ML		 198/* Try to find integrated panel data */
199static void
200parse_lfp_panel_data(struct drm_i915_private *dev_priv,
201 struct bdb_header *bdb)
79e53945 202{
99834ea4
CW		 203 const struct bdb_lvds_options *lvds_options;
204 const struct bdb_lvds_lfp_data *lvds_lfp_data;
205 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
206 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 207 const struct lvds_fp_timing *fp_timing;
79e53945 208 struct drm_display_mode *panel_fixed_mode;
99834ea4 209 int i, downclock;
79e53945 210
79e53945
JB		 211 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
212 if (!lvds_options)
213 return;
214
215 dev_priv->lvds_dither = lvds_options->pixel_dither;
216 if (lvds_options->panel_type == 0xff)
217 return;
6a04002b 218
500a8cc4 219 panel_type = lvds_options->panel_type;
79e53945
JB		 220
221 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
222 if (!lvds_lfp_data)
223 return;
224
1b16de0b
JB		 225 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
226 if (!lvds_lfp_data_ptrs)
227 return;
228
79e53945
JB		 229 dev_priv->lvds_vbt = 1;
230
99834ea4
CW		 231 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
232 lvds_lfp_data_ptrs,
233 lvds_options->panel_type);
79e53945 234
9a298b2a 235 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW		 236 if (!panel_fixed_mode)
237 return;
79e53945 238
99834ea4 239 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 240
88631706 241 dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 242
28c97730 243 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 244 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 245
d1fcea6a 246 /*
99834ea4
CW		 247 * Iterate over the LVDS panel timing info to find the lowest clock
248 * for the native resolution.
d1fcea6a 249 */
99834ea4 250 downclock = panel_dvo_timing->clock;
d1fcea6a 251 for (i = 0; i < 16; i++) {
99834ea4
CW		 252 const struct lvds_dvo_timing *dvo_timing;
253
254 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
255 lvds_lfp_data_ptrs,
256 i);
257 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
258 dvo_timing->clock < downclock)
259 downclock = dvo_timing->clock;
d1fcea6a 260 }
99834ea4
CW		 261
262 if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
d1fcea6a 263 dev_priv->lvds_downclock_avail = 1;
99834ea4 264 dev_priv->lvds_downclock = downclock * 10;
bbb0aef5
JP		 265 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
266 "Normal Clock %dKHz, downclock %dKHz\n",
99834ea4 267 panel_fixed_mode->clock, 10*downclock);
d1fcea6a 268 }
b0354385
TI		 269
270 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
271 lvds_lfp_data_ptrs,
272 lvds_options->panel_type);
273 if (fp_timing) {
274 /* check the resolution, just to be sure */
275 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
276 fp_timing->y_res == panel_fixed_mode->vdisplay) {
277 dev_priv->bios_lvds_val = fp_timing->lvds_reg_val;
278 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
279 dev_priv->bios_lvds_val);
280 }
281 }
88631706
ML		 282}
283
284/* Try to find sdvo panel data */
285static void
286parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
287 struct bdb_header *bdb)
288{
88631706
ML		 289 struct lvds_dvo_timing *dvo_timing;
290 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 291 int index;
79e53945 292
5a1e5b6c 293 index = i915_vbt_sdvo_panel_type;
c10e408a
MF		 294 if (index == -2) {
295 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
296 return;
297 }
298
5a1e5b6c
CW		 299 if (index == -1) {
300 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
301
302 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
303 if (!sdvo_lvds_options)
304 return;
305
306 index = sdvo_lvds_options->panel_type;
307 }
88631706
ML		 308
309 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
310 if (!dvo_timing)
311 return;
312
9a298b2a 313 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML		 314 if (!panel_fixed_mode)
315 return;
316
5a1e5b6c 317 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706
ML		 318
319 dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 320
5a1e5b6c
CW		 321 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
322 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB		 323}
324
9a4114ff
BF		 325static int intel_bios_ssc_frequency(struct drm_device *dev,
326 bool alternate)
327{
328 switch (INTEL_INFO(dev)->gen) {
329 case 2:
330 return alternate ? 66 : 48;
331 case 3:
332 case 4:
333 return alternate ? 100 : 96;
334 default:
335 return alternate ? 100 : 120;
336 }
337}
338
79e53945
JB		 339static void
340parse_general_features(struct drm_i915_private *dev_priv,
341 struct bdb_header *bdb)
342{
bad720ff 343 struct drm_device *dev = dev_priv->dev;
79e53945
JB		 344 struct bdb_general_features *general;
345
79e53945
JB		 346 general = find_section(bdb, BDB_GENERAL_FEATURES);
347 if (general) {
348 dev_priv->int_tv_support = general->int_tv_support;
349 dev_priv->int_crt_support = general->int_crt_support;
43565a06 350 dev_priv->lvds_use_ssc = general->enable_ssc;
9a4114ff
BF		 351 dev_priv->lvds_ssc_freq =
352 intel_bios_ssc_frequency(dev, general->ssc_freq);
abd06860
KP		 353 dev_priv->display_clock_mode = general->display_clock_mode;
354 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
562396b9
KP		 355 dev_priv->int_tv_support,
356 dev_priv->int_crt_support,
357 dev_priv->lvds_use_ssc,
abd06860
KP		 358 dev_priv->lvds_ssc_freq,
359 dev_priv->display_clock_mode);
79e53945
JB		 360 }
361}
362
db545019
DMEA		 363static void
364parse_general_definitions(struct drm_i915_private *dev_priv,
365 struct bdb_header *bdb)
366{
367 struct bdb_general_definitions *general;
db545019 368
db545019
DMEA		 369 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
370 if (general) {
371 u16 block_size = get_blocksize(general);
372 if (block_size >= sizeof(*general)) {
373 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 374 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
3bd7d909 375 if (intel_gmbus_is_port_valid(bus_pin))
2896b539 376 dev_priv->crt_ddc_pin = bus_pin;
db545019 377 } else {
28c97730 378 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 379 block_size);
db545019
DMEA		 380 }
381 }
382}
383
9b9d172d 384static void
385parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
44834a67 386 struct bdb_header *bdb)
9b9d172d 387{
388 struct sdvo_device_mapping *p_mapping;
389 struct bdb_general_definitions *p_defs;
390 struct child_device_config *p_child;
391 int i, child_device_num, count;
db545019 392 u16 block_size;
9b9d172d 393
394 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
395 if (!p_defs) {
44834a67 396 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 397 return;
398 }
399 /* judge whether the size of child device meets the requirements.
400 * If the child device size obtained from general definition block
401 * is different with sizeof(struct child_device_config), skip the
402 * parsing of sdvo device info
403 */
404 if (p_defs->child_dev_size != sizeof(*p_child)) {
405 /* different child dev size . Ignore it */
28c97730 406 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
9b9d172d 407 return;
408 }
409 /* get the block size of general definitions */
db545019 410 block_size = get_blocksize(p_defs);
9b9d172d 411 /* get the number of child device */
412 child_device_num = (block_size - sizeof(*p_defs)) /
413 sizeof(*p_child);
414 count = 0;
415 for (i = 0; i < child_device_num; i++) {
416 p_child = &(p_defs->devices[i]);
417 if (!p_child->device_type) {
418 /* skip the device block if device type is invalid */
419 continue;
420 }
421 if (p_child->slave_addr != SLAVE_ADDR1 &&
422 p_child->slave_addr != SLAVE_ADDR2) {
423 /*
424 * If the slave address is neither 0x70 nor 0x72,
425 * it is not a SDVO device. Skip it.
426 */
427 continue;
428 }
429 if (p_child->dvo_port != DEVICE_PORT_DVOB &&
430 p_child->dvo_port != DEVICE_PORT_DVOC) {
431 /* skip the incorrect SDVO port */
0206e353 432 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 433 continue;
434 }
28c97730
ZY		 435 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
436 " %s port\n",
9b9d172d 437 p_child->slave_addr,
438 (p_child->dvo_port == DEVICE_PORT_DVOB) ?
439 "SDVOB" : "SDVOC");
440 p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
441 if (!p_mapping->initialized) {
442 p_mapping->dvo_port = p_child->dvo_port;
443 p_mapping->slave_addr = p_child->slave_addr;
444 p_mapping->dvo_wiring = p_child->dvo_wiring;
b1083333 445 p_mapping->ddc_pin = p_child->ddc_pin;
e957d772 446 p_mapping->i2c_pin = p_child->i2c_pin;
9b9d172d 447 p_mapping->initialized = 1;
46eb3036 448 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW		 449 p_mapping->dvo_port,
450 p_mapping->slave_addr,
451 p_mapping->dvo_wiring,
452 p_mapping->ddc_pin,
46eb3036 453 p_mapping->i2c_pin);
9b9d172d 454 } else {
28c97730 455 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 456 "two SDVO device.\n");
457 }
458 if (p_child->slave2_addr) {
459 /* Maybe this is a SDVO device with multiple inputs */
460 /* And the mapping info is not added */
28c97730
ZY		 461 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
462 " is a SDVO device with multiple inputs.\n");
9b9d172d 463 }
464 count++;
465 }
466
467 if (!count) {
468 /* No SDVO device info is found */
28c97730 469 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 470 }
471 return;
472}
32f9d658
ZW		 473
474static void
475parse_driver_features(struct drm_i915_private *dev_priv,
476 struct bdb_header *bdb)
477{
478 struct drm_device *dev = dev_priv->dev;
479 struct bdb_driver_features *driver;
480
32f9d658 481 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB		 482 if (!driver)
483 return;
484
5ceb0f9b
CW		 485 if (SUPPORTS_EDP(dev) &&
486 driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
487 dev_priv->edp.support = 1;
652c393a 488
5ceb0f9b 489 if (driver->dual_frequency)
652c393a 490 dev_priv->render_reclock_avail = true;
32f9d658
ZW		 491}
492
500a8cc4
ZW		 493static void
494parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
495{
496 struct bdb_edp *edp;
9f0e7ff4
JB		 497 struct edp_power_seq *edp_pps;
498 struct edp_link_params *edp_link_params;
500a8cc4
ZW		 499
500 edp = find_section(bdb, BDB_EDP);
501 if (!edp) {
5ceb0f9b 502 if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) {
76e47c30 503 DRM_DEBUG_KMS("No eDP BDB found but eDP panel "
5ceb0f9b
CW		 504 "supported, assume %dbpp panel color "
505 "depth.\n",
506 dev_priv->edp.bpp);
500a8cc4
ZW		 507 }
508 return;
509 }
510
511 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
512 case EDP_18BPP:
5ceb0f9b 513 dev_priv->edp.bpp = 18;
500a8cc4
ZW		 514 break;
515 case EDP_24BPP:
5ceb0f9b 516 dev_priv->edp.bpp = 24;
500a8cc4
ZW		 517 break;
518 case EDP_30BPP:
5ceb0f9b 519 dev_priv->edp.bpp = 30;
500a8cc4
ZW		 520 break;
521 }
5ceb0f9b 522
9f0e7ff4
JB		 523 /* Get the eDP sequencing and link info */
524 edp_pps = &edp->power_seqs[panel_type];
525 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 526
9f0e7ff4 527 dev_priv->edp.pps = *edp_pps;
5ceb0f9b 528
9f0e7ff4
JB		 529 dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
530 DP_LINK_BW_1_62;
531 switch (edp_link_params->lanes) {
532 case 0:
533 dev_priv->edp.lanes = 1;
534 break;
535 case 1:
536 dev_priv->edp.lanes = 2;
537 break;
538 case 3:
539 default:
540 dev_priv->edp.lanes = 4;
541 break;
542 }
543 switch (edp_link_params->preemphasis) {
544 case 0:
545 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
546 break;
547 case 1:
548 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
549 break;
550 case 2:
551 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
552 break;
553 case 3:
554 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
555 break;
556 }
557 switch (edp_link_params->vswing) {
558 case 0:
559 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
560 break;
561 case 1:
562 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
563 break;
564 case 2:
565 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
566 break;
567 case 3:
568 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
569 break;
570 }
500a8cc4
ZW		 571}
572
6363ee6f
ZY		 573static void
574parse_device_mapping(struct drm_i915_private *dev_priv,
575 struct bdb_header *bdb)
576{
577 struct bdb_general_definitions *p_defs;
578 struct child_device_config *p_child, *child_dev_ptr;
579 int i, child_device_num, count;
580 u16 block_size;
581
582 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
583 if (!p_defs) {
44834a67 584 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY		 585 return;
586 }
587 /* judge whether the size of child device meets the requirements.
588 * If the child device size obtained from general definition block
589 * is different with sizeof(struct child_device_config), skip the
590 * parsing of sdvo device info
591 */
592 if (p_defs->child_dev_size != sizeof(*p_child)) {
593 /* different child dev size . Ignore it */
594 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
595 return;
596 }
597 /* get the block size of general definitions */
598 block_size = get_blocksize(p_defs);
599 /* get the number of child device */
600 child_device_num = (block_size - sizeof(*p_defs)) /
601 sizeof(*p_child);
602 count = 0;
603 /* get the number of child device that is present */
604 for (i = 0; i < child_device_num; i++) {
605 p_child = &(p_defs->devices[i]);
606 if (!p_child->device_type) {
607 /* skip the device block if device type is invalid */
608 continue;
609 }
610 count++;
611 }
612 if (!count) {
0206e353 613 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY		 614 return;
615 }
493dea28 616 dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
6363ee6f
ZY		 617 if (!dev_priv->child_dev) {
618 DRM_DEBUG_KMS("No memory space for child device\n");
619 return;
620 }
621
622 dev_priv->child_dev_num = count;
623 count = 0;
624 for (i = 0; i < child_device_num; i++) {
625 p_child = &(p_defs->devices[i]);
626 if (!p_child->device_type) {
627 /* skip the device block if device type is invalid */
628 continue;
629 }
630 child_dev_ptr = dev_priv->child_dev + count;
631 count++;
632 memcpy((void *)child_dev_ptr, (void *)p_child,
633 sizeof(*p_child));
634 }
635 return;
636}
44834a67 637
6a04002b
SQ		 638static void
639init_vbt_defaults(struct drm_i915_private *dev_priv)
640{
9a4114ff
BF		 641 struct drm_device *dev = dev_priv->dev;
642
6a04002b
SQ		 643 dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
644
645 /* LFP panel data */
646 dev_priv->lvds_dither = 1;
647 dev_priv->lvds_vbt = 0;
648
649 /* SDVO panel data */
650 dev_priv->sdvo_lvds_vbt_mode = NULL;
651
652 /* general features */
653 dev_priv->int_tv_support = 1;
654 dev_priv->int_crt_support = 1;
9a4114ff
BF		 655
656 /* Default to using SSC */
657 dev_priv->lvds_use_ssc = 1;
658 dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
562396b9 659 DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
6a04002b
SQ		 660
661 /* eDP data */
662 dev_priv->edp.bpp = 18;
663}
664
25e341cf
DV		 665static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
666{
667 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
668 "VBIOS ROM for %s\n",
669 id->ident);
670 return 1;
671}
672
673static const struct dmi_system_id intel_no_opregion_vbt[] = {
674 {
675 .callback = intel_no_opregion_vbt_callback,
676 .ident = "ThinkCentre A57",
677 .matches = {
678 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
679 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
680 },
681 },
682 { }
683};
684
79e53945 685/**
6d139a87 686 * intel_parse_bios - find VBT and initialize settings from the BIOS
79e53945
JB		 687 * @dev: DRM device
688 *
689 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
690 * to appropriate values.
691 *
79e53945
JB		 692 * Returns 0 on success, nonzero on failure.
693 */
0317c6ce 694int
6d139a87 695intel_parse_bios(struct drm_device *dev)
79e53945
JB		 696{
697 struct drm_i915_private *dev_priv = dev->dev_private;
698 struct pci_dev *pdev = dev->pdev;
44834a67
CW		 699 struct bdb_header *bdb = NULL;
700 u8 __iomem *bios = NULL;
701
6a04002b 702 init_vbt_defaults(dev_priv);
f899fc64 703
44834a67 704 /* XXX Should this validation be moved to intel_opregion.c? */
25e341cf 705 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
44834a67
CW		 706 struct vbt_header *vbt = dev_priv->opregion.vbt;
707 if (memcmp(vbt->signature, "$VBT", 4) == 0) {
562396b9 708 DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
44834a67
CW		 709 vbt->signature);
710 bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
711 } else
712 dev_priv->opregion.vbt = NULL;
79e53945
JB		 713 }
714
44834a67
CW		 715 if (bdb == NULL) {
716 struct vbt_header *vbt = NULL;
717 size_t size;
718 int i;
79e53945 719
44834a67
CW		 720 bios = pci_map_rom(pdev, &size);
721 if (!bios)
722 return -1;
723
724 /* Scour memory looking for the VBT signature */
725 for (i = 0; i + 4 < size; i++) {
726 if (!memcmp(bios + i, "$VBT", 4)) {
727 vbt = (struct vbt_header *)(bios + i);
728 break;
729 }
730 }
731
732 if (!vbt) {
bd45545f 733 DRM_DEBUG_DRIVER("VBT signature missing\n");
44834a67
CW		 734 pci_unmap_rom(pdev, bios);
735 return -1;
736 }
737
738 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
739 }
79e53945
JB		 740
741 /* Grab useful general definitions */
742 parse_general_features(dev_priv, bdb);
db545019 743 parse_general_definitions(dev_priv, bdb);
88631706
ML		 744 parse_lfp_panel_data(dev_priv, bdb);
745 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 746 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 747 parse_device_mapping(dev_priv, bdb);
32f9d658 748 parse_driver_features(dev_priv, bdb);
500a8cc4 749 parse_edp(dev_priv, bdb);
32f9d658 750
44834a67
CW		 751 if (bios)
752 pci_unmap_rom(pdev, bios);
79e53945
JB		 753
754 return 0;
755}
6d139a87
BF		 756
757/* Ensure that vital registers have been initialised, even if the BIOS
758 * is absent or just failing to do its job.
759 */
760void intel_setup_bios(struct drm_device *dev)
761{
762 struct drm_i915_private *dev_priv = dev->dev_private;
763
764 /* Set the Panel Power On/Off timings if uninitialized. */
765 if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
766 /* Set T2 to 40ms and T5 to 200ms */
767 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
768
769 /* Set T3 to 35ms and Tx to 200ms */
770 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
771 }
772}
kernel source for telekom puls (alcatel/mediatek)