Commit | Line | Data |
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1da177e4 LT |
1 | /****************************************************************************** |
2 | * | |
70958576 BM |
3 | * Name: hwsleep.c - ACPI Hardware Sleep/Wake Support functions for the |
4 | * original/legacy sleep/PM registers. | |
1da177e4 LT |
5 | * |
6 | *****************************************************************************/ | |
7 | ||
8 | /* | |
77848130 | 9 | * Copyright (C) 2000 - 2012, Intel Corp. |
1da177e4 LT |
10 | * All rights reserved. |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or without | |
13 | * modification, are permitted provided that the following conditions | |
14 | * are met: | |
15 | * 1. Redistributions of source code must retain the above copyright | |
16 | * notice, this list of conditions, and the following disclaimer, | |
17 | * without modification. | |
18 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer | |
19 | * substantially similar to the "NO WARRANTY" disclaimer below | |
20 | * ("Disclaimer") and any redistribution must be conditioned upon | |
21 | * including a substantially similar Disclaimer requirement for further | |
22 | * binary redistribution. | |
23 | * 3. Neither the names of the above-listed copyright holders nor the names | |
24 | * of any contributors may be used to endorse or promote products derived | |
25 | * from this software without specific prior written permission. | |
26 | * | |
27 | * Alternatively, this software may be distributed under the terms of the | |
28 | * GNU General Public License ("GPL") version 2 as published by the Free | |
29 | * Software Foundation. | |
30 | * | |
31 | * NO WARRANTY | |
32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
33 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
34 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
35 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
36 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
38 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
39 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
40 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
41 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
42 | * POSSIBILITY OF SUCH DAMAGES. | |
43 | */ | |
44 | ||
1da177e4 | 45 | #include <acpi/acpi.h> |
e2f7a777 | 46 | #include "accommon.h" |
69575d38 | 47 | #include <linux/tboot.h> |
cc4b859c | 48 | #include <linux/module.h> |
1da177e4 LT |
49 | |
50 | #define _COMPONENT ACPI_HARDWARE | |
4be44fcd | 51 | ACPI_MODULE_NAME("hwsleep") |
1da177e4 | 52 | |
70958576 | 53 | #if (!ACPI_REDUCED_HARDWARE) /* Entire module */ |
44f6c012 | 54 | /******************************************************************************* |
1da177e4 | 55 | * |
2feec47d | 56 | * FUNCTION: acpi_hw_legacy_sleep |
1da177e4 LT |
57 | * |
58 | * PARAMETERS: sleep_state - Which sleep state to enter | |
59 | * | |
60 | * RETURN: Status | |
61 | * | |
2feec47d | 62 | * DESCRIPTION: Enter a system sleep state via the legacy FADT PM registers |
1da177e4 LT |
63 | * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED |
64 | * | |
65 | ******************************************************************************/ | |
2feec47d | 66 | acpi_status acpi_hw_legacy_sleep(u8 sleep_state) |
1da177e4 | 67 | { |
4be44fcd LB |
68 | struct acpi_bit_register_info *sleep_type_reg_info; |
69 | struct acpi_bit_register_info *sleep_enable_reg_info; | |
2feec47d BM |
70 | u32 pm1a_control; |
71 | u32 pm1b_control; | |
4be44fcd LB |
72 | u32 in_value; |
73 | acpi_status status; | |
1da177e4 | 74 | |
2feec47d | 75 | ACPI_FUNCTION_TRACE(hw_legacy_sleep); |
1da177e4 | 76 | |
4be44fcd | 77 | sleep_type_reg_info = |
82d79b86 | 78 | acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE); |
4be44fcd LB |
79 | sleep_enable_reg_info = |
80 | acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE); | |
1da177e4 LT |
81 | |
82 | /* Clear wake status */ | |
83 | ||
768aaaf1 BM |
84 | status = |
85 | acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS, ACPI_CLEAR_STATUS); | |
4be44fcd LB |
86 | if (ACPI_FAILURE(status)) { |
87 | return_ACPI_STATUS(status); | |
1da177e4 LT |
88 | } |
89 | ||
90 | /* Clear all fixed and general purpose status bits */ | |
91 | ||
d8c71b6d | 92 | status = acpi_hw_clear_acpi_status(); |
4be44fcd LB |
93 | if (ACPI_FAILURE(status)) { |
94 | return_ACPI_STATUS(status); | |
1da177e4 LT |
95 | } |
96 | ||
2feec47d BM |
97 | if (sleep_state != ACPI_STATE_S5) { |
98 | /* | |
99 | * Disable BM arbitration. This feature is contained within an | |
100 | * optional register (PM2 Control), so ignore a BAD_ADDRESS | |
101 | * exception. | |
102 | */ | |
103 | status = acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); | |
104 | if (ACPI_FAILURE(status) && (status != AE_BAD_ADDRESS)) { | |
105 | return_ACPI_STATUS(status); | |
106 | } | |
107 | } | |
108 | ||
1da177e4 | 109 | /* |
23b168d4 | 110 | * 1) Disable/Clear all GPEs |
1da177e4 LT |
111 | * 2) Enable all wakeup GPEs |
112 | */ | |
1d99967b AS |
113 | status = acpi_hw_disable_all_gpes(); |
114 | if (ACPI_FAILURE(status)) { | |
115 | return_ACPI_STATUS(status); | |
116 | } | |
1da177e4 LT |
117 | acpi_gbl_system_awake_and_running = FALSE; |
118 | ||
4be44fcd LB |
119 | status = acpi_hw_enable_all_wakeup_gpes(); |
120 | if (ACPI_FAILURE(status)) { | |
121 | return_ACPI_STATUS(status); | |
1da177e4 LT |
122 | } |
123 | ||
2feec47d | 124 | /* Execute the _GTS method (Going To Sleep) */ |
c95d47a8 | 125 | |
4efeeecd | 126 | acpi_hw_execute_sleep_method(METHOD_PATHNAME__GTS, sleep_state); |
c95d47a8 | 127 | |
1da177e4 LT |
128 | /* Get current value of PM1A control */ |
129 | ||
32c9ef99 BM |
130 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, |
131 | &pm1a_control); | |
4be44fcd LB |
132 | if (ACPI_FAILURE(status)) { |
133 | return_ACPI_STATUS(status); | |
1da177e4 | 134 | } |
4be44fcd | 135 | ACPI_DEBUG_PRINT((ACPI_DB_INIT, |
b27d6597 | 136 | "Entering sleep state [S%u]\n", sleep_state)); |
1da177e4 | 137 | |
32c9ef99 | 138 | /* Clear the SLP_EN and SLP_TYP fields */ |
1da177e4 | 139 | |
32c9ef99 BM |
140 | pm1a_control &= ~(sleep_type_reg_info->access_bit_mask | |
141 | sleep_enable_reg_info->access_bit_mask); | |
142 | pm1b_control = pm1a_control; | |
1da177e4 | 143 | |
32c9ef99 | 144 | /* Insert the SLP_TYP bits */ |
1da177e4 | 145 | |
32c9ef99 | 146 | pm1a_control |= |
4be44fcd | 147 | (acpi_gbl_sleep_type_a << sleep_type_reg_info->bit_position); |
32c9ef99 | 148 | pm1b_control |= |
4be44fcd | 149 | (acpi_gbl_sleep_type_b << sleep_type_reg_info->bit_position); |
1da177e4 LT |
150 | |
151 | /* | |
152 | * We split the writes of SLP_TYP and SLP_EN to workaround | |
153 | * poorly implemented hardware. | |
154 | */ | |
155 | ||
32c9ef99 | 156 | /* Write #1: write the SLP_TYP data to the PM1 Control registers */ |
1da177e4 | 157 | |
32c9ef99 | 158 | status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control); |
4be44fcd LB |
159 | if (ACPI_FAILURE(status)) { |
160 | return_ACPI_STATUS(status); | |
1da177e4 LT |
161 | } |
162 | ||
32c9ef99 | 163 | /* Insert the sleep enable (SLP_EN) bit */ |
1da177e4 | 164 | |
32c9ef99 BM |
165 | pm1a_control |= sleep_enable_reg_info->access_bit_mask; |
166 | pm1b_control |= sleep_enable_reg_info->access_bit_mask; | |
1da177e4 | 167 | |
32c9ef99 | 168 | /* Flush caches, as per ACPI specification */ |
1da177e4 | 169 | |
4be44fcd | 170 | ACPI_FLUSH_CPU_CACHE(); |
1da177e4 | 171 | |
86886e55 JC |
172 | tboot_sleep(sleep_state, pm1a_control, pm1b_control); |
173 | ||
32c9ef99 | 174 | /* Write #2: Write both SLP_TYP + SLP_EN */ |
1da177e4 | 175 | |
32c9ef99 | 176 | status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control); |
4be44fcd LB |
177 | if (ACPI_FAILURE(status)) { |
178 | return_ACPI_STATUS(status); | |
1da177e4 LT |
179 | } |
180 | ||
181 | if (sleep_state > ACPI_STATE_S3) { | |
182 | /* | |
44f6c012 RM |
183 | * We wanted to sleep > S3, but it didn't happen (by virtue of the |
184 | * fact that we are still executing!) | |
1da177e4 | 185 | * |
44f6c012 RM |
186 | * Wait ten seconds, then try again. This is to get S4/S5 to work on |
187 | * all machines. | |
1da177e4 | 188 | * |
d4913dc6 BM |
189 | * We wait so long to allow chipsets that poll this reg very slowly |
190 | * to still read the right value. Ideally, this block would go | |
1da177e4 LT |
191 | * away entirely. |
192 | */ | |
4be44fcd LB |
193 | acpi_os_stall(10000000); |
194 | ||
d30dc9ab | 195 | status = acpi_hw_register_write(ACPI_REGISTER_PM1_CONTROL, |
4be44fcd LB |
196 | sleep_enable_reg_info-> |
197 | access_bit_mask); | |
198 | if (ACPI_FAILURE(status)) { | |
199 | return_ACPI_STATUS(status); | |
1da177e4 LT |
200 | } |
201 | } | |
202 | ||
2feec47d | 203 | /* Wait for transition back to Working State */ |
1da177e4 LT |
204 | |
205 | do { | |
50ffba1b BM |
206 | status = |
207 | acpi_read_bit_register(ACPI_BITREG_WAKE_STATUS, &in_value); | |
4be44fcd LB |
208 | if (ACPI_FAILURE(status)) { |
209 | return_ACPI_STATUS(status); | |
1da177e4 | 210 | } |
2feec47d | 211 | |
1da177e4 LT |
212 | } while (!in_value); |
213 | ||
4be44fcd | 214 | return_ACPI_STATUS(AE_OK); |
1da177e4 | 215 | } |
1da177e4 | 216 | |
44f6c012 | 217 | /******************************************************************************* |
1da177e4 | 218 | * |
2feec47d | 219 | * FUNCTION: acpi_hw_legacy_wake_prep |
1da177e4 | 220 | * |
2feec47d | 221 | * PARAMETERS: sleep_state - Which sleep state we just exited |
1da177e4 LT |
222 | * |
223 | * RETURN: Status | |
224 | * | |
c95d47a8 RW |
225 | * DESCRIPTION: Perform the first state of OS-independent ACPI cleanup after a |
226 | * sleep. | |
2feec47d | 227 | * Called with interrupts ENABLED. |
1da177e4 LT |
228 | * |
229 | ******************************************************************************/ | |
2feec47d BM |
230 | |
231 | acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state) | |
1da177e4 | 232 | { |
4be44fcd LB |
233 | acpi_status status; |
234 | struct acpi_bit_register_info *sleep_type_reg_info; | |
235 | struct acpi_bit_register_info *sleep_enable_reg_info; | |
32c9ef99 BM |
236 | u32 pm1a_control; |
237 | u32 pm1b_control; | |
1da177e4 | 238 | |
2feec47d | 239 | ACPI_FUNCTION_TRACE(hw_legacy_wake_prep); |
1da177e4 LT |
240 | |
241 | /* | |
242 | * Set SLP_TYPE and SLP_EN to state S0. | |
243 | * This is unclear from the ACPI Spec, but it is required | |
244 | * by some machines. | |
245 | */ | |
4be44fcd LB |
246 | status = acpi_get_sleep_type_data(ACPI_STATE_S0, |
247 | &acpi_gbl_sleep_type_a, | |
248 | &acpi_gbl_sleep_type_b); | |
249 | if (ACPI_SUCCESS(status)) { | |
250 | sleep_type_reg_info = | |
82d79b86 | 251 | acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE); |
4be44fcd LB |
252 | sleep_enable_reg_info = |
253 | acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE); | |
1da177e4 LT |
254 | |
255 | /* Get current value of PM1A control */ | |
256 | ||
d30dc9ab | 257 | status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL, |
32c9ef99 | 258 | &pm1a_control); |
4be44fcd | 259 | if (ACPI_SUCCESS(status)) { |
52fc0b02 | 260 | |
32c9ef99 | 261 | /* Clear the SLP_EN and SLP_TYP fields */ |
1da177e4 | 262 | |
32c9ef99 BM |
263 | pm1a_control &= ~(sleep_type_reg_info->access_bit_mask | |
264 | sleep_enable_reg_info-> | |
265 | access_bit_mask); | |
266 | pm1b_control = pm1a_control; | |
1da177e4 | 267 | |
32c9ef99 | 268 | /* Insert the SLP_TYP bits */ |
1da177e4 | 269 | |
d4913dc6 BM |
270 | pm1a_control |= (acpi_gbl_sleep_type_a << |
271 | sleep_type_reg_info->bit_position); | |
272 | pm1b_control |= (acpi_gbl_sleep_type_b << | |
273 | sleep_type_reg_info->bit_position); | |
1da177e4 | 274 | |
32c9ef99 | 275 | /* Write the control registers and ignore any errors */ |
1da177e4 | 276 | |
32c9ef99 BM |
277 | (void)acpi_hw_write_pm1_control(pm1a_control, |
278 | pm1b_control); | |
1da177e4 LT |
279 | } |
280 | } | |
281 | ||
4efeeecd | 282 | acpi_hw_execute_sleep_method(METHOD_PATHNAME__BFS, sleep_state); |
c95d47a8 RW |
283 | return_ACPI_STATUS(status); |
284 | } | |
285 | ||
286 | /******************************************************************************* | |
287 | * | |
2feec47d | 288 | * FUNCTION: acpi_hw_legacy_wake |
c95d47a8 RW |
289 | * |
290 | * PARAMETERS: sleep_state - Which sleep state we just exited | |
291 | * | |
292 | * RETURN: Status | |
293 | * | |
294 | * DESCRIPTION: Perform OS-independent ACPI cleanup after a sleep | |
295 | * Called with interrupts ENABLED. | |
296 | * | |
297 | ******************************************************************************/ | |
2feec47d BM |
298 | |
299 | acpi_status acpi_hw_legacy_wake(u8 sleep_state) | |
c95d47a8 | 300 | { |
c95d47a8 RW |
301 | acpi_status status; |
302 | ||
2feec47d | 303 | ACPI_FUNCTION_TRACE(hw_legacy_wake); |
c95d47a8 | 304 | |
1da177e4 LT |
305 | /* Ensure enter_sleep_state_prep -> enter_sleep_state ordering */ |
306 | ||
307 | acpi_gbl_sleep_type_a = ACPI_SLEEP_TYPE_INVALID; | |
4efeeecd | 308 | acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WAKING); |
1da177e4 | 309 | |
1da177e4 | 310 | /* |
79d2dfaa TR |
311 | * GPEs must be enabled before _WAK is called as GPEs |
312 | * might get fired there | |
313 | * | |
1da177e4 LT |
314 | * Restore the GPEs: |
315 | * 1) Disable/Clear all GPEs | |
316 | * 2) Enable all runtime GPEs | |
317 | */ | |
4be44fcd LB |
318 | status = acpi_hw_disable_all_gpes(); |
319 | if (ACPI_FAILURE(status)) { | |
320 | return_ACPI_STATUS(status); | |
1da177e4 | 321 | } |
2feec47d | 322 | |
4be44fcd LB |
323 | status = acpi_hw_enable_all_runtime_gpes(); |
324 | if (ACPI_FAILURE(status)) { | |
325 | return_ACPI_STATUS(status); | |
1da177e4 LT |
326 | } |
327 | ||
2feec47d BM |
328 | /* |
329 | * Now we can execute _WAK, etc. Some machines require that the GPEs | |
330 | * are enabled before the wake methods are executed. | |
331 | */ | |
4efeeecd | 332 | acpi_hw_execute_sleep_method(METHOD_PATHNAME__WAK, sleep_state); |
79d2dfaa | 333 | |
a68823ee | 334 | /* |
2feec47d BM |
335 | * Some BIOS code assumes that WAK_STS will be cleared on resume |
336 | * and use it to determine whether the system is rebooting or | |
337 | * resuming. Clear WAK_STS for compatibility. | |
a68823ee | 338 | */ |
50ffba1b | 339 | acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS, 1); |
79d2dfaa TR |
340 | acpi_gbl_system_awake_and_running = TRUE; |
341 | ||
1da177e4 LT |
342 | /* Enable power button */ |
343 | ||
4be44fcd | 344 | (void) |
50ffba1b | 345 | acpi_write_bit_register(acpi_gbl_fixed_event_info |
2feec47d BM |
346 | [ACPI_EVENT_POWER_BUTTON]. |
347 | enable_register_id, ACPI_ENABLE_EVENT); | |
44f6c012 | 348 | |
4be44fcd | 349 | (void) |
50ffba1b | 350 | acpi_write_bit_register(acpi_gbl_fixed_event_info |
2feec47d BM |
351 | [ACPI_EVENT_POWER_BUTTON]. |
352 | status_register_id, ACPI_CLEAR_STATUS); | |
1da177e4 | 353 | |
2feec47d BM |
354 | /* |
355 | * Enable BM arbitration. This feature is contained within an | |
356 | * optional register (PM2 Control), so ignore a BAD_ADDRESS | |
357 | * exception. | |
358 | */ | |
359 | status = acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); | |
360 | if (ACPI_FAILURE(status) && (status != AE_BAD_ADDRESS)) { | |
361 | return_ACPI_STATUS(status); | |
1da177e4 LT |
362 | } |
363 | ||
4efeeecd | 364 | acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WORKING); |
4be44fcd | 365 | return_ACPI_STATUS(status); |
1da177e4 | 366 | } |
8313524a | 367 | |
33620c54 | 368 | #endif /* !ACPI_REDUCED_HARDWARE */ |