MIPS: Add core files for MIPS SEAD-3 development platform.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / mti-sead3 / sead3-console.c
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/console.h>
10#include <linux/serial_reg.h>
11#include <linux/io.h>
12
13#define SEAD_UART1_REGS_BASE 0xbf000800 /* ttyS1 = DB9 port */
14#define SEAD_UART0_REGS_BASE 0xbf000900 /* ttyS0 = USB port */
15#define PORT(base_addr, offset) ((unsigned int __iomem *)(base_addr+(offset)*4))
16
17static char console_port = 1;
18
19static inline unsigned int serial_in(int offset, unsigned int base_addr)
20{
21 return __raw_readl(PORT(base_addr, offset)) & 0xff;
22}
23
24static inline void serial_out(int offset, int value, unsigned int base_addr)
25{
26 __raw_writel(value, PORT(base_addr, offset));
27}
28
29void __init prom_init_early_console(char port)
30{
31 console_port = port;
32}
33
34int prom_putchar(char c)
35{
36 unsigned int base_addr;
37
38 base_addr = console_port ? SEAD_UART1_REGS_BASE : SEAD_UART0_REGS_BASE;
39
40 while ((serial_in(UART_LSR, base_addr) & UART_LSR_THRE) == 0)
41 ;
42
43 serial_out(UART_TX, c, base_addr);
44
45 return 1;
46}