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ia64: switch to generic kernel_thread()/kernel_execve()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / entry.S
CommitLineData
1da177e4 1/*
f30c2269 2 * arch/ia64/kernel/entry.S
1da177e4
LT		 3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16/*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
4df8d22b
IY		 25/*
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
28 * pv_ops.
29 */
1da177e4
LT		 30/*
31 * Global (preserved) predicate usage on syscall entry/exit path:
32 *
33 * pKStk: See entry.h.
34 * pUStk: See entry.h.
35 * pSys: See entry.h.
36 * pNonSys: !pSys
37 */
38
1da177e4
LT		 39
40#include <asm/asmmacro.h>
41#include <asm/cache.h>
42#include <asm/errno.h>
43#include <asm/kregs.h>
39e01cb8 44#include <asm/asm-offsets.h>
1da177e4
LT		 45#include <asm/pgtable.h>
46#include <asm/percpu.h>
47#include <asm/processor.h>
48#include <asm/thread_info.h>
49#include <asm/unistd.h>
d3e75ff1 50#include <asm/ftrace.h>
1da177e4
LT		 51
52#include "minstate.h"
53
4df8d22b 54#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1da177e4
LT		 55 /*
56 * execve() is special because in case of success, we need to
57 * setup a null register window frame.
58 */
59ENTRY(ia64_execve)
60 /*
61 * Allocate 8 input registers since ptrace() may clobber them
62 */
63 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
64 alloc loc1=ar.pfs,8,2,4,0
65 mov loc0=rp
66 .body
67 mov out0=in0 // filename
68 ;; // stop bit between alloc and call
69 mov out1=in1 // argv
70 mov out2=in2 // envp
71 add out3=16,sp // regs
72 br.call.sptk.many rp=sys_execve
73.ret0:
1da177e4
LT		 74 cmp4.ge p6,p7=r8,r0
75 mov ar.pfs=loc1 // restore ar.pfs
76 sxt4 r8=r8 // return 64-bit result
77 ;;
78 stf.spill [sp]=f0
79(p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
80 mov rp=loc0
81(p6) mov ar.pfs=r0 // clear ar.pfs on success
82(p7) br.ret.sptk.many rp
83
84 /*
85 * In theory, we'd have to zap this state only to prevent leaking of
86 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
87 * this executes in less than 20 cycles even on Itanium, so it's not worth
88 * optimizing for...).
89 */
90 mov ar.unat=0; mov ar.lc=0
91 mov r4=0; mov f2=f0; mov b1=r0
92 mov r5=0; mov f3=f0; mov b2=r0
93 mov r6=0; mov f4=f0; mov b3=r0
94 mov r7=0; mov f5=f0; mov b4=r0
95 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
96 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
97 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
98 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
99 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
100 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
101 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
1da177e4
LT		 102 br.ret.sptk.many rp
103END(ia64_execve)
104
105/*
106 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
107 * u64 tls)
108 */
109GLOBAL_ENTRY(sys_clone2)
110 /*
111 * Allocate 8 input registers since ptrace() may clobber them
112 */
113 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
114 alloc r16=ar.pfs,8,2,6,0
115 DO_SAVE_SWITCH_STACK
116 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
117 mov loc0=rp
118 mov loc1=r16 // save ar.pfs across do_fork
119 .body
120 mov out1=in1
121 mov out3=in2
122 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
123 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
124 ;;
125(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
126 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
127 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
128 mov out0=in0 // out0 = clone_flags
129 br.call.sptk.many rp=do_fork
130.ret1: .restore sp
131 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
132 mov ar.pfs=loc1
133 mov rp=loc0
134 br.ret.sptk.many rp
135END(sys_clone2)
136
137/*
138 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
139 * Deprecated. Use sys_clone2() instead.
140 */
141GLOBAL_ENTRY(sys_clone)
142 /*
143 * Allocate 8 input registers since ptrace() may clobber them
144 */
145 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
146 alloc r16=ar.pfs,8,2,6,0
147 DO_SAVE_SWITCH_STACK
148 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
149 mov loc0=rp
150 mov loc1=r16 // save ar.pfs across do_fork
151 .body
152 mov out1=in1
153 mov out3=16 // stacksize (compensates for 16-byte scratch area)
154 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
155 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
156 ;;
157(p6) st8 [r2]=in4 // store TLS in r13 (tp)
158 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
159 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
160 mov out0=in0 // out0 = clone_flags
161 br.call.sptk.many rp=do_fork
162.ret2: .restore sp
163 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
164 mov ar.pfs=loc1
165 mov rp=loc0
166 br.ret.sptk.many rp
167END(sys_clone)
4df8d22b 168#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
1da177e4
LT		 169
170/*
171 * prev_task <- ia64_switch_to(struct task_struct *next)
172 * With Ingo's new scheduler, interrupts are disabled when this routine gets
173 * called. The code starting at .map relies on this. The rest of the code
174 * doesn't care about the interrupt masking status.
175 */
4df8d22b 176GLOBAL_ENTRY(__paravirt_switch_to)
1da177e4
LT		 177 .prologue
178 alloc r16=ar.pfs,1,0,0,0
179 DO_SAVE_SWITCH_STACK
180 .body
181
182 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
183 movl r25=init_task
184 mov r27=IA64_KR(CURRENT_STACK)
185 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
186 dep r20=0,in0,61,3 // physical address of "next"
187 ;;
188 st8 [r22]=sp // save kernel stack pointer of old task
189 shr.u r26=r20,IA64_GRANULE_SHIFT
190 cmp.eq p7,p6=r25,in0
191 ;;
192 /*
193 * If we've already mapped this task's page, we can skip doing it again.
194 */
195(p6) cmp.eq p7,p6=r26,r27
196(p6) br.cond.dpnt .map
197 ;;
198.done:
1da177e4 199 ld8 sp=[r21] // load kernel stack pointer of new task
4df8d22b 200 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
1da177e4
LT		 201 mov r8=r13 // return pointer to previously running task
202 mov r13=in0 // set "current" pointer
203 ;;
204 DO_LOAD_SWITCH_STACK
205
206#ifdef CONFIG_SMP
207 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
208#endif
209 br.ret.sptk.many rp // boogie on out in new context
210
211.map:
4df8d22b 212 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
1da177e4
LT		 213 movl r25=PAGE_KERNEL
214 ;;
215 srlz.d
216 or r23=r25,r20 // construct PA | page properties
217 mov r25=IA64_GRANULE_SHIFT<<2
218 ;;
4df8d22b
IY		 219 MOV_TO_ITIR(p0, r25, r8)
220 MOV_TO_IFA(in0, r8) // VA of next task...
1da177e4
LT		 221 ;;
222 mov r25=IA64_TR_CURRENT_STACK
4df8d22b 223 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
1da177e4
LT		 224 ;;
225 itr.d dtr[r25]=r23 // wire in new mapping...
4df8d22b 226 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
1da177e4 227 br.cond.sptk .done
4df8d22b 228END(__paravirt_switch_to)
1da177e4 229
4df8d22b 230#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1da177e4
LT		 231/*
232 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
233 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
234 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
235 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
236 * problem. Also, we don't need to specify unwind information for preserved registers
237 * that are not modified in save_switch_stack as the right unwind information is already
238 * specified at the call-site of save_switch_stack.
239 */
240
241/*
242 * save_switch_stack:
243 * - r16 holds ar.pfs
244 * - b7 holds address to return to
245 * - rp (b0) holds return address to save
246 */
247GLOBAL_ENTRY(save_switch_stack)
248 .prologue
249 .altrp b7
250 flushrs // flush dirty regs to backing store (must be first in insn group)
251 .save @priunat,r17
252 mov r17=ar.unat // preserve caller's
253 .body
254#ifdef CONFIG_ITANIUM
255 adds r2=16+128,sp
256 adds r3=16+64,sp
257 adds r14=SW(R4)+16,sp
258 ;;
259 st8.spill [r14]=r4,16 // spill r4
260 lfetch.fault.excl.nt1 [r3],128
261 ;;
262 lfetch.fault.excl.nt1 [r2],128
263 lfetch.fault.excl.nt1 [r3],128
264 ;;
265 lfetch.fault.excl [r2]
266 lfetch.fault.excl [r3]
267 adds r15=SW(R5)+16,sp
268#else
269 add r2=16+3*128,sp
270 add r3=16,sp
271 add r14=SW(R4)+16,sp
272 ;;
273 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
274 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
275 ;;
276 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
277 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
278 ;;
279 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
280 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
281 adds r15=SW(R5)+16,sp
282#endif
283 ;;
284 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
285 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
286 add r2=SW(F2)+16,sp // r2 = &sw->f2
287 ;;
288 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
289 mov.m r18=ar.fpsr // preserve fpsr
290 add r3=SW(F3)+16,sp // r3 = &sw->f3
291 ;;
292 stf.spill [r2]=f2,32
293 mov.m r19=ar.rnat
294 mov r21=b0
295
296 stf.spill [r3]=f3,32
297 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
298 mov r22=b1
299 ;;
300 // since we're done with the spills, read and save ar.unat:
301 mov.m r29=ar.unat
302 mov.m r20=ar.bspstore
303 mov r23=b2
304 stf.spill [r2]=f4,32
305 stf.spill [r3]=f5,32
306 mov r24=b3
307 ;;
308 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
309 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
310 mov r25=b4
311 mov r26=b5
312 ;;
313 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
314 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
315 mov r21=ar.lc // I-unit
316 stf.spill [r2]=f12,32
317 stf.spill [r3]=f13,32
318 ;;
319 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
320 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
321 stf.spill [r2]=f14,32
322 stf.spill [r3]=f15,32
323 ;;
324 st8 [r14]=r26 // save b5
325 st8 [r15]=r21 // save ar.lc
326 stf.spill [r2]=f16,32
327 stf.spill [r3]=f17,32
328 ;;
329 stf.spill [r2]=f18,32
330 stf.spill [r3]=f19,32
331 ;;
332 stf.spill [r2]=f20,32
333 stf.spill [r3]=f21,32
334 ;;
335 stf.spill [r2]=f22,32
336 stf.spill [r3]=f23,32
337 ;;
338 stf.spill [r2]=f24,32
339 stf.spill [r3]=f25,32
340 ;;
341 stf.spill [r2]=f26,32
342 stf.spill [r3]=f27,32
343 ;;
344 stf.spill [r2]=f28,32
345 stf.spill [r3]=f29,32
346 ;;
347 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
348 stf.spill [r3]=f31,SW(PR)-SW(F31)
349 add r14=SW(CALLER_UNAT)+16,sp
350 ;;
351 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
352 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
353 mov r21=pr
354 ;;
355 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
356 st8 [r3]=r21 // save predicate registers
357 ;;
358 st8 [r2]=r20 // save ar.bspstore
359 st8 [r14]=r18 // save fpsr
360 mov ar.rsc=3 // put RSE back into eager mode, pl 0
361 br.cond.sptk.many b7
362END(save_switch_stack)
363
364/*
365 * load_switch_stack:
366 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
367 * - b7 holds address to return to
368 * - must not touch r8-r11
369 */
4df8d22b 370GLOBAL_ENTRY(load_switch_stack)
1da177e4
LT		 371 .prologue
372 .altrp b7
373
374 .body
375 lfetch.fault.nt1 [sp]
376 adds r2=SW(AR_BSPSTORE)+16,sp
377 adds r3=SW(AR_UNAT)+16,sp
378 mov ar.rsc=0 // put RSE into enforced lazy mode
379 adds r14=SW(CALLER_UNAT)+16,sp
380 adds r15=SW(AR_FPSR)+16,sp
381 ;;
382 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
383 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
384 ;;
385 ld8 r21=[r2],16 // restore b0
386 ld8 r22=[r3],16 // restore b1
387 ;;
388 ld8 r23=[r2],16 // restore b2
389 ld8 r24=[r3],16 // restore b3
390 ;;
391 ld8 r25=[r2],16 // restore b4
392 ld8 r26=[r3],16 // restore b5
393 ;;
394 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
395 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
396 ;;
397 ld8 r28=[r2] // restore pr
398 ld8 r30=[r3] // restore rnat
399 ;;
400 ld8 r18=[r14],16 // restore caller's unat
401 ld8 r19=[r15],24 // restore fpsr
402 ;;
403 ldf.fill f2=[r14],32
404 ldf.fill f3=[r15],32
405 ;;
406 ldf.fill f4=[r14],32
407 ldf.fill f5=[r15],32
408 ;;
409 ldf.fill f12=[r14],32
410 ldf.fill f13=[r15],32
411 ;;
412 ldf.fill f14=[r14],32
413 ldf.fill f15=[r15],32
414 ;;
415 ldf.fill f16=[r14],32
416 ldf.fill f17=[r15],32
417 ;;
418 ldf.fill f18=[r14],32
419 ldf.fill f19=[r15],32
420 mov b0=r21
421 ;;
422 ldf.fill f20=[r14],32
423 ldf.fill f21=[r15],32
424 mov b1=r22
425 ;;
426 ldf.fill f22=[r14],32
427 ldf.fill f23=[r15],32
428 mov b2=r23
429 ;;
430 mov ar.bspstore=r27
431 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
432 mov b3=r24
433 ;;
434 ldf.fill f24=[r14],32
435 ldf.fill f25=[r15],32
436 mov b4=r25
437 ;;
438 ldf.fill f26=[r14],32
439 ldf.fill f27=[r15],32
440 mov b5=r26
441 ;;
442 ldf.fill f28=[r14],32
443 ldf.fill f29=[r15],32
444 mov ar.pfs=r16
445 ;;
446 ldf.fill f30=[r14],32
447 ldf.fill f31=[r15],24
448 mov ar.lc=r17
449 ;;
450 ld8.fill r4=[r14],16
451 ld8.fill r5=[r15],16
452 mov pr=r28,-1
453 ;;
454 ld8.fill r6=[r14],16
455 ld8.fill r7=[r15],16
456
457 mov ar.unat=r18 // restore caller's unat
458 mov ar.rnat=r30 // must restore after bspstore but before rsc!
459 mov ar.fpsr=r19 // restore fpsr
460 mov ar.rsc=3 // put RSE back into eager mode, pl 0
461 br.cond.sptk.many b7
462END(load_switch_stack)
463
383f2835
KC		 464GLOBAL_ENTRY(prefetch_stack)
465 add r14 = -IA64_SWITCH_STACK_SIZE, sp
466 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
467 ;;
468 ld8 r16 = [r15] // load next's stack pointer
469 lfetch.fault.excl [r14], 128
470 ;;
471 lfetch.fault.excl [r14], 128
472 lfetch.fault [r16], 128
473 ;;
474 lfetch.fault.excl [r14], 128
475 lfetch.fault [r16], 128
476 ;;
477 lfetch.fault.excl [r14], 128
478 lfetch.fault [r16], 128
479 ;;
480 lfetch.fault.excl [r14], 128
481 lfetch.fault [r16], 128
482 ;;
483 lfetch.fault [r16], 128
484 br.ret.sptk.many rp
24b8e0cc 485END(prefetch_stack)
383f2835 486
1da177e4
LT		 487 /*
488 * Invoke a system call, but do some tracing before and after the call.
489 * We MUST preserve the current register frame throughout this routine
490 * because some system calls (such as ia64_execve) directly
491 * manipulate ar.pfs.
492 */
493GLOBAL_ENTRY(ia64_trace_syscall)
494 PT_REGS_UNWIND_INFO(0)
495 /*
496 * We need to preserve the scratch registers f6-f11 in case the system
497 * call is sigreturn.
498 */
499 adds r16=PT(F6)+16,sp
500 adds r17=PT(F7)+16,sp
501 ;;
502 stf.spill [r16]=f6,32
503 stf.spill [r17]=f7,32
504 ;;
505 stf.spill [r16]=f8,32
506 stf.spill [r17]=f9,32
507 ;;
508 stf.spill [r16]=f10
509 stf.spill [r17]=f11
510 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
f14488cc
SL		 511 cmp.lt p6,p0=r8,r0 // check tracehook
512 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
513 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
514 mov r10=0
515(p6) br.cond.sptk strace_error // syscall failed ->
1da177e4
LT		 516 adds r16=PT(F6)+16,sp
517 adds r17=PT(F7)+16,sp
518 ;;
519 ldf.fill f6=[r16],32
520 ldf.fill f7=[r17],32
521 ;;
522 ldf.fill f8=[r16],32
523 ldf.fill f9=[r17],32
524 ;;
525 ldf.fill f10=[r16]
526 ldf.fill f11=[r17]
527 // the syscall number may have changed, so re-load it and re-calculate the
528 // syscall entry-point:
529 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
530 ;;
531 ld8 r15=[r15]
532 mov r3=NR_syscalls - 1
533 ;;
534 adds r15=-1024,r15
535 movl r16=sys_call_table
536 ;;
537 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
538 cmp.leu p6,p7=r15,r3
539 ;;
540(p6) ld8 r20=[r20] // load address of syscall entry point
541(p7) movl r20=sys_ni_syscall
542 ;;
543 mov b6=r20
544 br.call.sptk.many rp=b6 // do the syscall
545.strace_check_retval:
546 cmp.lt p6,p0=r8,r0 // syscall failed?
547 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
548 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
549 mov r10=0
550(p6) br.cond.sptk strace_error // syscall failed ->
551 ;; // avoid RAW on r10
552.strace_save_retval:
553.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
554.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
555 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
6f6d7582
JS		 556.ret3:
557(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
38477ad7 558(pUStk) rsm psr.i // disable interrupts
4df8d22b 559 br.cond.sptk ia64_work_pending_syscall_end
1da177e4
LT		 560
561strace_error:
562 ld8 r3=[r2] // load pt_regs.r8
563 sub r9=0,r8 // negate return value to get errno value
564 ;;
565 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
566 adds r3=16,r2 // r3=&pt_regs.r10
567 ;;
568(p6) mov r10=-1
569(p6) mov r8=r9
570 br.cond.sptk .strace_save_retval
571END(ia64_trace_syscall)
572
573 /*
574 * When traced and returning from sigreturn, we invoke syscall_trace but then
575 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
576 */
577GLOBAL_ENTRY(ia64_strace_leave_kernel)
578 PT_REGS_UNWIND_INFO(0)
579{ /*
580 * Some versions of gas generate bad unwind info if the first instruction of a
581 * procedure doesn't go into the first slot of a bundle. This is a workaround.
582 */
583 nop.m 0
584 nop.i 0
585 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
586}
587.ret4: br.cond.sptk ia64_leave_kernel
588END(ia64_strace_leave_kernel)
589
54d496c3
AV		 590ENTRY(call_payload)
591 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
592 /* call the kernel_thread payload; fn is in r4, arg - in r5 */
593 alloc loc1=ar.pfs,0,3,1,0
594 mov loc0=rp
595 mov loc2=gp
596 mov out0=r5 // arg
597 ld8 r14 = [r4], 8 // fn.address
598 ;;
599 mov b6 = r14
600 ld8 gp = [r4] // fn.gp
601 ;;
602 br.call.sptk.many rp=b6 // fn(arg)
603.ret12: mov gp=loc2
604 mov rp=loc0
605 mov ar.pfs=loc1
606 /* ... and if it has returned, we are going to userland */
607 cmp.ne pKStk,pUStk=r0,r0
608 br.ret.sptk.many rp
609END(call_payload)
610
1da177e4
LT		 611GLOBAL_ENTRY(ia64_ret_from_clone)
612 PT_REGS_UNWIND_INFO(0)
613{ /*
614 * Some versions of gas generate bad unwind info if the first instruction of a
615 * procedure doesn't go into the first slot of a bundle. This is a workaround.
616 */
617 nop.m 0
618 nop.i 0
619 /*
620 * We need to call schedule_tail() to complete the scheduling process.
621 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
622 * address of the previously executing task.
623 */
624 br.call.sptk.many rp=ia64_invoke_schedule_tail
625}
626.ret8:
54d496c3 627(pKStk) br.call.sptk.many rp=call_payload
1da177e4
LT		 628 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
629 ;;
630 ld4 r2=[r2]
631 ;;
632 mov r8=0
633 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
634 ;;
635 cmp.ne p6,p0=r2,r0
636(p6) br.cond.spnt .strace_check_retval
637 ;; // added stop bits to prevent r8 dependency
638END(ia64_ret_from_clone)
639 // fall through
640GLOBAL_ENTRY(ia64_ret_from_syscall)
641 PT_REGS_UNWIND_INFO(0)
642 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
643 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
644 mov r10=r0 // clear error indication in r10
645(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
4df8d22b
IY		 646#ifdef CONFIG_PARAVIRT
647 ;;
648 br.cond.sptk.few ia64_leave_syscall
649 ;;
650#endif /* CONFIG_PARAVIRT */
1da177e4 651END(ia64_ret_from_syscall)
4df8d22b 652#ifndef CONFIG_PARAVIRT
1da177e4 653 // fall through
4df8d22b
IY		 654#endif
655#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
656
1da177e4
LT		 657/*
658 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
659 * need to switch to bank 0 and doesn't restore the scratch registers.
660 * To avoid leaking kernel bits, the scratch registers are set to
661 * the following known-to-be-safe values:
662 *
663 * r1: restored (global pointer)
664 * r2: cleared
665 * r3: 1 (when returning to user-level)
666 * r8-r11: restored (syscall return value(s))
667 * r12: restored (user-level stack pointer)
668 * r13: restored (user-level thread pointer)
c03f058f 669 * r14: set to __kernel_syscall_via_epc
1da177e4
LT		 670 * r15: restored (syscall #)
671 * r16-r17: cleared
672 * r18: user-level b6
673 * r19: cleared
674 * r20: user-level ar.fpsr
675 * r21: user-level b0
676 * r22: cleared
677 * r23: user-level ar.bspstore
678 * r24: user-level ar.rnat
679 * r25: user-level ar.unat
680 * r26: user-level ar.pfs
681 * r27: user-level ar.rsc
682 * r28: user-level ip
683 * r29: user-level psr
684 * r30: user-level cfm
685 * r31: user-level pr
686 * f6-f11: cleared
687 * pr: restored (user-level pr)
688 * b0: restored (user-level rp)
689 * b6: restored
c03f058f 690 * b7: set to __kernel_syscall_via_epc
1da177e4
LT		 691 * ar.unat: restored (user-level ar.unat)
692 * ar.pfs: restored (user-level ar.pfs)
693 * ar.rsc: restored (user-level ar.rsc)
694 * ar.rnat: restored (user-level ar.rnat)
695 * ar.bspstore: restored (user-level ar.bspstore)
696 * ar.fpsr: restored (user-level ar.fpsr)
697 * ar.ccv: cleared
698 * ar.csd: cleared
699 * ar.ssd: cleared
700 */
4df8d22b 701GLOBAL_ENTRY(__paravirt_leave_syscall)
1da177e4
LT		 702 PT_REGS_UNWIND_INFO(0)
703 /*
704 * work.need_resched etc. mustn't get changed by this CPU before it returns to
705 * user- or fsys-mode, hence we disable interrupts early on.
706 *
707 * p6 controls whether current_thread_info()->flags needs to be check for
708 * extra work. We always check for extra work when returning to user-level.
709 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
710 * is 0. After extra work processing has been completed, execution
4df8d22b 711 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
1da177e4
LT		 712 * needs to be redone.
713 */
714#ifdef CONFIG_PREEMPT
4df8d22b 715 RSM_PSR_I(p0, r2, r18) // disable interrupts
1da177e4
LT		 716 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
717(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
718 ;;
719 .pred.rel.mutex pUStk,pKStk
720(pKStk) ld4 r21=[r20] // r21 <- preempt_count
721(pUStk) mov r21=0 // r21 <- 0
722 ;;
723 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
724#else /* !CONFIG_PREEMPT */
4df8d22b 725 RSM_PSR_I(pUStk, r2, r18)
1da177e4
LT		 726 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
727(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
728#endif
4df8d22b
IY		 729.global __paravirt_work_processed_syscall;
730__paravirt_work_processed_syscall:
b64f34cd
HS		 731#ifdef CONFIG_VIRT_CPU_ACCOUNTING
732 adds r2=PT(LOADRS)+16,r12
94752a79 733 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
b64f34cd
HS		 734 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
735 ;;
736(p6) ld4 r31=[r18] // load current_thread_info()->flags
737 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
738 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
739 ;;
740#else
1da177e4
LT		 741 adds r2=PT(LOADRS)+16,r12
742 adds r3=PT(AR_BSPSTORE)+16,r12
743 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
744 ;;
745(p6) ld4 r31=[r18] // load current_thread_info()->flags
746 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
96e01749 747 nop.i 0
1da177e4 748 ;;
b64f34cd 749#endif
87e522a0 750 mov r16=ar.bsp // M2 get existing backing store pointer
1da177e4
LT		 751 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
752(p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
753 ;;
87e522a0 754 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
1da177e4
LT		 755(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
756(p6) br.cond.spnt .work_pending_syscall
757 ;;
758 // start restoring the state saved on the kernel stack (struct pt_regs):
759 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
760 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
87e522a0 761(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
1da177e4
LT		 762 ;;
763 invala // M0|1 invalidate ALAT
4df8d22b 764 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
c03f058f 765 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
1da177e4 766
c03f058f
DMT		 767 ld8 r29=[r2],16 // M0|1 load cr.ipsr
768 ld8 r28=[r3],16 // M0|1 load cr.iip
b64f34cd
HS		 769#ifdef CONFIG_VIRT_CPU_ACCOUNTING
770(pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
771 ;;
772 ld8 r30=[r2],16 // M0|1 load cr.ifs
773 ld8 r25=[r3],16 // M0|1 load ar.unat
774(pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
775 ;;
776#else
c03f058f 777 mov r22=r0 // A clear r22
1da177e4
LT		 778 ;;
779 ld8 r30=[r2],16 // M0|1 load cr.ifs
1da177e4 780 ld8 r25=[r3],16 // M0|1 load ar.unat
87e522a0 781(pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
1da177e4 782 ;;
b64f34cd 783#endif
1da177e4 784 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
4df8d22b 785 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
87e522a0 786 nop 0
1da177e4 787 ;;
c03f058f
DMT		 788 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
789 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
790 mov f6=f0 // F clear f6
1da177e4 791 ;;
c03f058f
DMT		 792 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
793 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
794 mov f7=f0 // F clear f7
1da177e4 795 ;;
c03f058f
DMT		 796 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
797 ld8.fill r1=[r3],16 // M0|1 load r1
798(pUStk) mov r17=1 // A
1da177e4 799 ;;
b64f34cd
HS		 800#ifdef CONFIG_VIRT_CPU_ACCOUNTING
801(pUStk) st1 [r15]=r17 // M2|3
802#else
c03f058f 803(pUStk) st1 [r14]=r17 // M2|3
b64f34cd 804#endif
c03f058f
DMT		 805 ld8.fill r13=[r3],16 // M0|1
806 mov f8=f0 // F clear f8
1da177e4 807 ;;
c03f058f
DMT		 808 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
809 ld8.fill r15=[r3] // M0|1 restore r15
810 mov b6=r18 // I0 restore b6
30325d17 811
a0776ec8 812 LOAD_PHYS_STACK_REG_SIZE(r17)
c03f058f
DMT		 813 mov f9=f0 // F clear f9
814(pKStk) br.cond.dpnt.many skip_rbs_switch // B
87e522a0 815
c03f058f
DMT		 816 srlz.d // M0 ensure interruption collection is off (for cover)
817 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
4df8d22b 818 COVER // B add current frame into dirty partition & set cr.ifs
1da177e4 819 ;;
b64f34cd
HS		 820#ifdef CONFIG_VIRT_CPU_ACCOUNTING
821 mov r19=ar.bsp // M2 get new backing store pointer
822 st8 [r14]=r22 // M save time at leave
823 mov f10=f0 // F clear f10
824
825 mov r22=r0 // A clear r22
826 movl r14=__kernel_syscall_via_epc // X
827 ;;
828#else
c03f058f
DMT		 829 mov r19=ar.bsp // M2 get new backing store pointer
830 mov f10=f0 // F clear f10
96e01749
DMT		 831
832 nop.m 0
c03f058f 833 movl r14=__kernel_syscall_via_epc // X
1da177e4 834 ;;
b64f34cd 835#endif
c03f058f
DMT		 836 mov.m ar.csd=r0 // M2 clear ar.csd
837 mov.m ar.ccv=r0 // M2 clear ar.ccv
838 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
1da177e4 839
c03f058f
DMT		 840 mov.m ar.ssd=r0 // M2 clear ar.ssd
841 mov f11=f0 // F clear f11
842 br.cond.sptk.many rbs_switch // B
4df8d22b 843END(__paravirt_leave_syscall)
1da177e4 844
4df8d22b 845GLOBAL_ENTRY(__paravirt_leave_kernel)
1da177e4
LT		 846 PT_REGS_UNWIND_INFO(0)
847 /*
848 * work.need_resched etc. mustn't get changed by this CPU before it returns to
849 * user- or fsys-mode, hence we disable interrupts early on.
850 *
851 * p6 controls whether current_thread_info()->flags needs to be check for
852 * extra work. We always check for extra work when returning to user-level.
853 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
854 * is 0. After extra work processing has been completed, execution
855 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
856 * needs to be redone.
857 */
858#ifdef CONFIG_PREEMPT
4df8d22b 859 RSM_PSR_I(p0, r17, r31) // disable interrupts
1da177e4
LT		 860 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
861(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
862 ;;
863 .pred.rel.mutex pUStk,pKStk
864(pKStk) ld4 r21=[r20] // r21 <- preempt_count
865(pUStk) mov r21=0 // r21 <- 0
866 ;;
867 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
868#else
4df8d22b 869 RSM_PSR_I(pUStk, r17, r31)
1da177e4
LT		 870 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
871(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
872#endif
873.work_processed_kernel:
874 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
875 ;;
876(p6) ld4 r31=[r17] // load current_thread_info()->flags
877 adds r21=PT(PR)+16,r12
878 ;;
879
880 lfetch [r21],PT(CR_IPSR)-PT(PR)
881 adds r2=PT(B6)+16,r12
882 adds r3=PT(R16)+16,r12
883 ;;
884 lfetch [r21]
885 ld8 r28=[r2],8 // load b6
886 adds r29=PT(R24)+16,r12
887
888 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
889 adds r30=PT(AR_CCV)+16,r12
890(p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
891 ;;
892 ld8.fill r24=[r29]
893 ld8 r15=[r30] // load ar.ccv
894(p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
895 ;;
896 ld8 r29=[r2],16 // load b7
897 ld8 r30=[r3],16 // load ar.csd
898(p6) br.cond.spnt .work_pending
899 ;;
900 ld8 r31=[r2],16 // load ar.ssd
901 ld8.fill r8=[r3],16
902 ;;
903 ld8.fill r9=[r2],16
904 ld8.fill r10=[r3],PT(R17)-PT(R10)
905 ;;
906 ld8.fill r11=[r2],PT(R18)-PT(R11)
907 ld8.fill r17=[r3],16
908 ;;
909 ld8.fill r18=[r2],16
910 ld8.fill r19=[r3],16
911 ;;
912 ld8.fill r20=[r2],16
913 ld8.fill r21=[r3],16
914 mov ar.csd=r30
915 mov ar.ssd=r31
916 ;;
4df8d22b 917 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
1da177e4
LT		 918 invala // invalidate ALAT
919 ;;
920 ld8.fill r22=[r2],24
921 ld8.fill r23=[r3],24
922 mov b6=r28
923 ;;
924 ld8.fill r25=[r2],16
925 ld8.fill r26=[r3],16
926 mov b7=r29
927 ;;
928 ld8.fill r27=[r2],16
929 ld8.fill r28=[r3],16
930 ;;
931 ld8.fill r29=[r2],16
932 ld8.fill r30=[r3],24
933 ;;
934 ld8.fill r31=[r2],PT(F9)-PT(R31)
935 adds r3=PT(F10)-PT(F6),r3
936 ;;
937 ldf.fill f9=[r2],PT(F6)-PT(F9)
938 ldf.fill f10=[r3],PT(F8)-PT(F10)
939 ;;
940 ldf.fill f6=[r2],PT(F7)-PT(F6)
941 ;;
942 ldf.fill f7=[r2],PT(F11)-PT(F7)
943 ldf.fill f8=[r3],32
944 ;;
e7e965fa 945 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1da177e4
LT		 946 mov ar.ccv=r15
947 ;;
948 ldf.fill f11=[r2]
4df8d22b 949 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
1da177e4
LT		 950 ;;
951(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
952 adds r16=PT(CR_IPSR)+16,r12
953 adds r17=PT(CR_IIP)+16,r12
954
b64f34cd
HS		 955#ifdef CONFIG_VIRT_CPU_ACCOUNTING
956 .pred.rel.mutex pUStk,pKStk
4df8d22b 957 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
94752a79 958 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
b64f34cd
HS		 959 nop.i 0
960 ;;
961#else
4df8d22b 962 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
1da177e4
LT		 963 nop.i 0
964 nop.i 0
965 ;;
b64f34cd 966#endif
1da177e4
LT		 967 ld8 r29=[r16],16 // load cr.ipsr
968 ld8 r28=[r17],16 // load cr.iip
969 ;;
970 ld8 r30=[r16],16 // load cr.ifs
971 ld8 r25=[r17],16 // load ar.unat
972 ;;
973 ld8 r26=[r16],16 // load ar.pfs
974 ld8 r27=[r17],16 // load ar.rsc
975 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
976 ;;
977 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
978 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
979 ;;
980 ld8 r31=[r16],16 // load predicates
981 ld8 r21=[r17],16 // load b0
982 ;;
983 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
984 ld8.fill r1=[r17],16 // load r1
985 ;;
986 ld8.fill r12=[r16],16
987 ld8.fill r13=[r17],16
b64f34cd
HS		 988#ifdef CONFIG_VIRT_CPU_ACCOUNTING
989(pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
990#else
1da177e4 991(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
b64f34cd 992#endif
1da177e4
LT		 993 ;;
994 ld8 r20=[r16],16 // ar.fpsr
995 ld8.fill r15=[r17],16
b64f34cd
HS		 996#ifdef CONFIG_VIRT_CPU_ACCOUNTING
997(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
998#endif
1da177e4
LT		 999 ;;
1000 ld8.fill r14=[r16],16
1001 ld8.fill r2=[r17]
1002(pUStk) mov r17=1
1003 ;;
b64f34cd
HS		 1004#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1005 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
1006 // mib : mov add br -> mib : ld8 add br
1007 // bbb_ : br nop cover;; mbb_ : mov br cover;;
1008 //
1009 // no one require bsp in r16 if (pKStk) branch is selected.
1010(pUStk) st8 [r3]=r22 // save time at leave
1011(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1012 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1013 ;;
1014 ld8.fill r3=[r16] // deferred
1015 LOAD_PHYS_STACK_REG_SIZE(r17)
1016(pKStk) br.cond.dpnt skip_rbs_switch
1017 mov r16=ar.bsp // get existing backing store pointer
1018#else
1da177e4
LT		 1019 ld8.fill r3=[r16]
1020(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1021 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1022 ;;
1023 mov r16=ar.bsp // get existing backing store pointer
a0776ec8 1024 LOAD_PHYS_STACK_REG_SIZE(r17)
1da177e4 1025(pKStk) br.cond.dpnt skip_rbs_switch
b64f34cd 1026#endif
1da177e4
LT		 1027
1028 /*
1029 * Restore user backing store.
1030 *
1031 * NOTE: alloc, loadrs, and cover can't be predicated.
1032 */
1033(pNonSys) br.cond.dpnt dont_preserve_current_frame
4df8d22b 1034 COVER // add current frame into dirty partition and set cr.ifs
1da177e4
LT		 1035 ;;
1036 mov r19=ar.bsp // get new backing store pointer
87e522a0 1037rbs_switch:
1da177e4
LT		 1038 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1039 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1040 ;;
1041 sub r19=r19,r16 // calculate total byte size of dirty partition
1042 add r18=64,r18 // don't force in0-in7 into memory...
1043 ;;
1044 shl r19=r19,16 // shift size of dirty partition into loadrs position
1045 ;;
1046dont_preserve_current_frame:
1047 /*
1048 * To prevent leaking bits between the kernel and user-space,
1049 * we must clear the stacked registers in the "invalid" partition here.
1050 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1051 * 5 registers/cycle on McKinley).
1052 */
1053# define pRecurse p6
1054# define pReturn p7
1055#ifdef CONFIG_ITANIUM
1056# define Nregs 10
1057#else
1058# define Nregs 14
1059#endif
1060 alloc loc0=ar.pfs,2,Nregs-2,2,0
1061 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1062 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1063 ;;
1064 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1065 shladd in0=loc1,3,r17
1066 mov in1=0
1067 ;;
1068 TEXT_ALIGN(32)
1069rse_clear_invalid:
1070#ifdef CONFIG_ITANIUM
1071 // cycle 0
1072 { .mii
1073 alloc loc0=ar.pfs,2,Nregs-2,2,0
1074 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1075 add out0=-Nregs*8,in0
1076}{ .mfb
1077 add out1=1,in1 // increment recursion count
1078 nop.f 0
1079 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1080 ;;
1081}{ .mfi // cycle 1
1082 mov loc1=0
1083 nop.f 0
1084 mov loc2=0
1085}{ .mib
1086 mov loc3=0
1087 mov loc4=0
1088(pRecurse) br.call.sptk.many b0=rse_clear_invalid
1089
1090}{ .mfi // cycle 2
1091 mov loc5=0
1092 nop.f 0
1093 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1094}{ .mib
1095 mov loc6=0
1096 mov loc7=0
1097(pReturn) br.ret.sptk.many b0
1098}
1099#else /* !CONFIG_ITANIUM */
1100 alloc loc0=ar.pfs,2,Nregs-2,2,0
1101 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1102 add out0=-Nregs*8,in0
1103 add out1=1,in1 // increment recursion count
1104 mov loc1=0
1105 mov loc2=0
1106 ;;
1107 mov loc3=0
1108 mov loc4=0
1109 mov loc5=0
1110 mov loc6=0
1111 mov loc7=0
9ec1a7ad 1112(pRecurse) br.call.dptk.few b0=rse_clear_invalid
1da177e4
LT		 1113 ;;
1114 mov loc8=0
1115 mov loc9=0
1116 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1117 mov loc10=0
1118 mov loc11=0
9ec1a7ad 1119(pReturn) br.ret.dptk.many b0
1da177e4
LT		 1120#endif /* !CONFIG_ITANIUM */
1121# undef pRecurse
1122# undef pReturn
1123 ;;
1124 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1125 ;;
1126 loadrs
1127 ;;
1128skip_rbs_switch:
1129 mov ar.unat=r25 // M2
1130(pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1131(pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1132 ;;
1133(pUStk) mov ar.bspstore=r23 // M2
1134(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1135(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1136 ;;
4df8d22b 1137 MOV_TO_IPSR(p0, r29, r25) // M2
1da177e4
LT		 1138 mov ar.pfs=r26 // I0
1139(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1140
4df8d22b 1141 MOV_TO_IFS(p9, r30, r25)// M2
1da177e4
LT		 1142 mov b0=r21 // I0
1143(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1144
1145 mov ar.fpsr=r20 // M2
4df8d22b 1146 MOV_TO_IIP(r28, r25) // M2
1da177e4
LT		 1147 nop 0
1148 ;;
1149(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1150 nop 0
1151(pLvSys)mov r2=r0
1152
1153 mov ar.rsc=r27 // M2
1154 mov pr=r31,-1 // I0
4df8d22b 1155 RFI // B
1da177e4
LT		 1156
1157 /*
1158 * On entry:
1159 * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1160 * r31 = current->thread_info->flags
1161 * On exit:
1162 * p6 = TRUE if work-pending-check needs to be redone
3633c730
HS		 1163 *
1164 * Interrupts are disabled on entry, reenabled depend on work, and
1165 * disabled on exit.
1da177e4
LT		 1166 */
1167.work_pending_syscall:
1168 add r2=-8,r2
1169 add r3=-8,r3
1170 ;;
1171 st8 [r2]=r8
1172 st8 [r3]=r10
1173.work_pending:
2e513fe4 1174 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1da177e4
LT		 1175(p6) br.cond.sptk.few .notify
1176#ifdef CONFIG_PREEMPT
1177(pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1178 ;;
1179(pKStk) st4 [r20]=r21
1da177e4 1180#endif
4df8d22b 1181 SSM_PSR_I(p0, p6, r2) // enable interrupts
1da177e4 1182 br.call.spnt.many rp=schedule
2e513fe4 1183.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
4df8d22b 1184 RSM_PSR_I(p0, r2, r20) // disable interrupts
1da177e4
LT		 1185 ;;
1186#ifdef CONFIG_PREEMPT
1187(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1188 ;;
1189(pKStk) st4 [r20]=r0 // preempt_count() <- 0
1190#endif
4df8d22b 1191(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
2e513fe4 1192 br.cond.sptk.many .work_processed_kernel
1da177e4
LT		 1193
1194.notify:
1195(pUStk) br.call.spnt.many rp=notify_resume_user
2e513fe4 1196.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
4df8d22b 1197(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
2e513fe4 1198 br.cond.sptk.many .work_processed_kernel
1da177e4 1199
4df8d22b
IY		 1200.global __paravirt_pending_syscall_end;
1201__paravirt_pending_syscall_end:
1da177e4
LT		 1202 adds r2=PT(R8)+16,r12
1203 adds r3=PT(R10)+16,r12
1204 ;;
1205 ld8 r8=[r2]
1206 ld8 r10=[r3]
4df8d22b
IY		 1207 br.cond.sptk.many __paravirt_work_processed_syscall_target
1208END(__paravirt_leave_kernel)
1da177e4 1209
4df8d22b 1210#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1da177e4
LT		 1211ENTRY(handle_syscall_error)
1212 /*
1213 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1214 * lead us to mistake a negative return value as a failed syscall. Those syscall
1215 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1216 * pt_regs.r8 is zero, we assume that the call completed successfully.
1217 */
1218 PT_REGS_UNWIND_INFO(0)
1219 ld8 r3=[r2] // load pt_regs.r8
1220 ;;
1221 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1222 ;;
1223(p7) mov r10=-1
1224(p7) sub r8=0,r8 // negate return value to get errno
1225 br.cond.sptk ia64_leave_syscall
1226END(handle_syscall_error)
1227
1228 /*
1229 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1230 * in case a system call gets restarted.
1231 */
1232GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1233 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1234 alloc loc1=ar.pfs,8,2,1,0
1235 mov loc0=rp
1236 mov out0=r8 // Address of previous task
1237 ;;
1238 br.call.sptk.many rp=schedule_tail
1239.ret11: mov ar.pfs=loc1
1240 mov rp=loc0
1241 br.ret.sptk.many rp
1242END(ia64_invoke_schedule_tail)
1243
1244 /*
3633c730
HS		 1245 * Setup stack and call do_notify_resume_user(), keeping interrupts
1246 * disabled.
1247 *
1248 * Note that pSys and pNonSys need to be set up by the caller.
1249 * We declare 8 input registers so the system call args get preserved,
1250 * in case we need to restart a system call.
1da177e4 1251 */
4df8d22b 1252GLOBAL_ENTRY(notify_resume_user)
1da177e4
LT		 1253 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1254 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1255 mov r9=ar.unat
1256 mov loc0=rp // save return address
1257 mov out0=0 // there is no "oldset"
1258 adds out1=8,sp // out1=&sigscratch->ar_pfs
1259(pSys) mov out2=1 // out2==1 => we're in a syscall
1260 ;;
1261(pNonSys) mov out2=0 // out2==0 => not a syscall
1262 .fframe 16
bfd68594 1263 .spillsp ar.unat, 16
1da177e4
LT		 1264 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1265 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1266 .body
1267 br.call.sptk.many rp=do_notify_resume_user
1268.ret15: .restore sp
1269 adds sp=16,sp // pop scratch stack space
1270 ;;
1271 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1272 mov rp=loc0
1273 ;;
1274 mov ar.unat=r9
1275 mov ar.pfs=loc1
1276 br.ret.sptk.many rp
1277END(notify_resume_user)
1278
1da177e4
LT		 1279ENTRY(sys_rt_sigreturn)
1280 PT_REGS_UNWIND_INFO(0)
1281 /*
1282 * Allocate 8 input registers since ptrace() may clobber them
1283 */
1284 alloc r2=ar.pfs,8,0,1,0
1285 .prologue
1286 PT_REGS_SAVES(16)
1287 adds sp=-16,sp
1288 .body
1289 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1290 ;;
1291 /*
1292 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1293 * syscall-entry path does not save them we save them here instead. Note: we
1294 * don't need to save any other registers that are not saved by the stream-lined
1295 * syscall path, because restore_sigcontext() restores them.
1296 */
1297 adds r16=PT(F6)+32,sp
1298 adds r17=PT(F7)+32,sp
1299 ;;
1300 stf.spill [r16]=f6,32
1301 stf.spill [r17]=f7,32
1302 ;;
1303 stf.spill [r16]=f8,32
1304 stf.spill [r17]=f9,32
1305 ;;
1306 stf.spill [r16]=f10
1307 stf.spill [r17]=f11
1308 adds out0=16,sp // out0 = &sigscratch
1309 br.call.sptk.many rp=ia64_rt_sigreturn
763b3917 1310.ret19: .restore sp,0
1da177e4
LT		 1311 adds sp=16,sp
1312 ;;
1313 ld8 r9=[sp] // load new ar.unat
4df8d22b 1314 mov.sptk b7=r8,ia64_native_leave_kernel
1da177e4
LT		 1315 ;;
1316 mov ar.unat=r9
1317 br.many b7
1318END(sys_rt_sigreturn)
1319
1320GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1321 .prologue
1322 /*
1323 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1324 */
1325 mov r16=r0
1326 DO_SAVE_SWITCH_STACK
1327 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1328.ret21: .body
1329 DO_LOAD_SWITCH_STACK
1330 br.cond.sptk.many rp // goes to ia64_leave_kernel
1331END(ia64_prepare_handle_unaligned)
1332
1333 //
1334 // unw_init_running(void (*callback)(info, arg), void *arg)
1335 //
1336# define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1337
1338GLOBAL_ENTRY(unw_init_running)
1339 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1340 alloc loc1=ar.pfs,2,3,3,0
1341 ;;
1342 ld8 loc2=[in0],8
1343 mov loc0=rp
1344 mov r16=loc1
1345 DO_SAVE_SWITCH_STACK
1346 .body
1347
1348 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1349 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1350 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1351 adds sp=-EXTRA_FRAME_SIZE,sp
1352 .body
1353 ;;
1354 adds out0=16,sp // &info
1355 mov out1=r13 // current
1356 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1357 br.call.sptk.many rp=unw_init_frame_info
13581: adds out0=16,sp // &info
1359 mov b6=loc2
1360 mov loc2=gp // save gp across indirect function call
1361 ;;
1362 ld8 gp=[in0]
1363 mov out1=in1 // arg
1364 br.call.sptk.many rp=b6 // invoke the callback function
13651: mov gp=loc2 // restore gp
1366
1367 // For now, we don't allow changing registers from within
1368 // unw_init_running; if we ever want to allow that, we'd
1369 // have to do a load_switch_stack here:
1370 .restore sp
1371 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1372
1373 mov ar.pfs=loc1
1374 mov rp=loc0
1375 br.ret.sptk.many rp
1376END(unw_init_running)
1377
d3e75ff1 1378#ifdef CONFIG_FUNCTION_TRACER
a14a07b8
SL		 1379#ifdef CONFIG_DYNAMIC_FTRACE
1380GLOBAL_ENTRY(_mcount)
1381 br ftrace_stub
1382END(_mcount)
1383
1384.here:
1385 br.ret.sptk.many b0
1386
1387GLOBAL_ENTRY(ftrace_caller)
1388 alloc out0 = ar.pfs, 8, 0, 4, 0
1389 mov out3 = r0
1390 ;;
1391 mov out2 = b0
1392 add r3 = 0x20, r3
1393 mov out1 = r1;
1394 br.call.sptk.many b0 = ftrace_patch_gp
1395 //this might be called from module, so we must patch gp
1396ftrace_patch_gp:
1397 movl gp=__gp
1398 mov b0 = r3
1399 ;;
1400.global ftrace_call;
1401ftrace_call:
1402{
1403 .mlx
1404 nop.m 0x0
1405 movl r3 = .here;;
1406}
1407 alloc loc0 = ar.pfs, 4, 4, 2, 0
1408 ;;
1409 mov loc1 = b0
1410 mov out0 = b0
1411 mov loc2 = r8
1412 mov loc3 = r15
1413 ;;
1414 adds out0 = -MCOUNT_INSN_SIZE, out0
1415 mov out1 = in2
1416 mov b6 = r3
1417
1418 br.call.sptk.many b0 = b6
1419 ;;
1420 mov ar.pfs = loc0
1421 mov b0 = loc1
1422 mov r8 = loc2
1423 mov r15 = loc3
1424 br ftrace_stub
1425 ;;
1426END(ftrace_caller)
1427
1428#else
d3e75ff1
SL		 1429GLOBAL_ENTRY(_mcount)
1430 movl r2 = ftrace_stub
1431 movl r3 = ftrace_trace_function;;
1432 ld8 r3 = [r3];;
1433 ld8 r3 = [r3];;
1434 cmp.eq p7,p0 = r2, r3
1435(p7) br.sptk.many ftrace_stub
1436 ;;
1437
1438 alloc loc0 = ar.pfs, 4, 4, 2, 0
1439 ;;
1440 mov loc1 = b0
1441 mov out0 = b0
1442 mov loc2 = r8
1443 mov loc3 = r15
1444 ;;
1445 adds out0 = -MCOUNT_INSN_SIZE, out0
1446 mov out1 = in2
1447 mov b6 = r3
1448
1449 br.call.sptk.many b0 = b6
1450 ;;
1451 mov ar.pfs = loc0
1452 mov b0 = loc1
1453 mov r8 = loc2
1454 mov r15 = loc3
1455 br ftrace_stub
1456 ;;
1457END(_mcount)
a14a07b8 1458#endif
d3e75ff1
SL		 1459
1460GLOBAL_ENTRY(ftrace_stub)
1461 mov r3 = b0
1462 movl r2 = _mcount_ret_helper
1463 ;;
1464 mov b6 = r2
1465 mov b7 = r3
1466 br.ret.sptk.many b6
1467
1468_mcount_ret_helper:
1469 mov b0 = r42
1470 mov r1 = r41
1471 mov ar.pfs = r40
1472 br b7
1473END(ftrace_stub)
1474
1475#endif /* CONFIG_FUNCTION_TRACER */
1476
1da177e4
LT		 1477 .rodata
1478 .align 8
1479 .globl sys_call_table
1480sys_call_table:
1481 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1482 data8 sys_exit // 1025
1483 data8 sys_read
1484 data8 sys_write
1485 data8 sys_open
1486 data8 sys_close
1487 data8 sys_creat // 1030
1488 data8 sys_link
1489 data8 sys_unlink
1490 data8 ia64_execve
1491 data8 sys_chdir
1492 data8 sys_fchdir // 1035
1493 data8 sys_utimes
1494 data8 sys_mknod
1495 data8 sys_chmod
1496 data8 sys_chown
1497 data8 sys_lseek // 1040
1498 data8 sys_getpid
1499 data8 sys_getppid
1500 data8 sys_mount
1501 data8 sys_umount
1502 data8 sys_setuid // 1045
1503 data8 sys_getuid
1504 data8 sys_geteuid
1505 data8 sys_ptrace
1506 data8 sys_access
1507 data8 sys_sync // 1050
1508 data8 sys_fsync
1509 data8 sys_fdatasync
1510 data8 sys_kill
1511 data8 sys_rename
1512 data8 sys_mkdir // 1055
1513 data8 sys_rmdir
1514 data8 sys_dup
1134723e 1515 data8 sys_ia64_pipe
1da177e4
LT		 1516 data8 sys_times
1517 data8 ia64_brk // 1060
1518 data8 sys_setgid
1519 data8 sys_getgid
1520 data8 sys_getegid
1521 data8 sys_acct
1522 data8 sys_ioctl // 1065
1523 data8 sys_fcntl
1524 data8 sys_umask
1525 data8 sys_chroot
1526 data8 sys_ustat
1527 data8 sys_dup2 // 1070
1528 data8 sys_setreuid
1529 data8 sys_setregid
1530 data8 sys_getresuid
1531 data8 sys_setresuid
1532 data8 sys_getresgid // 1075
1533 data8 sys_setresgid
1534 data8 sys_getgroups
1535 data8 sys_setgroups
1536 data8 sys_getpgid
1537 data8 sys_setpgid // 1080
1538 data8 sys_setsid
1539 data8 sys_getsid
1540 data8 sys_sethostname
1541 data8 sys_setrlimit
1542 data8 sys_getrlimit // 1085
1543 data8 sys_getrusage
1544 data8 sys_gettimeofday
1545 data8 sys_settimeofday
1546 data8 sys_select
1547 data8 sys_poll // 1090
1548 data8 sys_symlink
1549 data8 sys_readlink
1550 data8 sys_uselib
1551 data8 sys_swapon
1552 data8 sys_swapoff // 1095
1553 data8 sys_reboot
1554 data8 sys_truncate
1555 data8 sys_ftruncate
1556 data8 sys_fchmod
1557 data8 sys_fchown // 1100
1558 data8 ia64_getpriority
1559 data8 sys_setpriority
1560 data8 sys_statfs
1561 data8 sys_fstatfs
1562 data8 sys_gettid // 1105
1563 data8 sys_semget
1564 data8 sys_semop
1565 data8 sys_semctl
1566 data8 sys_msgget
1567 data8 sys_msgsnd // 1110
1568 data8 sys_msgrcv
1569 data8 sys_msgctl
1570 data8 sys_shmget
7d87e14c 1571 data8 sys_shmat
1da177e4
LT		 1572 data8 sys_shmdt // 1115
1573 data8 sys_shmctl
1574 data8 sys_syslog
1575 data8 sys_setitimer
1576 data8 sys_getitimer
1577 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1578 data8 sys_ni_syscall /* was: ia64_oldlstat */
1579 data8 sys_ni_syscall /* was: ia64_oldfstat */
1580 data8 sys_vhangup
1581 data8 sys_lchown
1582 data8 sys_remap_file_pages // 1125
1583 data8 sys_wait4
1584 data8 sys_sysinfo
1585 data8 sys_clone
1586 data8 sys_setdomainname
1587 data8 sys_newuname // 1130
1588 data8 sys_adjtimex
1589 data8 sys_ni_syscall /* was: ia64_create_module */
1590 data8 sys_init_module
1591 data8 sys_delete_module
1592 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1593 data8 sys_ni_syscall /* was: sys_query_module */
1594 data8 sys_quotactl
1595 data8 sys_bdflush
1596 data8 sys_sysfs
1597 data8 sys_personality // 1140
1598 data8 sys_ni_syscall // sys_afs_syscall
1599 data8 sys_setfsuid
1600 data8 sys_setfsgid
1601 data8 sys_getdents
1602 data8 sys_flock // 1145
1603 data8 sys_readv
1604 data8 sys_writev
1605 data8 sys_pread64
1606 data8 sys_pwrite64
1607 data8 sys_sysctl // 1150
1608 data8 sys_mmap
1609 data8 sys_munmap
1610 data8 sys_mlock
1611 data8 sys_mlockall
1612 data8 sys_mprotect // 1155
1613 data8 ia64_mremap
1614 data8 sys_msync
1615 data8 sys_munlock
1616 data8 sys_munlockall
1617 data8 sys_sched_getparam // 1160
1618 data8 sys_sched_setparam
1619 data8 sys_sched_getscheduler
1620 data8 sys_sched_setscheduler
1621 data8 sys_sched_yield
1622 data8 sys_sched_get_priority_max // 1165
1623 data8 sys_sched_get_priority_min
1624 data8 sys_sched_rr_get_interval
1625 data8 sys_nanosleep
f5b94099 1626 data8 sys_ni_syscall // old nfsservctl
1da177e4
LT		 1627 data8 sys_prctl // 1170
1628 data8 sys_getpagesize
1629 data8 sys_mmap2
1630 data8 sys_pciconfig_read
1631 data8 sys_pciconfig_write
1632 data8 sys_perfmonctl // 1175
1633 data8 sys_sigaltstack
1634 data8 sys_rt_sigaction
1635 data8 sys_rt_sigpending
1636 data8 sys_rt_sigprocmask
1637 data8 sys_rt_sigqueueinfo // 1180
1638 data8 sys_rt_sigreturn
1639 data8 sys_rt_sigsuspend
1640 data8 sys_rt_sigtimedwait
1641 data8 sys_getcwd
1642 data8 sys_capget // 1185
1643 data8 sys_capset
1644 data8 sys_sendfile64
1645 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1646 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1647 data8 sys_socket // 1190
1648 data8 sys_bind
1649 data8 sys_connect
1650 data8 sys_listen
1651 data8 sys_accept
1652 data8 sys_getsockname // 1195
1653 data8 sys_getpeername
1654 data8 sys_socketpair
1655 data8 sys_send
1656 data8 sys_sendto
1657 data8 sys_recv // 1200
1658 data8 sys_recvfrom
1659 data8 sys_shutdown
1660 data8 sys_setsockopt
1661 data8 sys_getsockopt
1662 data8 sys_sendmsg // 1205
1663 data8 sys_recvmsg
1664 data8 sys_pivot_root
1665 data8 sys_mincore
1666 data8 sys_madvise
1667 data8 sys_newstat // 1210
1668 data8 sys_newlstat
1669 data8 sys_newfstat
1670 data8 sys_clone2
1671 data8 sys_getdents64
1672 data8 sys_getunwind // 1215
1673 data8 sys_readahead
1674 data8 sys_setxattr
1675 data8 sys_lsetxattr
1676 data8 sys_fsetxattr
1677 data8 sys_getxattr // 1220
1678 data8 sys_lgetxattr
1679 data8 sys_fgetxattr
1680 data8 sys_listxattr
1681 data8 sys_llistxattr
1682 data8 sys_flistxattr // 1225
1683 data8 sys_removexattr
1684 data8 sys_lremovexattr
1685 data8 sys_fremovexattr
1686 data8 sys_tkill
1687 data8 sys_futex // 1230
1688 data8 sys_sched_setaffinity
1689 data8 sys_sched_getaffinity
1690 data8 sys_set_tid_address
1691 data8 sys_fadvise64_64
1692 data8 sys_tgkill // 1235
1693 data8 sys_exit_group
1694 data8 sys_lookup_dcookie
1695 data8 sys_io_setup
1696 data8 sys_io_destroy
1697 data8 sys_io_getevents // 1240
1698 data8 sys_io_submit
1699 data8 sys_io_cancel
1700 data8 sys_epoll_create
1701 data8 sys_epoll_ctl
1702 data8 sys_epoll_wait // 1245
1703 data8 sys_restart_syscall
1704 data8 sys_semtimedop
1705 data8 sys_timer_create
1706 data8 sys_timer_settime
1707 data8 sys_timer_gettime // 1250
1708 data8 sys_timer_getoverrun
1709 data8 sys_timer_delete
1710 data8 sys_clock_settime
1711 data8 sys_clock_gettime
1712 data8 sys_clock_getres // 1255
1713 data8 sys_clock_nanosleep
1714 data8 sys_fstatfs64
1715 data8 sys_statfs64
1716 data8 sys_mbind
1717 data8 sys_get_mempolicy // 1260
1718 data8 sys_set_mempolicy
1719 data8 sys_mq_open
1720 data8 sys_mq_unlink
1721 data8 sys_mq_timedsend
1722 data8 sys_mq_timedreceive // 1265
1723 data8 sys_mq_notify
1724 data8 sys_mq_getsetattr
a7956113 1725 data8 sys_kexec_load
1da177e4
LT		 1726 data8 sys_ni_syscall // reserved for vserver
1727 data8 sys_waitid // 1270
1728 data8 sys_add_key
1729 data8 sys_request_key
1730 data8 sys_keyctl
22e2c507
JA		 1731 data8 sys_ioprio_set
1732 data8 sys_ioprio_get // 1275
742755a1 1733 data8 sys_move_pages
d108919b
RL		 1734 data8 sys_inotify_init
1735 data8 sys_inotify_add_watch
1736 data8 sys_inotify_rm_watch
39743889 1737 data8 sys_migrate_pages // 1280
9ed2ad86
KC		 1738 data8 sys_openat
1739 data8 sys_mkdirat
1740 data8 sys_mknodat
1741 data8 sys_fchownat
1742 data8 sys_futimesat // 1285
1743 data8 sys_newfstatat
1744 data8 sys_unlinkat
1745 data8 sys_renameat
1746 data8 sys_linkat
1747 data8 sys_symlinkat // 1290
1748 data8 sys_readlinkat
1749 data8 sys_fchmodat
1750 data8 sys_faccessat
e180583b 1751 data8 sys_pselect6
ad9e39c7 1752 data8 sys_ppoll // 1295
9621a4ef 1753 data8 sys_unshare
5274f052 1754 data8 sys_splice
5c55cd63
TL		 1755 data8 sys_set_robust_list
1756 data8 sys_get_robust_list
d905b00b 1757 data8 sys_sync_file_range // 1300
70524490 1758 data8 sys_tee
912d35f8 1759 data8 sys_vmsplice
3d7559e6 1760 data8 sys_fallocate
86afa9eb 1761 data8 sys_getcpu
472118e6
TL		 1762 data8 sys_epoll_pwait // 1305
1763 data8 sys_utimensat
ae67e498 1764 data8 sys_signalfd
4d672e7a 1765 data8 sys_ni_syscall
ae67e498 1766 data8 sys_eventfd
ad9e39c7
TL		 1767 data8 sys_timerfd_create // 1310
1768 data8 sys_timerfd_settime
1769 data8 sys_timerfd_gettime
3e4d0cab
TL		 1770 data8 sys_signalfd4
1771 data8 sys_eventfd2
1772 data8 sys_epoll_create1 // 1315
1773 data8 sys_dup3
1774 data8 sys_pipe2
1775 data8 sys_inotify_init1
8851d371
TL		 1776 data8 sys_preadv
1777 data8 sys_pwritev // 1320
97de6ad1 1778 data8 sys_rt_tgsigqueueinfo
a2e27255 1779 data8 sys_recvmmsg
a78b2de1
TL		 1780 data8 sys_fanotify_init
1781 data8 sys_fanotify_mark
1782 data8 sys_prlimit64 // 1325
9298168d
TL		 1783 data8 sys_name_to_handle_at
1784 data8 sys_open_by_handle_at
1785 data8 sys_clock_adjtime
1786 data8 sys_syncfs
7b21fddd 1787 data8 sys_setns // 1330
83caba84 1788 data8 sys_sendmmsg
5569459c
TL		 1789 data8 sys_process_vm_readv
1790 data8 sys_process_vm_writev
65cc21b4 1791 data8 sys_accept4
1da177e4
LT		 1792
1793 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
4df8d22b 1794#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
kernel source for telekom puls (alcatel/mediatek)