ARM: tegra: Rename board-dt-tegra20.c to tegra.c
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-tegra / tegra.c
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1/*
2 * nVidia Tegra device tree board support
3 *
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
1711b1e1 18#include <linux/clocksource.h>
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19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/serial_8250.h>
23#include <linux/clk.h>
24#include <linux/dma-mapping.h>
25#include <linux/irqdomain.h>
26#include <linux/of.h>
27#include <linux/of_address.h>
28#include <linux/of_fdt.h>
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29#include <linux/of_platform.h>
30#include <linux/pda_power.h>
bab53ce3 31#include <linux/platform_data/tegra_usb.h>
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32#include <linux/io.h>
33#include <linux/i2c.h>
34#include <linux/i2c-tegra.h>
bab53ce3 35#include <linux/usb/tegra_usb_phy.h>
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36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40#include <asm/setup.h>
41
8e267f3d 42#include "board.h"
a1725732 43#include "common.h"
2be39c07 44#include "iomap.h"
bab53ce3 45
deeb8d19 46static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
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47 .operating_mode = TEGRA_USB_OTG,
48 .power_down_on_bus_suspend = 1,
49 .vbus_gpio = -1,
50};
51
deeb8d19 52static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
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53 .reset_gpio = -1,
54 .clk = "cdev2",
55};
56
deeb8d19 57static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
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58 .phy_config = &tegra_ehci2_ulpi_phy_config,
59 .operating_mode = TEGRA_USB_HOST,
60 .power_down_on_bus_suspend = 1,
61 .vbus_gpio = -1,
62};
63
deeb8d19 64static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
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65 .operating_mode = TEGRA_USB_HOST,
66 .power_down_on_bus_suspend = 1,
67 .vbus_gpio = -1,
68};
8e267f3d 69
deeb8d19 70static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
16a665f8 71 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5000000, "tegra-ehci.0",
8c3ec841 72 &tegra_ehci1_pdata),
16a665f8 73 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5004000, "tegra-ehci.1",
8c3ec841 74 &tegra_ehci2_pdata),
16a665f8 75 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5008000, "tegra-ehci.2",
8c3ec841 76 &tegra_ehci3_pdata),
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77 {}
78};
79
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80static void __init tegra_dt_init(void)
81{
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82 /*
83 * Finished with the static registrations now; fill in the missing
84 * devices
85 */
2553dcc6 86 of_platform_populate(NULL, of_default_bus_match_table,
a58116f3 87 tegra20_auxdata_lookup, NULL);
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88}
89
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90static void __init trimslice_init(void)
91{
be6a9194 92#ifdef CONFIG_TEGRA_PCI
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93 int ret;
94
95 ret = tegra_pcie_init(true, true);
96 if (ret)
97 pr_err("tegra_pci_init() failed: %d\n", ret);
c554dee3 98#endif
be6a9194 99}
c554dee3 100
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101static void __init harmony_init(void)
102{
3cc404de 103#ifdef CONFIG_TEGRA_PCI
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104 int ret;
105
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106 ret = harmony_pcie_init();
107 if (ret)
108 pr_err("harmony_pcie_init() failed: %d\n", ret);
a12c0efc 109#endif
bb25af81 110}
a12c0efc 111
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112static void __init paz00_init(void)
113{
114 tegra_paz00_wifikill_init();
115}
b64a02c6 116
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117static struct {
118 char *machine;
119 void (*init)(void);
120} board_init_funcs[] = {
c554dee3 121 { "compulab,trimslice", trimslice_init },
a12c0efc 122 { "nvidia,harmony", harmony_init },
b64a02c6 123 { "compal,paz00", paz00_init },
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124};
125
126static void __init tegra_dt_init_late(void)
127{
128 int i;
129
130 tegra_init_late();
131
132 for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
133 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
134 board_init_funcs[i].init();
135 break;
136 }
137 }
138}
139
c37c07dd 140static const char *tegra20_dt_board_compat[] = {
c5444f39 141 "nvidia,tegra20",
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142 NULL
143};
144
c37c07dd 145DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
8e267f3d 146 .map_io = tegra_map_common_io,
a1725732 147 .smp = smp_ops(tegra_smp_ops),
7469688e 148 .init_early = tegra_init_early,
0d4f7479 149 .init_irq = tegra_dt_init_irq,
1711b1e1 150 .init_time = clocksource_of_init,
8e267f3d 151 .init_machine = tegra_dt_init,
c554dee3 152 .init_late = tegra_dt_init_late,
abea3f2c 153 .restart = tegra_assert_system_reset,
c37c07dd 154 .dt_compat = tegra20_dt_board_compat,
8e267f3d 155MACHINE_END